From: Jan Michel <j.michel@gsi.de>
Date: Tue, 18 Jul 2017 16:45:00 +0000 (+0200)
Subject: include change of SPI from Dirich
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=e61a999d432b06051516e5504b8478f875829226;p=vhdlbasics.git

include change of SPI from Dirich
---

diff --git a/interface/spi_slave.vhd b/interface/spi_slave.vhd
index f234756..9badbab 100644
--- a/interface/spi_slave.vhd
+++ b/interface/spi_slave.vhd
@@ -103,8 +103,8 @@ PROC_GEN_SIGNALS : process begin
         operation_i <= input(23);
         if (input(23) = '0') then  
           READ_OUT  <= '1';
-        else
-          WRITE_OUT <= '1';
+--         else
+--           WRITE_OUT <= '1';
         end if;
         ADDR_OUT    <= input(31 downto 24);
         state       <= GET_DATA;
@@ -151,4 +151,4 @@ DEBUG(7 downto 4) <= std_logic_vector(to_unsigned(bitcnt,4));
 DEBUG(14 downto 8) <= input(30 downto 24);
 --DEBUG_OUT(15) <= write_i(4);
 
-end;
\ No newline at end of file
+end;