From: Thomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Date: Wed, 30 Sep 2020 10:18:41 +0000 (+0200)
Subject: hub_test: Add timing constraints
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=e7de0b649fa24fb5e228d594e983bdc0b695d047;p=cri.git

hub_test: Add timing constraints

Currently requires the sync_fix branch of trbnet to achieve timing
closure.
---

diff --git a/hub_test/constrs/hub_test.xdc b/hub_test/constrs/hub_test.xdc
index 567207e..e08938a 100644
--- a/hub_test/constrs/hub_test.xdc
+++ b/hub_test/constrs/hub_test.xdc
@@ -69,3 +69,9 @@ set_property LOC GTHE3_CHANNEL_X1Y38 [get_cells -hierarchical -filter {NAME =~ g
 set_property LOC GTHE3_CHANNEL_X1Y36 [get_cells -hierarchical -filter {NAME =~ generate_downlinks[8].THE_DOWNLINK/*/gthe3_channel_gen.gen_gthe3_channel_inst[0].GTHE3_CHANNEL_PRIM_INST}]
 
 set_property LOC GTHE3_CHANNEL_X1Y29 [get_cells -hierarchical -filter {NAME =~ THE_UPLINK/*/gthe3_channel_gen.gen_gthe3_channel_inst[0].GTHE3_CHANNEL_PRIM_INST}]
+
+set_false_path -from [get_pins THE_UPLINK/THE_MED_CONTROL/THE_RX_CONTROL/RX_DLM_reg/C] -to [get_pins THE_UPLINK/THE_MED_CONTROL/led_dlm_reg/D]
+set_false_path -to [get_pins {THE_RESET_HANDLER/async_sampler_reg[0]/D}]
+set_false_path -to [get_pins {generate_downlinks[*].THE_DOWNLINK/THE_MED_CONTROL/THE_?X_FSM/rst_n_refclk_*reg/CLR}]
+set_false_path -to [get_pins THE_UPLINK/THE_MED_CONTROL/THE_?X_FSM/rst_n_refclk_*reg/CLR]
+set_false_path -to [get_pins THE_UPLINK/THE_MED_CONTROL/reset_txi_*reg/PRE]
diff --git a/hub_test/constrs/pulse_sync.xdc b/hub_test/constrs/pulse_sync.xdc
new file mode 100644
index 0000000..3b8678f
--- /dev/null
+++ b/hub_test/constrs/pulse_sync.xdc
@@ -0,0 +1,3 @@
+set_property ASYNC_REG true [get_cells toggle_ff*]
+set_property ASYNC_REG true [get_cells sync_q*]
+set_false_path -from [get_cells toggle_ff*] -to [get_cells sync_q*]
\ No newline at end of file
diff --git a/hub_test/constrs/signal_sync.xdc b/hub_test/constrs/signal_sync.xdc
new file mode 100644
index 0000000..5b1988b
--- /dev/null
+++ b/hub_test/constrs/signal_sync.xdc
@@ -0,0 +1,2 @@
+set_property ASYNC_REG true [get_cells sync_q*]
+set_false_path -to [get_cells *gen_flipflops[2].sync_q_reg*]
\ No newline at end of file
diff --git a/hub_test/constrs/trb_net_reset_handler.xdc b/hub_test/constrs/trb_net_reset_handler.xdc
new file mode 100644
index 0000000..af52c9d
--- /dev/null
+++ b/hub_test/constrs/trb_net_reset_handler.xdc
@@ -0,0 +1 @@
+set_property ASYNC_REG true [get_cells async_sampler*]
\ No newline at end of file
diff --git a/hub_test/hub_test.xpr b/hub_test/hub_test.xpr
index 3f78f10..1cdd809 100644
--- a/hub_test/hub_test.xpr
+++ b/hub_test/hub_test.xpr
@@ -544,6 +544,27 @@
           <Attr Name="ScopedToRef" Val="trb_parser"/>
         </FileInfo>
       </File>
+      <File Path="$PPRDIR/constrs/pulse_sync.xdc">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="implementation"/>
+          <Attr Name="ScopedToRef" Val="pulse_sync"/>
+        </FileInfo>
+      </File>
+      <File Path="$PPRDIR/constrs/signal_sync.xdc">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="implementation"/>
+          <Attr Name="ScopedToRef" Val="signal_sync"/>
+        </FileInfo>
+      </File>
+      <File Path="$PPRDIR/constrs/trb_net_reset_handler.xdc">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="implementation"/>
+          <Attr Name="ScopedToRef" Val="trb_net_reset_handler"/>
+        </FileInfo>
+      </File>
       <Config>
         <Option Name="ConstrsType" Val="XDC"/>
       </Config>