From: Maps Date: Fri, 16 Jan 2015 19:04:51 +0000 (+0100) Subject: started new FEB for Presto X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=f346ec101619025f894a94a2da4b1bd73f02795c;p=mvdelectronics.git started new FEB for Presto --- diff --git a/CB2013/CB2013.PrjPCB b/CB2013/CB2013.PrjPCB index 8e28d70..75dd1e9 100755 --- a/CB2013/CB2013.PrjPCB +++ b/CB2013/CB2013.PrjPCB @@ -320,22 +320,6 @@ DItemRevisionGUID= GenerateClassCluster=0 [Document19] -DocumentPath=..\cSchraderIsos\MVD\MIMOSA Prototype\07E10_MIMOSA26_PROTOTYPE\Converter_Board_V1_0\CB_V1_0.PcbLib -AnnotationEnabled=1 -AnnotateStartValue=1 -AnnotationIndexControlEnabled=0 -AnnotateSuffix= -AnnotateScope=All -AnnotateOrder=-1 -DoLibraryUpdate=1 -DoDatabaseUpdate=1 -ClassGenCCAutoEnabled=1 -ClassGenCCAutoRoomEnabled=1 -ClassGenNCAutoScope=None -DItemRevisionGUID= -GenerateClassCluster=0 - -[Document20] DocumentPath=CB2013.PcbLib AnnotationEnabled=1 AnnotateStartValue=1 @@ -351,7 +335,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document21] +[Document20] DocumentPath=CB2013.Annotation AnnotationEnabled=1 AnnotateStartValue=1 @@ -367,7 +351,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document22] +[Document21] DocumentPath=CB13_DAC.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 @@ -383,7 +367,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document23] +[Document22] DocumentPath=CB13_DAC.Harness AnnotationEnabled=1 AnnotateStartValue=1 @@ -399,7 +383,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document24] +[Document23] DocumentPath=CB2013.OutJob AnnotationEnabled=1 AnnotateStartValue=1 @@ -415,7 +399,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document25] +[Document24] DocumentPath=CB13_LvdsRepeater.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 @@ -431,7 +415,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document26] +[Document25] DocumentPath=CB13_LvdsRepeater.Harness AnnotationEnabled=1 AnnotateStartValue=1 @@ -447,7 +431,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document27] +[Document26] DocumentPath=CAMtastic1.Cam AnnotationEnabled=1 AnnotateStartValue=1 @@ -467,102 +451,6 @@ GenerateClassCluster=0 DocumentPath=6C-8L-1550um.PcbDoc.htm DItemRevisionGUID= -[GeneratedDocument2] -DocumentPath=Project Outputs for CB2013\CB13_ADC.BOM -DItemRevisionGUID= - -[GeneratedDocument3] -DocumentPath=Project Outputs for CB2013\CB13_ADC.CSV -DItemRevisionGUID= - -[GeneratedDocument4] -DocumentPath=Project Outputs for CB2013\CB13_FebOutput.REP -DItemRevisionGUID= - -[GeneratedDocument5] -DocumentPath=Project Outputs for CB2013\CB13_uC.BOM -DItemRevisionGUID= - -[GeneratedDocument6] -DocumentPath=Project Outputs for CB2013\CB13_uC.CSV -DItemRevisionGUID= - -[GeneratedDocument7] -DocumentPath=Project Outputs for CB2013\CB2013.EXTREP -DItemRevisionGUID= - -[GeneratedDocument8] -DocumentPath=Project Outputs for CB2013\CB2013.G1 -DItemRevisionGUID= - -[GeneratedDocument9] -DocumentPath=Project Outputs for CB2013\CB2013.G2 -DItemRevisionGUID= - -[GeneratedDocument10] -DocumentPath=Project Outputs for CB2013\CB2013.G3 -DItemRevisionGUID= - -[GeneratedDocument11] -DocumentPath=Project Outputs for CB2013\CB2013.G4 -DItemRevisionGUID= - -[GeneratedDocument12] -DocumentPath=Project Outputs for CB2013\CB2013.G5 -DItemRevisionGUID= - -[GeneratedDocument13] -DocumentPath=Project Outputs for CB2013\CB2013.G6 -DItemRevisionGUID= - -[GeneratedDocument14] -DocumentPath=Project Outputs for CB2013\CB2013.GBL -DItemRevisionGUID= - -[GeneratedDocument15] -DocumentPath=Project Outputs for CB2013\CB2013.GBS -DItemRevisionGUID= - -[GeneratedDocument16] -DocumentPath=Project Outputs for CB2013\CB2013.GTL -DItemRevisionGUID= - -[GeneratedDocument17] -DocumentPath=Project Outputs for CB2013\CB2013.GTO -DItemRevisionGUID= - -[GeneratedDocument18] -DocumentPath=Project Outputs for CB2013\CB2013.GTP -DItemRevisionGUID= - -[GeneratedDocument19] -DocumentPath=Project Outputs for CB2013\CB2013.GTS -DItemRevisionGUID= - -[GeneratedDocument20] -DocumentPath=Project Outputs for CB2013\CB2013.REP -DItemRevisionGUID= - -[GeneratedDocument21] -DocumentPath=Project Outputs for CB2013\CB2013.RUL -DItemRevisionGUID= - -[GeneratedDocument22] -DocumentPath=Project Outputs for CB2013\ConverterBoard2013.BOM -DItemRevisionGUID= - -[GeneratedDocument23] -DocumentPath=Project Outputs for CB2013\ConverterBoard2013.CSV -DItemRevisionGUID= - -[GeneratedDocument24] -DocumentPath=Project Outputs for CB2013\ConverterBoard2013.REP -DItemRevisionGUID= - -[GeneratedDocument25] -DocumentPath=Project Outputs for CB2013\Design Rule Check - CB2013.html -DItemRevisionGUID= - [Configuration1] Name=Default Configuration ParameterCount=0 diff --git a/CB2013/FEB2013.PrjPCB b/CB2013/FEB2013.PrjPCB old mode 100644 new mode 100755 index c2c9c00..cde441e --- a/CB2013/FEB2013.PrjPCB +++ b/CB2013/FEB2013.PrjPCB @@ -32,38 +32,6 @@ ReportSuppressedErrorsInMessages=0 OutputPath= [Document1] -DocumentPath=CB2013.SCHLIB -AnnotationEnabled=1 -AnnotateStartValue=1 -AnnotationIndexControlEnabled=0 -AnnotateSuffix= -AnnotateScope=All -AnnotateOrder=-1 -DoLibraryUpdate=1 -DoDatabaseUpdate=1 -ClassGenCCAutoEnabled=1 -ClassGenCCAutoRoomEnabled=1 -ClassGenNCAutoScope=None -DItemRevisionGUID= -GenerateClassCluster=0 - -[Document2] -DocumentPath=CB2013.PcbLib -AnnotationEnabled=1 -AnnotateStartValue=1 -AnnotationIndexControlEnabled=0 -AnnotateSuffix= -AnnotateScope=All -AnnotateOrder=-1 -DoLibraryUpdate=1 -DoDatabaseUpdate=1 -ClassGenCCAutoEnabled=1 -ClassGenCCAutoRoomEnabled=1 -ClassGenNCAutoScope=None -DItemRevisionGUID= -GenerateClassCluster=0 - -[Document3] DocumentPath=FrontEndBoard2013.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 @@ -79,7 +47,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document4] +[Document2] DocumentPath=FEB2013.PcbDoc AnnotationEnabled=1 AnnotateStartValue=1 @@ -95,7 +63,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document5] +[Document3] DocumentPath=FrontEndBoard2013_ChipBlock.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 @@ -111,7 +79,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document6] +[Document4] DocumentPath=FEB2013.OutJob AnnotationEnabled=1 AnnotateStartValue=1 @@ -127,7 +95,7 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[Document7] +[Document5] DocumentPath=FEB2013.Annotation AnnotationEnabled=1 AnnotateStartValue=1 @@ -143,10 +111,6 @@ ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -[GeneratedDocument1] -DocumentPath=Project Outputs for FEB2013\Design Rule Check - FEB2013.html -DItemRevisionGUID= - [Configuration1] Name=Default Configuration ParameterCount=0 diff --git a/FebPresto/FebPresto.Annotation b/FebPresto/FebPresto.Annotation new file mode 100755 index 0000000..e4a3daa --- /dev/null +++ b/FebPresto/FebPresto.Annotation @@ -0,0 +1,273 @@ +[DesignatorManager] +LogicalDesignator0=R3 +LogicalPartID0=1 +DocumentName0=FebPrestoChip.SchDoc +ChannelName0=Chip1 +UniqueID0=\MDQIBHTF\AASJFLHI +PhysicalDesignator0=R3.2 +PhysicalDesignatorLocked0=0 +LogicalDesignator1=R4 +LogicalPartID1=1 +DocumentName1=FebPrestoChip.SchDoc +ChannelName1=Chip1 +UniqueID1=\MDQIBHTF\AQFDQPPD +PhysicalDesignator1=R4.2 +PhysicalDesignatorLocked1=0 +LogicalDesignator2=R5 +LogicalPartID2=1 +DocumentName2=FebPrestoChip.SchDoc +ChannelName2=Chip1 +UniqueID2=\MDQIBHTF\BDQRWUQW +PhysicalDesignator2=R5.2 +PhysicalDesignatorLocked2=0 +LogicalDesignator3=C3 +LogicalPartID3=1 +DocumentName3=FebPrestoChip.SchDoc +ChannelName3=Chip1 +UniqueID3=\MDQIBHTF\DKINCPIT +PhysicalDesignator3=C3.2 +PhysicalDesignatorLocked3=0 +LogicalDesignator4=C7 +LogicalPartID4=1 +DocumentName4=FebPrestoChip.SchDoc +ChannelName4=Chip1 +UniqueID4=\MDQIBHTF\DNERYDPH +PhysicalDesignator4=C7.2 +PhysicalDesignatorLocked4=0 +LogicalDesignator5=R1 +LogicalPartID5=1 +DocumentName5=FebPrestoChip.SchDoc +ChannelName5=Chip1 +UniqueID5=\MDQIBHTF\EHPLCVDL +PhysicalDesignator5=R1.2 +PhysicalDesignatorLocked5=0 +LogicalDesignator6=P2 +LogicalPartID6=1 +DocumentName6=FebPrestoChip.SchDoc +ChannelName6=Chip1 +UniqueID6=\MDQIBHTF\KSDWHFMS +PhysicalDesignator6=P2.2 +PhysicalDesignatorLocked6=0 +LogicalDesignator7=R2 +LogicalPartID7=1 +DocumentName7=FebPrestoChip.SchDoc +ChannelName7=Chip1 +UniqueID7=\MDQIBHTF\PMBNEKYN +PhysicalDesignator7=R2.2 +PhysicalDesignatorLocked7=0 +LogicalDesignator8=L1 +LogicalPartID8=1 +DocumentName8=FebPrestoChip.SchDoc +ChannelName8=Chip1 +UniqueID8=\MDQIBHTF\PREFUYOI +PhysicalDesignator8=L1.2 +PhysicalDesignatorLocked8=0 +LogicalDesignator9=C6 +LogicalPartID9=1 +DocumentName9=FebPrestoChip.SchDoc +ChannelName9=Chip1 +UniqueID9=\MDQIBHTF\PWCIYPIL +PhysicalDesignator9=C6.2 +PhysicalDesignatorLocked9=0 +LogicalDesignator10=R12 +LogicalPartID10=1 +DocumentName10=FebPrestoChip.SchDoc +ChannelName10=Chip1 +UniqueID10=\MDQIBHTF\RABYOSTT +PhysicalDesignator10=R12.2 +PhysicalDesignatorLocked10=0 +LogicalDesignator11=C4 +LogicalPartID11=1 +DocumentName11=FebPrestoChip.SchDoc +ChannelName11=Chip1 +UniqueID11=\MDQIBHTF\RTFOUFFY +PhysicalDesignator11=C4.2 +PhysicalDesignatorLocked11=0 +LogicalDesignator12=C5 +LogicalPartID12=1 +DocumentName12=FebPrestoChip.SchDoc +ChannelName12=Chip1 +UniqueID12=\MDQIBHTF\ULIOXLXD +PhysicalDesignator12=C5.2 +PhysicalDesignatorLocked12=0 +LogicalDesignator13=C1 +LogicalPartID13=1 +DocumentName13=FebPrestoChip.SchDoc +ChannelName13=Chip1 +UniqueID13=\MDQIBHTF\WIAGYBOW +PhysicalDesignator13=C1.2 +PhysicalDesignatorLocked13=0 +LogicalDesignator14=R10 +LogicalPartID14=1 +DocumentName14=FebPrestoChip.SchDoc +ChannelName14=Chip1 +UniqueID14=\MDQIBHTF\WODDBTMP +PhysicalDesignator14=R10.2 +PhysicalDesignatorLocked14=0 +LogicalDesignator15=P1 +LogicalPartID15=1 +DocumentName15=FebPrestoChip.SchDoc +ChannelName15=Chip1 +UniqueID15=\MDQIBHTF\WQMRCMOC +PhysicalDesignator15=P1.2 +PhysicalDesignatorLocked15=0 +LogicalDesignator16=C2 +LogicalPartID16=1 +DocumentName16=FebPrestoChip.SchDoc +ChannelName16=Chip1 +UniqueID16=\MDQIBHTF\WWYSIJQX +PhysicalDesignator16=C2.2 +PhysicalDesignatorLocked16=0 +LogicalDesignator17=C8 +LogicalPartID17=1 +DocumentName17=FebPrestoChip.SchDoc +ChannelName17=Chip1 +UniqueID17=\MDQIBHTF\XCUHMLOD +PhysicalDesignator17=C8.2 +PhysicalDesignatorLocked17=0 +LogicalDesignator18=L2 +LogicalPartID18=1 +DocumentName18=FebPrestoChip.SchDoc +ChannelName18=Chip1 +UniqueID18=\MDQIBHTF\XHNJHHXR +PhysicalDesignator18=L2.2 +PhysicalDesignatorLocked18=0 +LogicalDesignator19=R3 +LogicalPartID19=1 +DocumentName19=FebPrestoChip.SchDoc +ChannelName19=Chip0 +UniqueID19=\SJOKBGHR\AASJFLHI +PhysicalDesignator19=R3.1 +PhysicalDesignatorLocked19=0 +LogicalDesignator20=R4 +LogicalPartID20=1 +DocumentName20=FebPrestoChip.SchDoc +ChannelName20=Chip0 +UniqueID20=\SJOKBGHR\AQFDQPPD +PhysicalDesignator20=R4.1 +PhysicalDesignatorLocked20=0 +LogicalDesignator21=R5 +LogicalPartID21=1 +DocumentName21=FebPrestoChip.SchDoc +ChannelName21=Chip0 +UniqueID21=\SJOKBGHR\BDQRWUQW +PhysicalDesignator21=R5.1 +PhysicalDesignatorLocked21=0 +LogicalDesignator22=C3 +LogicalPartID22=1 +DocumentName22=FebPrestoChip.SchDoc +ChannelName22=Chip0 +UniqueID22=\SJOKBGHR\DKINCPIT +PhysicalDesignator22=C3.1 +PhysicalDesignatorLocked22=0 +LogicalDesignator23=C7 +LogicalPartID23=1 +DocumentName23=FebPrestoChip.SchDoc +ChannelName23=Chip0 +UniqueID23=\SJOKBGHR\DNERYDPH +PhysicalDesignator23=C7.1 +PhysicalDesignatorLocked23=0 +LogicalDesignator24=R1 +LogicalPartID24=1 +DocumentName24=FebPrestoChip.SchDoc +ChannelName24=Chip0 +UniqueID24=\SJOKBGHR\EHPLCVDL +PhysicalDesignator24=R1.1 +PhysicalDesignatorLocked24=0 +LogicalDesignator25=P2 +LogicalPartID25=1 +DocumentName25=FebPrestoChip.SchDoc +ChannelName25=Chip0 +UniqueID25=\SJOKBGHR\KSDWHFMS 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+PhysicalDesignatorLocked30=0 +LogicalDesignator31=C5 +LogicalPartID31=1 +DocumentName31=FebPrestoChip.SchDoc +ChannelName31=Chip0 +UniqueID31=\SJOKBGHR\ULIOXLXD +PhysicalDesignator31=C5.1 +PhysicalDesignatorLocked31=0 +LogicalDesignator32=C1 +LogicalPartID32=1 +DocumentName32=FebPrestoChip.SchDoc +ChannelName32=Chip0 +UniqueID32=\SJOKBGHR\WIAGYBOW +PhysicalDesignator32=C1.1 +PhysicalDesignatorLocked32=0 +LogicalDesignator33=R10 +LogicalPartID33=1 +DocumentName33=FebPrestoChip.SchDoc +ChannelName33=Chip0 +UniqueID33=\SJOKBGHR\WODDBTMP +PhysicalDesignator33=R10.1 +PhysicalDesignatorLocked33=0 +LogicalDesignator34=P1 +LogicalPartID34=1 +DocumentName34=FebPrestoChip.SchDoc +ChannelName34=Chip0 +UniqueID34=\SJOKBGHR\WQMRCMOC +PhysicalDesignator34=P1.1 +PhysicalDesignatorLocked34=0 +LogicalDesignator35=C2 +LogicalPartID35=1 +DocumentName35=FebPrestoChip.SchDoc +ChannelName35=Chip0 +UniqueID35=\SJOKBGHR\WWYSIJQX +PhysicalDesignator35=C2.1 +PhysicalDesignatorLocked35=0 +LogicalDesignator36=C8 +LogicalPartID36=1 +DocumentName36=FebPrestoChip.SchDoc +ChannelName36=Chip0 +UniqueID36=\SJOKBGHR\XCUHMLOD +PhysicalDesignator36=C8.1 +PhysicalDesignatorLocked36=0 +LogicalDesignator37=L2 +LogicalPartID37=1 +DocumentName37=FebPrestoChip.SchDoc +ChannelName37=Chip0 +UniqueID37=\SJOKBGHR\XHNJHHXR +PhysicalDesignator37=L2.1 +PhysicalDesignatorLocked37=0 + +[SheetNumberManager] +SheetNumberOrder=Display Order +SheetNumberMethod=Increasing + + diff --git a/FebPresto/FebPresto.PcbDoc b/FebPresto/FebPresto.PcbDoc new file mode 100755 index 0000000..5775435 Binary files /dev/null and b/FebPresto/FebPresto.PcbDoc differ diff --git a/FebPresto/FebPresto.PrjPCB b/FebPresto/FebPresto.PrjPCB new file mode 100755 index 0000000..9253565 --- /dev/null +++ b/FebPresto/FebPresto.PrjPCB @@ -0,0 +1,1192 @@ +[Design] +Version=1.0 +HierarchyMode=4 +ChannelRoomNamingStyle=0 +LogFolderPath= +ReleasesFolder= +ReleaseVaultGUID= +ReleaseVaultName= +ChannelDesignatorFormatString=$Component.$ChannelIndex +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=1 +AllowSheetEntryNetNames=1 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Default Configuration +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=0 +PowerPortNamesTakePriority=0 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +OutputPath= + +[Document1] +DocumentPath=..\Lib\CB2013.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document2] +DocumentPath=..\Lib\CB2013.SCHLIB +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document3] +DocumentPath=FebPrestoChip.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=0 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=1 + +[Document4] +DocumentPath=FebPresto.PcbDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document5] +DocumentPath=FebPresto.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document6] +DocumentPath=FebPresto.Annotation +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Configuration1] +Name=Default Configuration +ParameterCount=0 +ConstraintFileCount=0 +ReleaseItemId= +CurrentRevision= +Variant=[No Variations] +GenerateBOM=1 +OutputJobsCount=0 + +[OutputGroup1] +Name=Netlist Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=CadnetixNetlist +OutputName1=Cadnetix Netlist +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=CalayNetlist +OutputName2=Calay Netlist +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=EDIF +OutputName3=EDIF for PCB +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=EESofNetlist +OutputName4=EESof Netlist +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +OutputType5=IntergraphNetlist +OutputName5=Intergraph Netlist +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +OutputType6=MentorBoardStationNetlist +OutputName6=Mentor BoardStation Netlist +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=MultiWire +OutputName7=MultiWire +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=OrCadPCB2Netlist +OutputName8=Orcad/PCB2 Netlist +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=PADSNetlist +OutputName9=PADS ASCII Netlist +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=Pcad +OutputName10=Pcad for PCB +OutputDocumentPath10= +OutputVariantName10= +OutputDefault10=0 +OutputType11=PCADNetlist +OutputName11=PCAD Netlist +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +OutputType12=PCADnltNetlist +OutputName12=PCADnlt Netlist +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 +OutputType13=Protel2Netlist +OutputName13=Protel2 Netlist +OutputDocumentPath13= +OutputVariantName13= +OutputDefault13=0 +OutputType14=ProtelNetlist +OutputName14=Protel +OutputDocumentPath14= +OutputVariantName14= +OutputDefault14=0 +OutputType15=RacalNetlist +OutputName15=Racal Netlist +OutputDocumentPath15= +OutputVariantName15= +OutputDefault15=0 +OutputType16=RINFNetlist +OutputName16=RINF Netlist +OutputDocumentPath16= +OutputVariantName16= +OutputDefault16=0 +OutputType17=SciCardsNetlist +OutputName17=SciCards Netlist +OutputDocumentPath17= +OutputVariantName17= +OutputDefault17=0 +OutputType18=SIMetrixNetlist +OutputName18=SIMetrix +OutputDocumentPath18= +OutputVariantName18= +OutputDefault18=0 +OutputType19=SIMPLISNetlist +OutputName19=SIMPLIS +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +OutputType20=TangoNetlist +OutputName20=Tango Netlist +OutputDocumentPath20= +OutputVariantName20= +OutputDefault20=0 +OutputType21=TelesisNetlist +OutputName21=Telesis Netlist +OutputDocumentPath21= +OutputVariantName21= +OutputDefault21=0 +OutputType22=Verilog +OutputName22=Verilog File +OutputDocumentPath22= +OutputVariantName22= +OutputDefault22=0 +OutputType23=VHDL +OutputName23=VHDL File +OutputDocumentPath23= +OutputVariantName23= +OutputDefault23=0 +OutputType24=WireListNetlist +OutputName24=WireList Netlist +OutputDocumentPath24= +OutputVariantName24= +OutputDefault24=0 +OutputType25=XSpiceNetlist +OutputName25=XSpice Netlist +OutputDocumentPath25= +OutputVariantName25= +OutputDefault25=0 + +[OutputGroup2] +Name=Simulator Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=AdvSimNetlist +OutputName1=Mixed Sim +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=SIMetrix_Sim +OutputName2=SIMetrix +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=SIMPLIS_Sim +OutputName3=SIMPLIS +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 + +[OutputGroup3] +Name=Documentation Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=Assembler Source Print +OutputName1=Assembler Source Prints +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 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+PageOptions26=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType27=Text Print +OutputName27=Text Print +OutputDocumentPath27= +OutputVariantName27= +OutputDefault27=0 +PageOptions27=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType28=Text Print +OutputName28=Text Print +OutputDocumentPath28= +OutputVariantName28= +OutputDefault28=0 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+OutputName1=Design Rules Check +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType2=Differences Report +OutputName2=Differences Report +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType3=Electrical Rules Check +OutputName3=Electrical Rules Check +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType4=Footprint Comparison Report +OutputName4=Footprint Comparison Report +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 + +[OutputGroup9] +Name=Export Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=AutoCAD dwg/dxf PCB +OutputName1=AutoCAD dwg/dxf File PCB +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=AutoCAD dwg/dxf Schematic +OutputName2=AutoCAD dwg/dxf File Schematic +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=ExportIDF +OutputName3=Export IDF +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=ExportSTEP +OutputName4=Export STEP +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 + +[Modification Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 +Type50=1 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=1 +Type57=1 +Type58=1 +Type59=1 +Type60=1 +Type61=1 +Type62=1 +Type63=1 +Type64=1 +Type65=1 +Type66=1 +Type67=1 +Type68=1 +Type69=1 +Type70=1 +Type71=1 +Type72=1 +Type73=1 +Type74=1 +Type75=1 +Type76=1 +Type77=1 +Type78=1 + +[Difference Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 + +[Electrical Rules Check] +Type1=1 +Type2=1 +Type3=2 +Type4=1 +Type5=2 +Type6=2 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=2 +Type12=2 +Type13=2 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=2 +Type26=2 +Type27=2 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=2 +Type33=2 +Type34=2 +Type35=1 +Type36=2 +Type37=1 +Type38=2 +Type39=2 +Type40=2 +Type41=0 +Type42=2 +Type43=1 +Type44=1 +Type45=2 +Type46=1 +Type47=2 +Type48=2 +Type49=1 +Type50=2 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=2 +Type57=1 +Type58=1 +Type59=0 +Type60=1 +Type61=2 +Type62=2 +Type63=1 +Type64=0 +Type65=2 +Type66=3 +Type67=2 +Type68=2 +Type69=1 +Type70=2 +Type71=2 +Type72=2 +Type73=2 +Type74=1 +Type75=2 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=2 +Type81=3 +Type82=3 +Type83=3 +Type84=3 +Type85=3 +Type86=2 +Type87=2 +Type88=2 +Type89=1 +Type90=1 +Type91=3 +Type92=3 +Type93=2 +Type94=2 +Type95=2 +Type96=2 +Type97=2 +Type98=0 +Type99=1 +Type100=2 + +[ERC Connection Matrix] +L1=NNNNNNNNNNNWNNNWW +L2=NNWNNNNWWWNWNWNWN +L3=NWEENEEEENEWNEEWN +L4=NNENNNWEENNWNENWN +L5=NNNNNNNNNNNNNNNNN +L6=NNENNNNEENNWNENWN +L7=NNEWNNWEENNWNENWN +L8=NWEENEENEEENNEENN +L9=NWEENEEEENEWNEEWW +L10=NWNNNNNENNEWNNEWN +L11=NNENNNNEEENWNENWN +L12=WWWWNWWNWWWNWWWNN +L13=NNNNNNNNNNNWNNNWW +L14=NWEENEEEENEWNEEWW +L15=NNENNNNEEENWNENWW +L16=WWWWNWWNWWWNWWWNW +L17=WNNNNNNNWNNNWWWWN + +[Annotate] +SortOrder=3 +SortLocation=0 +MatchParameter1=Comment +MatchStrictly1=1 +MatchParameter2=Library Reference +MatchStrictly2=1 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+ModelName5=FCI_62684-362100 +ModelUpdate5=1 +ModelType6=PCBLIB +ModelName6=FCI_62684-502100 +ModelUpdate6=1 +ModelType7=PCBLIB +ModelName7=FCI_62684-50X100 +ModelUpdate7=1 +ModelTypeGroup1=SI +ModelTypeUpdate1=1 +ModelType8=SI +ModelName8=Cap +ModelUpdate8=1 +ModelType9=SI +ModelName9=Inductor +ModelUpdate9=1 +ModelType10=SI +ModelName10=Res +ModelUpdate10=1 +ModelTypeGroup2=SIM +ModelTypeUpdate2=1 +ModelType11=SIM +ModelName11=INDUCTOR +ModelUpdate11=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 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