From: Jan Michel Date: Thu, 25 Aug 2016 16:34:54 +0000 (+0200) Subject: Add first part of documentation X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=f97434b74ca899e26064fb2ddfd6f43844c078b4;p=logicbox.git Add first part of documentation --- diff --git a/docu/LogicBoxConnectors.pdf b/docu/LogicBoxConnectors.pdf new file mode 100755 index 0000000..084e80c Binary files /dev/null and b/docu/LogicBoxConnectors.pdf differ diff --git a/docu/Makefile b/docu/Makefile new file mode 100644 index 0000000..fbbf3f0 --- /dev/null +++ b/docu/Makefile @@ -0,0 +1,16 @@ + +all: main clean + +pdflatex := pdflatex +bibtex8 := bibtex8 + +.PHONY: main +main: main.tex biblio.bib + $(pdflatex) main.tex + $(pdflatex) main.tex + + +.PHONY: clean +clean: + -@rm *.toc *.log *.aux *.out *.bbl *.blg + diff --git a/docu/biblio.bib b/docu/biblio.bib new file mode 100644 index 0000000..fdc8557 --- /dev/null +++ b/docu/biblio.bib @@ -0,0 +1,60 @@ +#@article{tdcBinCalibration, +# author = "R. Szplet and J. Kalisz and R. Pelka", +# title = "Nonlinearity correction of the integrated time-to-digital converter with direct coding", +# journal = "IEEE Transactions on Instrumentation and Measurement", +# volume = "46", +# pages = "449--453", +# month = "April", +# year = "1997" +#} +# +#@article{tdcWuWaveunion, +# author = "J. Wu and Z. Shi", +# title = "The 10-ps wave union TDC: Improving FPGA TDC resolution beyond its cell delay", +# year = "2008", +# journal = "Nuclear Science Symposium Conference Record, 2008 IEEE", +# month = "19-25 October", +# pages = "3440--3446" +#} +# +#@article{tdcReview, +# author = "J. Kalisz", +# title = "Review of methods for time interval measurements with picosecond resolution", +# journal = "Metrologia", +# volume = "41", +# number = "1", +# pages = "17--32", +# url = "http://iopscience.iop.org/0026-1394/41/1/004", +# year = "2004" +#} +# +#@article{tdcFaRef, +# author = "J. Song and Q. An and S. Liu", +# title = "A high-resolution time-to-digital converter implemented in field-programmable-gate-array", +# year = "2006", +# journal = "IEEE Transactions on Nuclear Science", +# volume = "53", +# number = "1", +# month = "February", +# pages = "236--241", +# url = "http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5738332" +#} +# +#@manual{tdcFpgaHb, +# title = "LatticeECP2/M family handbook", +# organization = "Lattice Semiconductor Corporation", +# note = "HB1003 Version 04.3", +# month = "March", +# year = "2009", +# url = "http://www.latticesemi.com/documents/HB1003.pdf" +#} +# +#@Misc{penschuck12, +# author = {Penschuck, Manuel}, +# title = {Development and Implementation of +#a Central Trigger System for TrbNet-based systems}, +# howpublished = {Bachelor Thesis, Uni Frankfurt}, +# year = 2012, +#} + + diff --git a/docu/main.tex b/docu/main.tex new file mode 100644 index 0000000..ecd53e6 --- /dev/null +++ b/docu/main.tex @@ -0,0 +1,178 @@ +\documentclass[11pt,a4paper,twoside]{scrartcl} %twoside + +%Einstellungen der Seitenr?nder +\usepackage[left=3.5cm,right=3cm,top=2.5cm,bottom=2.5cm,includeheadfoot]{geometry} + + +\usepackage[utf8]{inputenc} +\usepackage{amsfonts} +\usepackage[american]{babel} +\usepackage[T1]{fontenc} +\usepackage[pdftex]{graphicx} +\usepackage{pslatex} +\usepackage{array} +\usepackage{rotating} +\usepackage{multirow} +\usepackage{tabularx} +\usepackage{url} +\linespread{1.15} +\usepackage{booktabs} +\usepackage{longtable} +\usepackage{ltxtable} +\usepackage{upgreek} +\usepackage{listings} +\usepackage{scrtime} +\usepackage{lscape} +\usepackage{enumerate} +\usepackage{textcomp} +\usepackage{wrapfig} +\usepackage[caption=false]{subfig} +\usepackage{amsmath} +\usepackage{setspace} +\usepackage[update,prepend]{epstopdf} +\usepackage[table]{xcolor} +\definecolor{light-gray}{gray}{0.90} + + + +\definecolor{darkblue}{rgb}{.1,.1,.6} +\definecolor{darkgray}{rgb}{.5,.5,.5} +\usepackage[linkbordercolor={0 0 0}, + pdfborder={0 0 0}, + bookmarks, + citecolor=blue, + linkcolor=darkblue, + colorlinks=true, + urlcolor=darkblue]{hyperref} +\usepackage{cite} + +\newcolumntype{W}[1]{>{\centering\let\newline\\\arraybackslash\hspace{0pt}}m{#1}} +\newcolumntype{L}{>{\arraybackslash}X} +\newcolumntype{C}{>{\centering\arraybackslash}X} + +%%\usepackage{fancyhdr} +%%\pagestyle{headings}%{fancy} +%%\fancyhf{} +%%\fancyhead[R]{\nouppercase{\leftmark}} +%%\renewcommand{\headrulewidth}{0.5pt} +%%\fancyfoot[C]{\thepage} +%\renewcommand{\footrulewidth}{0} +%\usepackage[sort,square]{natbib} +%\usepackage{mathptmx} +%\usepackage{pslatex} +\usepackage{scrpage2} +\usepackage[toc,title]{appendix} + +\newenvironment{itemize*}% + {\begin{itemize}% + \setlength{\itemsep}{0pt}% + \setlength{\parskip}{0pt}% + \setlength{\topsep}{1pt}% + \setlength{\partopsep}{1pt}}% + {\end{itemize}} + +\newenvironment{description*}% + {\begin{description}% + \setlength{\itemsep}{0pt}% + \setlength{\parskip}{0pt}% + \setlength{\topsep}{1pt}% + \setlength{\partopsep}{1pt}}% + {\end{description}} + +\title{LogicBox User Guide} +\date{\today ~-~\thistime} +\author{Jan Michel} + + +\newcommand{\files}[1]{\texttt{#1}} +\newcommand{\signal}[1]{\textsc{#1}} +\newcommand{\genericname}[1]{\textsc{#1}} +\newcommand{\constname}[1]{\textsc{#1}} +\newcommand{\netname}[1]{\textsc{#1}} +\newcommand{\cmdname}[1]{\texttt{#1}} +\newcommand{\addr}[1]{\texttt{#1}} +\bibliographystyle{alpha} + +\usepackage{remreset} +\makeatletter\@removefromreset{footnote}{chapter}\makeatother + +\lstset { language = bash, numbers = none, breaklines=true, stringstyle=\color{black}\ttfamily } + + +\begin{document} +\newcounter{line} +\newcounter{ct} + +\maketitle + +\vspace*{\fill} +\vspace*{\fill} +\clearpage +\tableofcontents +\cleardoublepage + +% \section{Overview} +\begin{figure} + \centering + \includegraphics[width=1\textwidth]{LogicBoxConnectors.pdf} + \caption{Connectivity Overview} + \label{connectors} +\end{figure} +\clearpage +\section{Modules} +\subsection{Mainboard Simple} +The simple mainboard has two AddOn connectors, one dedicated for input modules, one for output modules only. +Power is supplied on a 2-pin connector at 4-5 V. It supports the input select switch available on some input modules +but has no further logic capability. + +\subsection{Mainboard with FPGA} +\subsection{Input: LVDS / TTL} +\begin{itemize*} +\item Input stage are SN65LVDS33 receivers, operating in a wide range of input voltages. +\item Channels 0/1 and 2/3 share one converter IC, some crosstalk is to be expected +\item Each channel can be configured for LVTTL (1k termination) or LVDS (100 Ohm termination), typically: + \begin{itemize*} + \item all LVDS or all LVTTL + \item channel 0/2 LVDS, channel 1/3 LVTTL + \end{itemize*} +\end{itemize*} + + +\subsection{Input: LEMO} +\subsection{Output: LVDS / TTL} +\subsection{Output: LEMO} +\subsection{Breakout} +AddOn with small prototyping area, but no components. Used as adapter for FPGA programming or any custom electronics. + +\section{Configurations} +There are few main configuration options: +\begin{itemize*} +\item Pure Level Converter without logic module +\item Basic logic operations, gating, inverting and similar +\item Pulse Generator +\item TDC +\end{itemize*} +\subsection{Level Converter} + +\subsection{Logic Box} + +\subsection{Pulse Generator} + +In pulse generator mode, the FPGA is loaded with a design that can produce up to 8 different pulser signals, available on both AddOn connectors. + + + + +\subsection{TDC} + +% \cleardoublepage +% \begin{appendices} +% \end{appendices} +% \cleardoublepage +% \bibliography{biblio} +\end{document} + +%%% Local Variables: +%%% mode: latex +%%% TeX-master: t +%%% End: