From: hadeshyp <hadeshyp>
Date: Wed, 23 May 2012 09:17:58 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=fc4b8a1325ec30feeed55c1b576deecba1b4c2a9;p=daqdocu.git

*** empty log message ***
---

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index fb912a3..4b9e855 100644
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -8,6 +8,7 @@
 
 
 \subsubsection{Board Identification}
+\label{Trb3BoardID}
 The TRB3 boards are equipped with 5 temperature sensors, one for each FPGA. They contain a unique ID that is used to identify each FPGA. Additionally, the peripheral FPGAs have to bits identification (endpoint ID) corresponding to their position on the board.
 This information can be read out after the first initial programming of the FPGAs.
 
@@ -69,3 +70,19 @@ The initial address set with \signal{Regio\_Init\_Address} can be chosen from th
  \item 0xF304 for a design for FPGA 4 only
 \end{itemize*}
 
+
+\subsection{Testing Procedure for New Boards}
+\begin{itemize}
+ \item Visual Inspection
+ \item Power-up - current should be around 0.25A at 48V
+ \item Check if fixes (Flash 0R) are done
+ \item Load set of configuration files (no Flash programming for FPGAs, only load design)
+ \item Check basic TrbNet functionality
+ \item Program Flash ROMs via TrbNet
+ \item Reboot Board to see if all FPGA boot from Flash
+ \item Add the five unique IDs to the \filename{serials\_trb3.db} in the cvs (see \ref{Trb3BoardID})
+ \item Add board as tested to wiki page
+\end{itemize}
+
+
+
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index 0cffb3a..b102eeb 100644
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+++ b/trb3/trb3.kilepr
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