From: hadaq <hadaq>
Date: Mon, 23 Aug 2010 16:35:24 +0000 (+0000)
Subject: spelling
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=fc7db11fe5e00e351012e8c75638ed6a7e836a76;p=daqdocu.git

spelling
---

diff --git a/cts.tex b/cts.tex
index c83bc35..42daf56 100644
--- a/cts.tex
+++ b/cts.tex
@@ -31,7 +31,7 @@ For all registers described in this subsection refer to the Fig.\ref{cts_logic}
     \begin{description}
      \item[Bit 7 -- 0] Selects the output signal for LVDS OUT(4) (the order like on the Fig.\ref{cts_logic})
       \begin{description}
-        \item 31 - 0 After one clok 
+        \item 31 - 0 After one clock 
         \item 63 - 32 After delay
         \item 95 - 64 After downscale 
         \item 127 - 96 After set width
@@ -48,7 +48,7 @@ For all registers described in this subsection refer to the Fig.\ref{cts_logic}
   \item [0xA0E0 -- 0xA0D9] Width registers
   \item [0xA0E1] LVL2 EB IP table
     \begin{description}
-     \item[Bit 15 -- 0] When writing to this register EB is chosen to be a reciver e.g. : 0x8103 then EB15,EB8,EB1 and EB0 is selected
+     \item[Bit 15 -- 0] When writing to this register EB is chosen to be a receiver e.g. : 0x8103 then EB15,EB8,EB1 and EB0 is selected
     \end{description}
   \item [0xA0E2] LVL2 - events per EB
     \begin{description}
@@ -77,7 +77,7 @@ For all registers described in this subsection refer to the Fig.\ref{cts_logic}
      \item[Bit 20] lvl1 trigger buffer busy
      \item[Bit 21] lvl1 TrbNet busy
      \item[Bit 22] lvl1 local busy
-     \item[Bit 31 -- 24] lvl1 trigger rnd code
+     \item[Bit 31 -- 24] lvl1 trigger random code
     \end{description}
 
  \item[0xA001: LVL1 information] Busy flags and current trigger number and type on LVL1 channel
@@ -99,7 +99,7 @@ For all registers described in this subsection refer to the Fig.\ref{cts_logic}
       \item[0x0] Not allowed
       \item[0x1] IDLE
       \item[0x2] Waiting for token in
-      \item[0x3] Data preperation
+      \item[0x3] Data preparation
       \item[0x4] Data sending
       \item[0x5] Data finished send
     \end{description}
@@ -173,7 +173,7 @@ For all registers described in this subsection refer to the Fig.\ref{cts_logic}
 \subsubsection{CTS Data structure}
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
-When there is trigger type which is not equal 0x9 (MDC calibration trigger sent each second) then the data from CTS contains 5 (4 for current data structure) data words.
+When there is trigger type which is not equal 0x9 (MDC calibration trigger sent each second) then the data from CTS contains 5 data words.
 When there is MDC calibration trigger CTS sends also scalers information.
 
 \begin{description}