From: Tobias Weber Date: Tue, 24 Feb 2015 13:45:16 +0000 (+0100) Subject: high active reset used in all entities and synchronous reset. X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=ff1722db2f0d2e46d2e3c1ac7c7486334316e7de;p=trb3.git high active reset used in all entities and synchronous reset. --- diff --git a/mupix/sources/MuPix3_board.vhd b/mupix/sources/MuPix3_board.vhd index fdeca4c..f93d4bf 100644 --- a/mupix/sources/MuPix3_board.vhd +++ b/mupix/sources/MuPix3_board.vhd @@ -228,7 +228,7 @@ begin -- Behavioral --Mupix 3 Chip Interface mupix_interface_1 : mupix_interface port map ( - rstn => not Reset, + rst => Reset, clk => clk, ldpix => ldpix_to_mupix, ldcol => ldcol_to_mupix, @@ -258,7 +258,7 @@ begin -- Behavioral spi_if_1 : spi_if port map ( clk => clk, - reset_n => not Reset, + reset => Reset, SLV_READ_IN => slv_read(1), SLV_WRITE_IN => slv_write(1), SLV_DATA_OUT => slv_data_rd(1*32+31 downto 1*32), @@ -273,7 +273,7 @@ begin -- Behavioral inj_gen : injection_generator port map( - rstn => not reset, + rst => reset, clk => clk, SLV_READ_IN => slv_read(2), SLV_WRITE_IN => slv_write(2), diff --git a/mupix/sources/MuPix3_interface.vhd b/mupix/sources/MuPix3_interface.vhd index bcc238b..0c7199c 100644 --- a/mupix/sources/MuPix3_interface.vhd +++ b/mupix/sources/MuPix3_interface.vhd @@ -12,7 +12,7 @@ use work.mupix_components.all; entity mupix_interface is port ( - rstn : in std_logic; + rst : in std_logic; clk : in std_logic; -- MUPIX IF ldpix : out std_logic; @@ -37,8 +37,8 @@ entity mupix_interface is trigger_ext : in std_logic; --reset signals from DAQ - timestampreset_in : in std_logic; - eventcounterreset_in : in std_logic; + timestampreset_in : in std_logic; + eventcounterreset_in : in std_logic; --TRB SlowControl SLV_READ_IN : in std_logic; @@ -57,23 +57,23 @@ end mupix_interface; architecture RTL of mupix_interface is - type ro_state_type is (reset, waiting, readman, loadpix, pulld, loadcol, readcol, hitgenerator, hitgeneratorwait,pause); + type ro_state_type is (waiting, readman, loadpix, pulld, loadcol, readcol, hitgenerator, hitgeneratorwait, pause); signal state : ro_state_type := waiting; - signal delcounter : unsigned(7 downto 0) := (others => '0'); - signal delaycounters1 : std_logic_vector(31 downto 0) := (others => '0'); - signal delaycounters2 : std_logic_vector(31 downto 0) := (others => '0'); - signal pauseregister : std_logic_vector(31 downto 0) := (others => '0'); - signal pausecounter : unsigned (31 downto 0) := (others => '0'); - signal ro_busy_int : std_logic := '0'; - signal graycount : std_logic_vector(7 downto 0) := (others => '0'); - signal eventcounter : unsigned(31 downto 0) := (others => '0'); - signal hitcounter : unsigned(10 downto 0) := (others => '0'); - signal maxNumberHits : std_logic_vector(31 downto 0) := (others => '1'); + signal delcounter : unsigned(7 downto 0) := (others => '0'); + signal delaycounters1 : std_logic_vector(31 downto 0) := (others => '0'); + signal delaycounters2 : std_logic_vector(31 downto 0) := (others => '0'); + signal pauseregister : std_logic_vector(31 downto 0) := (others => '0'); + signal pausecounter : unsigned (31 downto 0) := (others => '0'); + signal ro_busy_int : std_logic := '0'; + signal graycount : std_logic_vector(7 downto 0) := (others => '0'); + signal eventcounter : unsigned(31 downto 0) := (others => '0'); + signal hitcounter : unsigned(10 downto 0) := (others => '0'); + signal maxNumberHits : std_logic_vector(31 downto 0) := (others => '1'); signal graycounter_clkdiv_counter : std_logic_vector(31 downto 0) := (others => '0'); - signal sensor_id : std_logic_vector(31 downto 0) := (others => '0'); + signal sensor_id : std_logic_vector(31 downto 0) := (others => '0'); signal triggering : std_logic := '0'; signal busy_r : std_logic := '0'; @@ -86,15 +86,15 @@ architecture RTL of mupix_interface is signal generatetriggeredhits : std_logic := '0'; signal ngeneratehits : std_logic_vector(15 downto 0) := (others => '0'); - signal ngeneratehitscounter : unsigned(15 downto 0) := (others => '0'); - signal generatehitswaitcounter : unsigned(31 downto 0) := (others => '0'); + signal ngeneratehitscounter : unsigned(15 downto 0) := (others => '0'); + signal generatehitswaitcounter : unsigned(31 downto 0) := (others => '0'); signal gen_hit_col : std_logic_vector(5 downto 0) := (others => '0'); signal gen_hit_row : std_logic_vector(5 downto 0) := (others => '0'); signal gen_hit_time : std_logic_vector(7 downto 0) := (others => '0'); signal testoutro : std_logic_vector (31 downto 0) := (others => '0'); - + --Control Registers signal resetgraycounter : std_logic := '0'; signal roregwritten : std_logic := '0'; @@ -157,25 +157,25 @@ begin SLV_ACK_OUT <= '1'; when x"0026" => SLV_DATA_OUT <= pauseregister; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0027" => SLV_DATA_OUT <= delaycounters2; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0028" => SLV_DATA_OUT <= graycounter_clkdiv_counter; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0029" => SLV_DATA_OUT(0) <= ignorehitflag; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0030" => SLV_DATA_OUT <= testoutro; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0031" => SLV_DATA_OUT <= sensor_id; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0032" => SLV_DATA_OUT <= maxNumberHits; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when others => SLV_UNKNOWN_ADDR_OUT <= '1'; end case; @@ -198,25 +198,25 @@ begin SLV_ACK_OUT <= '1'; when x"0024" => delaycounters1 <= SLV_DATA_IN; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0026" => pauseregister <= SLV_DATA_IN; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0027" => delaycounters2 <= SLV_DATA_IN; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0028" => graycounter_clkdiv_counter <= SLV_DATA_IN; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0029" => ignorehitflag <= SLV_DATA_IN(0); - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when x"0031" => - sensor_id <= SLV_DATA_IN; + sensor_id <= SLV_DATA_IN; SLV_ACK_OUT <= '1'; when x"0032" => maxNumberHits <= SLV_DATA_IN; - SLV_ACK_OUT <= '1'; + SLV_ACK_OUT <= '1'; when others => SLV_UNKNOWN_ADDR_OUT <= '1'; end case; @@ -228,327 +228,313 @@ begin --Readout Control ----------------------------------------------------------------------------- - process(rstn, clk) + process(rst, clk) begin - if(rstn = '0') then - triggering <= '0'; - continousread <= '0'; - readnow <= '0'; - readmanual <= '0'; - reseteventcount <= '0'; - generatehit <= '0'; - generatehits <= '0'; - generatetriggeredhits <= '0'; - ngeneratehits <= (others => '0'); - elsif(clk'event and clk = '1') then - triggering <= roregister(0); - continousread <= roregister(1); - if(roregister(2) = '1' and roregwritten = '1') then - readnow <= '1'; - else - readnow <= '0'; - end if; - readmanual <= roregister(3); - if((roregister(4) = '1' and roregwritten = '1') or eventcounterreset_in = '1') then - reseteventcount <= '1'; + if(clk'event and clk = '1') then + if(rst = '1') then + triggering <= '0'; + continousread <= '0'; + readnow <= '0'; + readmanual <= '0'; + reseteventcount <= '0'; + generatehit <= '0'; + generatehits <= '0'; + generatetriggeredhits <= '0'; + ngeneratehits <= (others => '0'); else - reseteventcount <= '0'; + triggering <= roregister(0); + continousread <= roregister(1); + if(roregister(2) = '1' and roregwritten = '1') then + readnow <= '1'; + else + readnow <= '0'; + end if; + readmanual <= roregister(3); + if((roregister(4) = '1' and roregwritten = '1') or eventcounterreset_in = '1') then + reseteventcount <= '1'; + else + reseteventcount <= '0'; + end if; + if(roregister(5) = '1' and roregwritten = '1') then + generatehit <= '1'; + else + generatehit <= '0'; + end if; + generatehits <= roregister(6); + generatetriggeredhits <= roregister(8); + ngeneratehits <= roregister(31 downto 16); end if; - if(roregister(5) = '1' and roregwritten = '1') then - generatehit <= '1'; - else - generatehit <= '0'; - end if; - generatehits <= roregister(6); - generatetriggeredhits <= roregister(8); - ngeneratehits <= roregister(31 downto 16); end if; end process; - --testout_ena <= '1'; - - --testout(127 downto 64) <= testoutro(127 downto 64); - --testout(63 downto 16) <= testouttlu(63 downto 16); - --testout(15 downto 0) <= testoutro(15 downto 0); - ----------------------------------------------------------------------------- --MuPix 3/4/6 Readout Statemachine ----------------------------------------------------------------------------- - ro_statemachine : process(rstn, clk) + ro_statemachine : process(rst, clk) begin - - if(rstn = '0') then - state <= waiting; - ldpix <= '0'; - ldcol <= '0'; - rdcol <= '0'; - pulldown <= '0'; - memwren <= '0'; - ro_busy_int <= '0'; - eventcounter <= (others => '0'); - testoutro <= (others => '0'); - endofevent <= '0'; - elsif(clk'event and clk = '1') then - testoutro <= (others => '0'); - testoutro(31) <= priout; - - case state is - when reset => - testoutro(0) <= '1'; - state <= waiting; - ldpix <= '0'; - ldcol <= '0'; - rdcol <= '0'; - pulldown <= '0'; - memwren <= '0'; - ro_busy_int <= '0'; - eventcounter <= (others => '0'); - endofevent <= '0'; - when pause => - pausecounter <= pausecounter +1; - if(std_logic_vector(pausecounter) = pauseregister) then - state <= waiting; - pausecounter <= (others => '0'); - end if; - ldpix <= '0'; - ldcol <= '0'; - rdcol <= '0'; - pulldown <= '0'; - memwren <= '0'; - endofevent <= '0'; - ro_busy_int <= '0'; - when waiting => - testoutro(1) <= '1'; - memwren <= '0'; - ro_busy_int <= '0'; - endofevent <= '0'; - delcounter <= (others => '0'); - hitcounter <= (others => '0'); - eventcounter <= eventcounter; - if(reseteventcount = '1') then - eventcounter <= (others => '0'); - end if; - ldpix <= '0'; - ldcol <= '0'; - rdcol <= '0'; - pulldown <= '0'; - if(readmanual = '1') then - state <= readman; - elsif(continousread = '1' or readnow = '1' or(triggering = '1' and trigger_ext = '1' and generatetriggeredhits = '0')) then - state <= loadpix; - ldpix <= '1'; - delcounter <= unsigned(delaycounters1(7 downto 0)); - eventcounter <= eventcounter + 1; - elsif(generatetriggeredhits = '1' and trigger_ext = '1') then - state <= hitgenerator; - delcounter <= "00000100"; - eventcounter <= eventcounter + 1; - elsif(generatehit = '1' or generatehits = '1') then - state <= hitgenerator; - delcounter <= "00000100"; - eventcounter <= eventcounter + 1; - else - state <= waiting; - end if; - - when readman => - testoutro(9) <= '1'; - ro_busy_int <= '1'; - ldpix <= rocontrolbits(0); - pulldown <= rocontrolbits(1); - ldcol <= rocontrolbits(2); - rdcol <= rocontrolbits(3); - if(readmanual = '1') then - state <= readman; - else - state <= waiting; - end if; - endofevent <= '0'; - when loadpix => - ro_busy_int <= '1'; - testoutro(2) <= '1'; - ldpix <= '0'; - delcounter <= delcounter - 1; - memwren <= '0'; - state <= loadpix; - if(delcounter = "00000100") then -- write event header - memdata <= sensor_id; - memwren <= '1'; - elsif(delcounter = "0000011") then -- write event header - memdata <= "11111010101111101010101110111010"; --0xFABEABBA - memwren <= '1'; - elsif(delcounter = "00000010") then -- write event counter - memdata <= std_logic_vector(eventcounter); - memwren <= '1'; - end if; - if(delcounter = "00000000") then - state <= pulld; - pulldown <= '1'; - delcounter <= unsigned(delaycounters1(15 downto 8)); - end if; - endofevent <= '0'; - when pulld => - testoutro(3) <= '1'; - memwren <= '0'; - if unsigned(delaycounters1(15 downto 8)) = delcounter then - pulldown <= '0'; - end if; - delcounter <= delcounter - 1; - state <= pulld; - if(delcounter = "00000000") then - state <= loadcol; - ldcol <= '1'; - delcounter <= unsigned(delaycounters1(23 downto 16)); - end if; - endofevent <= '0'; - when loadcol => - testoutro(4) <= '1'; - memwren <= '0'; - if(delcounter = unsigned(delaycounters1(23 downto 16))) then - ldcol <= '0'; - end if; - delcounter <= delcounter - 1; - state <= loadcol; - endofevent <= '0'; - if(delcounter = "00000000" and priout = '1') then - state <= readcol; - rdcol <= '1'; - delcounter <= unsigned(delaycounters1(31 downto 24)); - elsif(delcounter = "00000000") then - -- end of event - memwren <= '1'; - memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF - endofevent <= '1'; - state <= pause; - end if; - when readcol => - testoutro(5) <= '1'; - if(delcounter = unsigned(delaycounters1(31 downto 24)) - unsigned(delaycounters2(15 downto 8))) then - rdcol <= '0'; - end if; - delcounter <= delcounter - 1; - memwren <= '0'; - state <= readcol; - endofevent <= '0'; - if (std_logic_vector(delcounter) = delaycounters2(23 downto 16)) then - priout_reg <= priout; - end if; - if(std_logic_vector(delcounter) = delaycounters2(31 downto 24)) then - memdata <= "111100001111" & hit_col & hit_row & hit_time; --0xF0F - memwren <= '1'; - if(ignorehitflag = '1' and (hit_col = "000000" and hit_row = "000000")) then - memwren <= '0'; + if rising_edge(clk) then + if(rst = '1') then + state <= waiting; + ldpix <= '0'; + ldcol <= '0'; + rdcol <= '0'; + pulldown <= '0'; + memwren <= '0'; + ro_busy_int <= '0'; + eventcounter <= (others => '0'); + testoutro <= (others => '0'); + endofevent <= '0'; + else + testoutro <= (others => '0'); + testoutro(31) <= priout; + + case state is + when pause => + pausecounter <= pausecounter +1; + if(std_logic_vector(pausecounter) = pauseregister) then + state <= waiting; + pausecounter <= (others => '0'); + end if; + ldpix <= '0'; + ldcol <= '0'; + rdcol <= '0'; + pulldown <= '0'; + memwren <= '0'; + endofevent <= '0'; + ro_busy_int <= '0'; + when waiting => + testoutro(1) <= '1'; + memwren <= '0'; + ro_busy_int <= '0'; + endofevent <= '0'; + delcounter <= (others => '0'); + hitcounter <= (others => '0'); + eventcounter <= eventcounter; + if(reseteventcount = '1') then + eventcounter <= (others => '0'); + end if; + ldpix <= '0'; + ldcol <= '0'; + rdcol <= '0'; + pulldown <= '0'; + if(readmanual = '1') then + state <= readman; + elsif(continousread = '1' or readnow = '1' or(triggering = '1' and trigger_ext = '1' and generatetriggeredhits = '0')) then + state <= loadpix; + ldpix <= '1'; + delcounter <= unsigned(delaycounters1(7 downto 0)); + eventcounter <= eventcounter + 1; + elsif(generatetriggeredhits = '1' and trigger_ext = '1') then + state <= hitgenerator; + delcounter <= "00000100"; + eventcounter <= eventcounter + 1; + elsif(generatehit = '1' or generatehits = '1') then + state <= hitgenerator; + delcounter <= "00000100"; + eventcounter <= eventcounter + 1; + else + state <= waiting; + end if; + + when readman => + testoutro(9) <= '1'; + ro_busy_int <= '1'; + ldpix <= rocontrolbits(0); + pulldown <= rocontrolbits(1); + ldcol <= rocontrolbits(2); + rdcol <= rocontrolbits(3); + if(readmanual = '1') then + state <= readman; + else + state <= waiting; end if; - hitcounter <= hitcounter + 1; - state <= readcol; - elsif(delcounter = "00000000" and hitcounter = unsigned(maxNumberHits(10 downto 0))) then - -- maximal number of hits reaced - -- force end of event - memwren <= '1'; - memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF - endofevent <= '1'; - state <= pause; - elsif(delcounter = "00000000" and (priout = '1' or (delaycounters2(23 downto 16) /= "00000000" and priout_reg = '1'))) then - state <= readcol; - rdcol <= '1'; - delcounter <= unsigned(delaycounters1(31 downto 24)); - elsif(delcounter = "00000000") then - state <= pulld; - pulldown <= '1'; - delcounter <= unsigned(delaycounters2(7 downto 0)); - end if; - - when hitgenerator => - ro_busy_int <= '1'; - testoutro(6) <= '1'; - state <= hitgenerator; - delcounter <= delcounter - 1; - if(delcounter = "00000100") then -- write event header - state <= hitgenerator; - memdata <= sensor_id; - memwren <= '1'; - ngeneratehitscounter <= unsigned(ngeneratehits); - generatehitswaitcounter <= unsigned(generatehitswait); - gen_hit_col <= (others => '0'); - gen_hit_row <= (others => '0'); - gen_hit_time <= (others => '0'); - endofevent <= '0'; - elsif(delcounter = "00000011") then -- write event header - state <= hitgenerator; - memdata <= "11111010101111101010101110111010"; --0xFABEABBA - memwren <= '1'; - endofevent <= '0'; - elsif(delcounter = "00000010") then -- write event counter - state <= hitgenerator; - memdata <= std_logic_vector(eventcounter); - memwren <= '1'; endofevent <= '0'; - elsif(delcounter = "00000010") then - state <= hitgenerator; - memwren <= '0'; + when loadpix => + ro_busy_int <= '1'; + testoutro(2) <= '1'; + ldpix <= '0'; + delcounter <= delcounter - 1; + memwren <= '0'; + state <= loadpix; + if(delcounter = "00000100") then -- write event header + memdata <= sensor_id; + memwren <= '1'; + elsif(delcounter = "0000011") then -- write event header + memdata <= "11111010101111101010101110111010"; --0xFABEABBA + memwren <= '1'; + elsif(delcounter = "00000010") then -- write event counter + memdata <= std_logic_vector(eventcounter); + memwren <= '1'; + end if; + if(delcounter = "00000000") then + state <= pulld; + pulldown <= '1'; + delcounter <= unsigned(delaycounters1(15 downto 8)); + end if; endofevent <= '0'; - elsif(delcounter = "00000001") then -- write trigger number - state <= hitgenerator; - memdata <= (others => '0'); --empty trigger number - memwren <= '1'; + when pulld => + testoutro(3) <= '1'; + memwren <= '0'; + if unsigned(delaycounters1(15 downto 8)) = delcounter then + pulldown <= '0'; + end if; + delcounter <= delcounter - 1; + state <= pulld; + if(delcounter = "00000000") then + state <= loadcol; + ldcol <= '1'; + delcounter <= unsigned(delaycounters1(23 downto 16)); + end if; endofevent <= '0'; - elsif(delcounter = "00000000" and ngeneratehitscounter > "0000000000000000") then - state <= hitgenerator; - delcounter <= delcounter; - ngeneratehitscounter <= ngeneratehitscounter - 1; - gen_hit_col <= std_logic_vector(unsigned(gen_hit_col) + 5); - gen_hit_row <= std_logic_vector(unsigned(gen_hit_row) + 7); - if(gen_hit_row > "10000") then - gen_hit_row <= "000000"; + when loadcol => + testoutro(4) <= '1'; + memwren <= '0'; + if(delcounter = unsigned(delaycounters1(23 downto 16))) then + ldcol <= '0'; end if; - memdata <= "111100001111" & "0" & gen_hit_col(4 downto 0) & gen_hit_row & graycount; --0xF0F - memwren <= '1'; + delcounter <= delcounter - 1; + state <= loadcol; endofevent <= '0'; - elsif(delcounter = "00000000" and ngeneratehitscounter = "0000000000000000" and generatehits = '0') then - state <= waiting; - -- end of event - memwren <= '1'; - memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF - endofevent <= '1'; - elsif(delcounter = "00000000" and ngeneratehitscounter = "0000000000000000" and generatehits = '1') then - state <= hitgeneratorwait; - -- end of event - memwren <= '1'; - memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF - endofevent <= '1'; - else - state <= hitgenerator; + if(delcounter = "00000000" and priout = '1') then + state <= readcol; + rdcol <= '1'; + delcounter <= unsigned(delaycounters1(31 downto 24)); + elsif(delcounter = "00000000") then + -- end of event + memwren <= '1'; + memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF + endofevent <= '1'; + state <= pause; + end if; + when readcol => + testoutro(5) <= '1'; + if(delcounter = unsigned(delaycounters1(31 downto 24)) - unsigned(delaycounters2(15 downto 8))) then + rdcol <= '0'; + end if; + delcounter <= delcounter - 1; memwren <= '0'; + state <= readcol; endofevent <= '0'; - end if; - - when hitgeneratorwait => - ro_busy_int <= '0'; - state <= hitgeneratorwait; - testoutro(7) <= '1'; - memwren <= '0'; - endofevent <= '0'; - generatehitswaitcounter <= generatehitswaitcounter - 1; - if(to_integer(generatehitswaitcounter) = 0)then + if (std_logic_vector(delcounter) = delaycounters2(23 downto 16)) then + priout_reg <= priout; + end if; + if(std_logic_vector(delcounter) = delaycounters2(31 downto 24)) then + memdata <= "111100001111" & hit_col & hit_row & hit_time; --0xF0F + memwren <= '1'; + if(ignorehitflag = '1' and (hit_col = "000000" and hit_row = "000000")) then + memwren <= '0'; + end if; + hitcounter <= hitcounter + 1; + state <= readcol; + elsif(delcounter = "00000000" and hitcounter = unsigned(maxNumberHits(10 downto 0))) then + -- maximal number of hits reaced + -- force end of event + memwren <= '1'; + memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF + endofevent <= '1'; + state <= pause; + elsif(delcounter = "00000000" and (priout = '1' or (delaycounters2(23 downto 16) /= "00000000" and priout_reg = '1'))) then + state <= readcol; + rdcol <= '1'; + delcounter <= unsigned(delaycounters1(31 downto 24)); + elsif(delcounter = "00000000") then + state <= pulld; + pulldown <= '1'; + delcounter <= unsigned(delaycounters2(7 downto 0)); + end if; + + when hitgenerator => + ro_busy_int <= '1'; + testoutro(6) <= '1'; state <= hitgenerator; - delcounter <= "00000100"; - eventcounter <= eventcounter + 1; - end if; - - when others => - testoutro(8) <= '1'; - state <= waiting; - endofevent <= '0'; - end case; + delcounter <= delcounter - 1; + if(delcounter = "00000100") then -- write event header + state <= hitgenerator; + memdata <= sensor_id; + memwren <= '1'; + ngeneratehitscounter <= unsigned(ngeneratehits); + generatehitswaitcounter <= unsigned(generatehitswait); + gen_hit_col <= (others => '0'); + gen_hit_row <= (others => '0'); + gen_hit_time <= (others => '0'); + endofevent <= '0'; + elsif(delcounter = "00000011") then -- write event header + state <= hitgenerator; + memdata <= "11111010101111101010101110111010"; --0xFABEABBA + memwren <= '1'; + endofevent <= '0'; + elsif(delcounter = "00000010") then -- write event counter + state <= hitgenerator; + memdata <= std_logic_vector(eventcounter); + memwren <= '1'; + endofevent <= '0'; + elsif(delcounter = "00000010") then + state <= hitgenerator; + memwren <= '0'; + endofevent <= '0'; + elsif(delcounter = "00000001") then -- write trigger number + state <= hitgenerator; + memdata <= (others => '0'); --empty trigger number + memwren <= '1'; + endofevent <= '0'; + elsif(delcounter = "00000000" and ngeneratehitscounter > "0000000000000000") then + state <= hitgenerator; + delcounter <= delcounter; + ngeneratehitscounter <= ngeneratehitscounter - 1; + gen_hit_col <= std_logic_vector(unsigned(gen_hit_col) + 5); + gen_hit_row <= std_logic_vector(unsigned(gen_hit_row) + 7); + if(gen_hit_row > "10000") then + gen_hit_row <= "000000"; + end if; + memdata <= "111100001111" & "0" & gen_hit_col(4 downto 0) & gen_hit_row & graycount; --0xF0F + memwren <= '1'; + endofevent <= '0'; + elsif(delcounter = "00000000" and ngeneratehitscounter = "0000000000000000" and generatehits = '0') then + state <= waiting; + -- end of event + memwren <= '1'; + memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF + endofevent <= '1'; + elsif(delcounter = "00000000" and ngeneratehitscounter = "0000000000000000" and generatehits = '1') then + state <= hitgeneratorwait; + -- end of event + memwren <= '1'; + memdata <= "10111110111011111011111011101111"; --0xBEEFBEEF + endofevent <= '1'; + else + state <= hitgenerator; + memwren <= '0'; + endofevent <= '0'; + end if; + + when hitgeneratorwait => + ro_busy_int <= '0'; + state <= hitgeneratorwait; + testoutro(7) <= '1'; + memwren <= '0'; + endofevent <= '0'; + generatehitswaitcounter <= generatehitswaitcounter - 1; + if(to_integer(generatehitswaitcounter) = 0)then + state <= hitgenerator; + delcounter <= "00000100"; + eventcounter <= eventcounter + 1; + end if; + + when others => + testoutro(8) <= '1'; + state <= waiting; + endofevent <= '0'; + end case; + end if; end if; end process; tsgen : - process(rstn, clk) + process(rst, clk) begin - if(rstn = '0') then + if(rst = '1') then timestamps <= (others => '0'); elsif(clk'event and clk = '1') then if(timestampcontrolbits(8) = '1') then @@ -559,18 +545,18 @@ begin end if; end process; - resetgraycounter <= not(rstn) or timestampreset_in; + resetgraycounter <= rst or timestampreset_in; grcount : Graycounter generic map( COUNTWIDTH => 8 ) port map( - clk => clk, - reset => resetgraycounter, - sync_reset => timestampcontrolbits(9), + clk => clk, + reset => resetgraycounter, + sync_reset => timestampcontrolbits(9), clk_divcounter => graycounter_clkdiv_counter(7 downto 0), - counter => graycount + counter => graycount ); diff --git a/mupix/sources/injection_generator.vhd b/mupix/sources/injection_generator.vhd index 1ebfb1e..7647659 100644 --- a/mupix/sources/injection_generator.vhd +++ b/mupix/sources/injection_generator.vhd @@ -17,7 +17,7 @@ use work.mupix_components.all; entity injection_generator is port ( - rstn : in std_logic; + rst : in std_logic; clk : in std_logic; SLV_READ_IN : in std_logic; SLV_WRITE_IN : in std_logic; @@ -49,9 +49,9 @@ architecture rtl of injection_generator is begin - process(clk, rstn) + process(clk, rst) begin - if(rstn = '0') then + if(rst = '1') then testpulse1_i <= '0'; testpulse2_i <= '0'; diff --git a/mupix/sources/mupix_components.vhd b/mupix/sources/mupix_components.vhd index 1d6a81a..03fb26b 100644 --- a/mupix/sources/mupix_components.vhd +++ b/mupix/sources/mupix_components.vhd @@ -68,7 +68,7 @@ package mupix_components is --Interface to MuPix 3/4/6 component mupix_interface port ( - rstn : in std_logic; + rst : in std_logic; clk : in std_logic; ldpix : out std_logic; ldcol : out std_logic; @@ -100,7 +100,7 @@ package mupix_components is component spi_if port ( clk : in std_logic; - reset_n : in std_logic; + reset : in std_logic; SLV_READ_IN : in std_logic; SLV_WRITE_IN : in std_logic; SLV_DATA_OUT : out std_logic_vector(31 downto 0); @@ -117,7 +117,7 @@ package mupix_components is --Injection Generator component injection_generator port ( - rstn : in std_logic; + rst : in std_logic; clk : in std_logic; SLV_READ_IN : in std_logic; SLV_WRITE_IN : in std_logic; diff --git a/mupix/sources/spi_if.vhd b/mupix/sources/spi_if.vhd index 6e4b43c..939a0fa 100644 --- a/mupix/sources/spi_if.vhd +++ b/mupix/sources/spi_if.vhd @@ -16,7 +16,7 @@ use work.mupix_components.all; entity spi_if is port( clk : in std_logic; - reset_n : in std_logic; + reset : in std_logic; SLV_READ_IN : in std_logic; SLV_WRITE_IN : in std_logic; SLV_DATA_OUT : out std_logic_vector(31 downto 0); @@ -54,10 +54,10 @@ architecture rtl of spi_if is begin - process(clk, reset_n) + process(clk, reset) begin - if(reset_n = '0') then + if(reset = '1') then ckdiv <= (others => '0'); cyclecounter <= (others => '0'); spi_data <= '0';