]>
jspc29.x-matter.uni-frankfurt.de Git - trb3sc.git/log
summary |
shortlog | log |
commit |
commitdiff |
tree
first ⋅ prev ⋅ next
Jan Michel [Wed, 6 Jul 2016 12:53:10 +0000 (14:53 +0200)]
Strange behavior of LCD entity solved
Jan Michel [Fri, 24 Jun 2016 09:30:11 +0000 (11:30 +0200)]
Some minor updates to the TRB3sc ADC AddOn design
Jan Michel [Fri, 27 May 2016 08:47:23 +0000 (10:47 +0200)]
No triple printing of par report, default for Synplify command
Jan Michel [Wed, 23 Mar 2016 12:02:51 +0000 (13:02 +0100)]
Updatine ADC AddOn with debug bus
Jan Michel [Wed, 23 Mar 2016 12:01:29 +0000 (13:01 +0100)]
Removing old Serdes I/O ports from designs
Jan Michel [Tue, 22 Mar 2016 17:45:25 +0000 (18:45 +0100)]
Add option to compile script to do report file generation in parallel
Jan Michel [Fri, 18 Mar 2016 14:36:28 +0000 (15:36 +0100)]
Update to trb3sc_tdctemplate
Jan Michel [Fri, 18 Mar 2016 14:32:55 +0000 (15:32 +0100)]
Update trb3sc tools with additional register
Your Name [Thu, 17 Mar 2016 15:09:34 +0000 (16:09 +0100)]
updated compile script
Your Name [Thu, 17 Mar 2016 12:55:29 +0000 (13:55 +0100)]
compile script extended with gbe links
Cahit [Mon, 7 Mar 2016 16:02:51 +0000 (17:02 +0100)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3sc
Cahit [Mon, 7 Mar 2016 16:02:49 +0000 (17:02 +0100)]
made project compatible with the last tdc version
Jan Michel [Mon, 29 Feb 2016 10:29:41 +0000 (11:29 +0100)]
adding jed option to compile script
Jan Michel [Thu, 7 Jan 2016 15:57:16 +0000 (16:57 +0100)]
adding latest changes to compile script and trb3sc_tools
Jan Michel [Wed, 6 Jan 2016 17:55:58 +0000 (18:55 +0100)]
fixing compile constraints only option
Jan Michel [Wed, 6 Jan 2016 17:07:38 +0000 (18:07 +0100)]
Adding flexible FPGA type to compile script
Cahit [Fri, 18 Dec 2015 10:26:24 +0000 (11:26 +0100)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3sc
Cahit [Fri, 18 Dec 2015 10:26:19 +0000 (11:26 +0100)]
updated diamond and synplify versions for the compile script
Jan Michel [Thu, 17 Dec 2015 12:31:00 +0000 (13:31 +0100)]
Adding new feature to pulser AddOn - generating multiple pulses
Jan Michel [Thu, 10 Dec 2015 16:20:13 +0000 (17:20 +0100)]
Updating TRB3sc pulsers for debug UART, disabled in most designs. Updating Pulser design with current media interface
Jan Michel [Wed, 9 Dec 2015 17:46:39 +0000 (18:46 +0100)]
Adding UART debug interface to TDC Template. I/O on HDR 9&10
Jan Michel [Tue, 8 Dec 2015 18:30:07 +0000 (19:30 +0100)]
Adding a new debugging interface via UART, included in trb3sc template.
Jan Michel [Mon, 7 Dec 2015 12:26:19 +0000 (13:26 +0100)]
changing clock manager timing again
Jan Michel [Fri, 4 Dec 2015 14:06:38 +0000 (15:06 +0100)]
Changing name of media interface for backplane master for better placement
Cahit [Thu, 3 Dec 2015 17:29:21 +0000 (18:29 +0100)]
updated constraints files
Jan Michel [Wed, 2 Dec 2015 17:57:46 +0000 (18:57 +0100)]
Adding some test signals to TDC Template design
Jan Michel [Tue, 1 Dec 2015 17:59:21 +0000 (18:59 +0100)]
Adjusting timeout for external clock detection to allow for correct selection when powering up a crate with TRB3sc.
Jan Michel [Fri, 27 Nov 2015 10:27:16 +0000 (11:27 +0100)]
Updating backplane master design, increasing region size for main media interface
Jan Michel [Fri, 27 Nov 2015 10:26:17 +0000 (11:26 +0100)]
Adding improved CS handling for LCD control.
Cahit [Fri, 6 Nov 2015 07:35:20 +0000 (08:35 +0100)]
updated constraints
Jan Michel [Tue, 3 Nov 2015 12:07:47 +0000 (13:07 +0100)]
Adding settings for (unused) trigger logic to ADC AddOn
Jan Michel [Tue, 3 Nov 2015 12:07:13 +0000 (13:07 +0100)]
4conn TDC design knows how to show its temperature on display.
Jan Michel [Tue, 3 Nov 2015 12:05:27 +0000 (13:05 +0100)]
Adding LCD information to template, changing to Diamond 3.6
Cahit [Tue, 3 Nov 2015 09:17:43 +0000 (10:17 +0100)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3sc
Cahit [Tue, 3 Nov 2015 09:17:41 +0000 (10:17 +0100)]
made project compatible with tdc_v2.2
Cahit [Tue, 3 Nov 2015 09:08:46 +0000 (10:08 +0100)]
corrected constraint name
Cahit [Tue, 3 Nov 2015 09:08:05 +0000 (10:08 +0100)]
updated compile script for editing constraints file with ringbuffer recognition
Jan Michel [Fri, 30 Oct 2015 13:35:45 +0000 (14:35 +0100)]
fix numbers of RJIO port
Jan Michel [Wed, 28 Oct 2015 13:51:16 +0000 (14:51 +0100)]
Adding input monitor and trigger generation to trb3sc_tools. Code added to most TRB3sc designs.
Jan Michel [Mon, 26 Oct 2015 17:52:05 +0000 (18:52 +0100)]
fixing compile script for errors on lxhadeb07
Jan Michel [Mon, 26 Oct 2015 17:49:37 +0000 (18:49 +0100)]
reverting to old Synplify version
Jan Michel [Thu, 22 Oct 2015 10:03:52 +0000 (12:03 +0200)]
updating ADC with gsi compile script
Jan Michel [Tue, 20 Oct 2015 11:40:38 +0000 (13:40 +0200)]
Two new options for compile script: Option to use a par guide file (-g) and specifiying the synplify binary (not needed for config_compile_gsi)
Jan Michel [Tue, 20 Oct 2015 11:37:49 +0000 (13:37 +0200)]
Adding design for ADC AddOn on TRB3sc
Jan Michel [Fri, 16 Oct 2015 16:46:42 +0000 (18:46 +0200)]
new clock input for media interface in template
Jan Michel [Fri, 16 Oct 2015 13:23:17 +0000 (15:23 +0200)]
a bit of maintenance
Jan Michel [Fri, 16 Oct 2015 13:20:38 +0000 (15:20 +0200)]
removed trb3sc_basic.lpf from compile script
Jan Michel [Fri, 16 Oct 2015 13:20:15 +0000 (15:20 +0200)]
Current status of backplane master. Mostly working, GbE readout not tested
Jan Michel [Fri, 16 Oct 2015 13:14:31 +0000 (15:14 +0200)]
adding IncludedFeatures tables to projects
Jan Michel [Fri, 16 Oct 2015 13:13:57 +0000 (15:13 +0200)]
updating TDC projects with some VHDL changes / new tools, new clock input to media interface
Jan Michel [Fri, 11 Sep 2015 11:05:40 +0000 (13:05 +0200)]
compiling padiwa project
Jan Michel [Thu, 10 Sep 2015 16:37:47 +0000 (18:37 +0200)]
adding project for padiwa TDC
Jan Michel [Thu, 13 Aug 2015 12:05:31 +0000 (14:05 +0200)]
small clean-up for backplane master.
Jan Michel [Thu, 13 Aug 2015 12:05:08 +0000 (14:05 +0200)]
Adding Michaels Flash-tool to template design
Adding option for backplane serdes to config
Jan Michel [Wed, 12 Aug 2015 09:36:20 +0000 (11:36 +0200)]
reverting TDC in template - now in tdctemplate
Jan Michel [Wed, 12 Aug 2015 09:31:41 +0000 (11:31 +0200)]
a bit of clean-up
Jan Michel [Mon, 10 Aug 2015 15:23:18 +0000 (17:23 +0200)]
new design files with tdc
Jan Michel [Mon, 10 Aug 2015 11:23:18 +0000 (13:23 +0200)]
HubAddOn seems to work using 4 SFP.
Jan Michel [Mon, 10 Aug 2015 09:29:12 +0000 (11:29 +0200)]
First files for the backplane master
Jan Michel [Fri, 7 Aug 2015 10:56:40 +0000 (12:56 +0200)]
fixing select outputs for pulser
Cahit [Thu, 6 Aug 2015 15:25:36 +0000 (17:25 +0200)]
added TDC to the design
Cahit [Thu, 6 Aug 2015 08:34:28 +0000 (10:34 +0200)]
added a template nodelist file for multi-par
Jan Michel [Thu, 6 Aug 2015 08:18:51 +0000 (10:18 +0200)]
updating template to latest version
Jan Michel [Tue, 14 Jul 2015 16:23:34 +0000 (18:23 +0200)]
no drive current for input pins
Jan Michel [Tue, 14 Jul 2015 16:22:00 +0000 (18:22 +0200)]
update to trb3sc_pulser, ADC connection
Jan Michel [Tue, 14 Jul 2015 16:21:25 +0000 (18:21 +0200)]
some further features and fixes for the pulser
Jan Michel [Tue, 14 Jul 2015 16:21:00 +0000 (18:21 +0200)]
compile-script: adding constraints-only option
Jan Michel [Tue, 7 Jul 2015 08:45:31 +0000 (10:45 +0200)]
a running pulser
Jan Michel [Fri, 3 Jul 2015 16:31:15 +0000 (18:31 +0200)]
files for the pulser addon
Jan Michel [Thu, 2 Jul 2015 10:57:24 +0000 (12:57 +0200)]
added files for pulser addon
Jan Michel [Tue, 23 Jun 2015 16:19:53 +0000 (18:19 +0200)]
adding some IO lines
Jan Michel [Tue, 23 Jun 2015 16:18:52 +0000 (18:18 +0200)]
fixed reset in reset_handler
Jan Michel [Tue, 23 Jun 2015 16:18:27 +0000 (18:18 +0200)]
prepared files for hubaddon
Jan Michel [Tue, 23 Jun 2015 15:56:23 +0000 (17:56 +0200)]
nodelist file is given by compile configuration, no symlink needed
Jan Michel [Tue, 23 Jun 2015 15:55:57 +0000 (17:55 +0200)]
new lpf for old hub addon
Jan Michel [Tue, 23 Jun 2015 09:53:57 +0000 (11:53 +0200)]
update to TRB3sc files
Cahit [Wed, 10 Jun 2015 14:23:52 +0000 (16:23 +0200)]
fixed conflict in the compile script
Cahit [Wed, 10 Jun 2015 13:47:21 +0000 (15:47 +0200)]
made minor changes in the compile script, added config file for gsi
Jan Michel [Fri, 5 Jun 2015 14:58:03 +0000 (16:58 +0200)]
update with nice wrapper for all basic tools such as uart, spi, flash, adc...
Jan Michel [Fri, 5 Jun 2015 12:40:00 +0000 (14:40 +0200)]
added proper clock handler
Jan Michel [Tue, 2 Jun 2015 15:05:21 +0000 (17:05 +0200)]
removing copy of ncd file
Jan Michel [Tue, 2 Jun 2015 14:45:34 +0000 (16:45 +0200)]
some more initial files for TRB3sc
Jan Michel [Tue, 24 Mar 2015 18:22:05 +0000 (19:22 +0100)]
first lpf and vhd-entity for trb3sc