Peter Lemmens [Thu, 16 Jan 2014 14:20:53 +0000 (15:20 +0100)]
Stable (or at least it really looks that way) but not quite synchronous
All crashes (3 sofar) of trbnet have been solved with 'trbcmd reset'.
Changes to soda:
- The source now has a tx-fifo (fixed delay) but NO rx-fifo.
- Both sides have a watchdog implemented. It checks 'got_link_ready'. If this is absent the watchdog fires and resets the rx-control fsm.
- Calibration works with: 'trbcmd w 0xf355 0xbe00 0x40000000;trbcmd w 0xf355 0xbe00 0x00000000; trbcmd r 0xf355 0xbe02'
- The client still has an rx-fifo ; this will be next to go.
Peter Lemmens [Mon, 6 Jan 2014 14:55:41 +0000 (15:55 +0100)]
Back a few steps. This is compiled including:
- several syn_keep and syn_preserve attributes to keep signal names transparent
- synthesis constraints to get more control of clock resources.
This version has BOTH transmit and receive buffers and is therefore not synchronous.
However: The source-transmiter is clocked from the GPLL.
The client-receiver is clocked from rx_full (as it should be)
The client-transmiter is clocked from rx_full (max synch. with receiver)
The source-receiver is also clocked with (source-)rx_full.
This seems to work ok. Next step is to remove the rx_fifo.
As rxiclk_ch0 is clocked with rx_full aswell, this should not make any difference.
Will try first for the source, second for the client aswell.
This should then be really synchronous, as Lattice claims that the TX-fifo has a fixed latency.
Peter Lemmens [Thu, 5 Dec 2013 06:49:04 +0000 (07:49 +0100)]
Changes to lpf constraint file (correcting paths)
Currently trying to get timing closure in CLK_GPLL_RIGHT.
For unknown reasons the compiler claims that this is NOT located on a dedicated clock-site and therefor get's excessive delay.
According to "LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide" page 10-38, Table 10-17, it is a preferred pad for feedback to the PLL.
Synthesys is complaining about undeclared clocks. Added soda_source_synconstraints.fdc. No success yet
Peter Lemmens [Wed, 23 Oct 2013 14:06:12 +0000 (16:06 +0200)]
status: trbnet working when no soda traffic (K_DLMs) interfering.
Maybe tx-control or rx-control FSM not working properly.
When no K_DLMs: disconnect can lead to trb-connectionloss; "trbcmd reset" can solve this
Soda traffic arbiter added (soda_cmd_window_generator)
Peter Lemmens [Thu, 10 Oct 2013 14:25:55 +0000 (16:25 +0200)]
tx_control replaced by special soda-version to remedy latancy problems.
Still occasional reset problems: got_link_ready_i sometimes goes low, indicating link-loss
Dedicated signal introduced for LINK_PHASE (for proper start of 8-bit tx in 16-bit interface) and
TX_DLM_INIT (early warning to tx_control state-machine; 1st byte loss is mended.
Peter Lemmens [Thu, 26 Sep 2013 08:15:31 +0000 (10:15 +0200)]
This works... now and then. Trbnet can quite reliably be started with optical link disconnected. Once working it is stable. Soda_source: SOB-faker is now clocked with recovered clock to make it async. This works nicely. Transmitted data is always correct. Client: often starts-up somehow out of phase. It receives the last 3 bytes of 4 and the 4th=0x00. Reset problem?
Peter Lemmens [Wed, 11 Sep 2013 12:40:05 +0000 (14:40 +0200)]
New ipx files constructed for serdesses. Different serdes for up an downstream
downstream: no tx-fifo for sync operation but does have rx-fifo for reply (async)
upstream: no rx-fifo for sync operation but does have tx-fifo for reply (asynx)
Clock domains now separated.
SOURCE:
tx-clock=fabric-clock (200MHz). THis is the origin of SODA/master-clock
rx-clock=fabric clock. Phase differences taken care of by rx-fifo
Peter Lemmens [Wed, 11 Sep 2013 12:28:49 +0000 (14:28 +0200)]
New ipx files constructed for serdesses. Different serdes for up an downstream
downstream: no tx-fifo for sync operation but does have rx-fifo for reply (async)
upstream: no rx-fifo for sync operation but does have tx-fifo for reply (asynx)
Clock domains now separated.
SOURCE:
tx-clock=fabric-clock (200MHz). THis is the origin of SODA/master-clock
rx-clock=fabric clock. Phase differences taken care of by rx-fifo
Peter Lemmens [Mon, 9 Sep 2013 15:39:59 +0000 (17:39 +0200)]
Cleanup commit. Obvious bugs/typo's removed
Both source and client now accessible over trbnet.
No optical comm. Fiberes swapped?? Looks like both are talking on the same channel.
Peter Lemmens [Tue, 13 Aug 2013 11:55:01 +0000 (13:55 +0200)]
soda-source written into the bus structure of trb3.
Register access is implemented making use of regIO-example (by Peter Schakel)
controlling LEDs on trb3; i.e. slowcontrol is tested here.
No more errors in Synplify so this should result in a downloadable and working firmware.
First test is access to trb with trbcmd.
ToDo next:
- design/implement/test reply-checker
- make new project for SODA-client or use conditional synthesis ("generate if")
Peter Lemmens [Thu, 25 Apr 2013 12:57:59 +0000 (14:57 +0200)]
Created new project "soda_source" because of compilation failures not understood. Compilation script had to be modified and is put into git. Compilation is currently still not finishing complete. Script still needs tuning. In Lattice Diamond many errors are generated by instantiation of trb_net16_regio_bus_handler : "formal bus_no_more_data_in associated individually was not in contiguous sequence" and such. Plan is to0 rewrite this instance so that it is contiguous and the Diamond GUI can be used.