]> jspc29.x-matter.uni-frankfurt.de Git - tdc.git/log
tdc.git
6 years agoremove log files
Jan Michel [Mon, 19 Nov 2018 10:24:40 +0000 (11:24 +0100)]
remove log files

6 years agoTDC version set to 2.4.0
Jan Michel [Mon, 19 Nov 2018 10:23:16 +0000 (11:23 +0100)]
TDC version set to 2.4.0

6 years agoTDC doesn't repeat epoch markers for each channel, only when they changed.
Jan Michel [Wed, 19 Sep 2018 11:37:02 +0000 (13:37 +0200)]
TDC doesn't repeat epoch markers for each channel, only when they changed.

6 years agoadd CDT register for trigger type
Jan Michel [Thu, 23 Aug 2018 14:37:24 +0000 (16:37 +0200)]
add CDT register for trigger type

6 years agoAdd hardware ID to TDC header. Remove unnecessary no-hit-detection
Jan Michel [Thu, 23 Aug 2018 14:36:43 +0000 (16:36 +0200)]
Add hardware ID to TDC header. Remove unnecessary no-hit-detection

6 years agomove channels 31/32 closer to their logic v2.3
Jan Michel [Thu, 16 Aug 2018 11:21:50 +0000 (13:21 +0200)]
move channels 31/32 closer to their logic

6 years agoChange stretcher output to left side, increase length for ECP5, make calibration...
Jan Michel [Thu, 16 Aug 2018 11:21:31 +0000 (13:21 +0200)]
Change stretcher output to left side, increase length for ECP5, make calibration event longer.

6 years agoupdate ADA and 4conn design with new trigger logic, update 4conn and gpin to use...
Jan Michel [Fri, 10 Aug 2018 09:54:20 +0000 (11:54 +0200)]
update ADA and 4conn design with new trigger logic, update 4conn and gpin to use trb3_tools

6 years agoupdate .gitignore
Jan Michel [Tue, 10 Jul 2018 12:19:46 +0000 (14:19 +0200)]
update .gitignore

6 years agoadd Modelsim testbench project
Jan Michel [Tue, 10 Jul 2018 12:18:54 +0000 (14:18 +0200)]
add Modelsim testbench project

6 years agocleanup of unnecessary signals
Jan Michel [Tue, 10 Jul 2018 12:18:33 +0000 (14:18 +0200)]
cleanup of unnecessary signals

6 years agochange ring buffer almost full handling - now single words are discarded
Jan Michel [Tue, 10 Jul 2018 12:18:14 +0000 (14:18 +0200)]
change ring buffer almost full handling - now single words are discarded

6 years agoadding testbench for one channel
Jan Michel [Tue, 10 Jul 2018 12:17:06 +0000 (14:17 +0200)]
adding testbench for one channel

6 years agocleaning unused signals
Jan Michel [Thu, 5 Jul 2018 08:53:22 +0000 (10:53 +0200)]
cleaning unused signals

6 years agofix placement for channels ref,31,32
Jan Michel [Wed, 4 Jul 2018 13:55:48 +0000 (15:55 +0200)]
fix placement for channels ref,31,32

6 years agoremove Latches on epoch counter register
Jan Michel [Wed, 4 Jul 2018 13:55:17 +0000 (15:55 +0200)]
remove Latches on epoch counter register

6 years agovalidate trigger must not do checks on its own
Jan Michel [Mon, 2 Jul 2018 08:43:25 +0000 (10:43 +0200)]
validate trigger must not do checks on its own

6 years agofixed missing trailer word if last channel has data
Jan Michel [Mon, 2 Jul 2018 08:42:51 +0000 (10:42 +0200)]
fixed missing trailer word if last channel has data

6 years agofix reaction to timeout of reference time, remove parallel checks on reference time
Jan Michel [Thu, 14 Jun 2018 14:53:08 +0000 (16:53 +0200)]
fix reaction to timeout of reference time, remove parallel checks on reference time

6 years agosome clean-up to signals
Jan Michel [Thu, 14 Jun 2018 14:52:17 +0000 (16:52 +0200)]
some clean-up to signals

7 years agohit_cal registered to prevent glitches
Jan Michel [Tue, 3 Apr 2018 11:52:33 +0000 (13:52 +0200)]
hit_cal registered to prevent glitches

7 years agoAdd new calibration PLL for DiRich 3
Jan Michel [Tue, 3 Apr 2018 11:52:13 +0000 (13:52 +0200)]
Add new calibration PLL for DiRich 3

7 years agore-add PLL to calibration signal generation
Jan Michel [Wed, 7 Mar 2018 12:58:21 +0000 (13:58 +0100)]
re-add PLL to calibration signal generation

7 years agoRefine calibration timing. Fix montioring inputs for ADA AddOn and NINO input scheme.
Jan Michel [Mon, 5 Mar 2018 12:40:17 +0000 (13:40 +0100)]
Refine calibration timing. Fix montioring inputs for ADA AddOn and NINO input scheme.

7 years agoRemove PLL from calibration clock source
Jan Michel [Fri, 9 Feb 2018 17:08:45 +0000 (18:08 +0100)]
Remove PLL from calibration clock source

7 years agoFix placement of logic in regions. Fix detection of length of reference time signal.
Jan Michel [Fri, 2 Feb 2018 10:48:38 +0000 (11:48 +0100)]
Fix placement of logic in regions. Fix detection of length of reference time signal.

7 years agocleanup of some code issues
Jan Michel [Mon, 22 Jan 2018 11:00:47 +0000 (12:00 +0100)]
cleanup of some code issues

7 years agoremove outdated ports from design
Jan Michel [Fri, 19 Jan 2018 18:32:53 +0000 (19:32 +0100)]
remove outdated ports from design

7 years agoall designs use Encoder_288
Jan Michel [Fri, 19 Jan 2018 18:32:44 +0000 (19:32 +0100)]
all designs use Encoder_288

7 years agoadd encoder file
Jan Michel [Thu, 11 Jan 2018 17:14:38 +0000 (18:14 +0100)]
add encoder file

7 years agoUpdate some constraints
Jan Michel [Fri, 22 Dec 2017 16:11:39 +0000 (17:11 +0100)]
Update some constraints

7 years agoAdd files from Cahit, compiles for Dirich
Jan Michel [Thu, 2 Nov 2017 17:10:36 +0000 (18:10 +0100)]
Add files from Cahit, compiles for Dirich

7 years agoadd pinout for hptdc to ADA, change clock source
Jan Michel [Mon, 23 Oct 2017 09:05:59 +0000 (11:05 +0200)]
add pinout for hptdc to ADA, change clock source

7 years agoupdate some constraints
Jan Michel [Mon, 23 Oct 2017 09:05:33 +0000 (11:05 +0200)]
update some constraints

7 years agoremove Serdes ports
Jan Michel [Thu, 28 Sep 2017 15:11:28 +0000 (17:11 +0200)]
remove Serdes ports

7 years agoadd slow control registers
Jan Michel [Thu, 28 Sep 2017 15:11:19 +0000 (17:11 +0200)]
add slow control registers

7 years agofix SPI ports on ADA AddOn
Jan Michel [Wed, 20 Sep 2017 09:57:47 +0000 (11:57 +0200)]
fix SPI ports on ADA AddOn

7 years agoregister fsm_wr_debug for better timing
Jan Michel [Tue, 8 Aug 2017 12:29:48 +0000 (14:29 +0200)]
register fsm_wr_debug for better timing

7 years agoadded rom_encoder from v2.3 to v2.3.1
Jan Michel [Tue, 8 Aug 2017 12:29:29 +0000 (14:29 +0200)]
added rom_encoder from v2.3 to v2.3.1

8 years agoadding Jan s changes
Cahit [Sun, 23 Apr 2017 21:53:11 +0000 (23:53 +0200)]
adding Jan s changes

8 years agoMerge branch 'master' of jspc29.x-matter.uni-frankfurt.de:tdc
Cahit [Sun, 23 Apr 2017 21:29:09 +0000 (23:29 +0200)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:tdc

8 years agoadded tdc_v2.3.1
Cahit [Sun, 23 Apr 2017 21:29:00 +0000 (23:29 +0200)]
added tdc_v2.3.1

8 years agoexchanged some channels for better placement in designs with <50 channels
Jan Michel [Mon, 23 Jan 2017 16:18:37 +0000 (17:18 +0100)]
exchanged some channels for better placement in designs with <50 channels

8 years agoA bit of cleanup in registers
Jan Michel [Mon, 23 Jan 2017 16:18:18 +0000 (17:18 +0100)]
A bit of cleanup in registers

8 years agoupdated constraints
Cahit [Fri, 15 Jul 2016 20:40:00 +0000 (22:40 +0200)]
updated constraints

8 years agoadded dirich top module
Cahit [Sun, 26 Jun 2016 12:06:40 +0000 (14:06 +0200)]
added dirich top module

8 years agoupdated dirich constraints
Cahit [Sun, 19 Jun 2016 16:59:47 +0000 (18:59 +0200)]
updated dirich constraints

9 years agoadding missing compile script for TDC
Jan Michel [Fri, 1 Apr 2016 08:59:55 +0000 (10:59 +0200)]
adding missing compile script for TDC

9 years agoedited top modules for record types
Cahit [Thu, 24 Mar 2016 18:00:55 +0000 (19:00 +0100)]
edited top modules for record types

9 years agochanged location of enable register for tdc chains for better placement
Cahit [Thu, 24 Mar 2016 14:01:15 +0000 (15:01 +0100)]
changed location of enable register for tdc chains for better placement

9 years agocorrected multicycle constraint
Cahit [Wed, 23 Mar 2016 16:44:40 +0000 (17:44 +0100)]
corrected multicycle constraint

9 years agoupdated encoder rom
Cahit [Wed, 23 Mar 2016 16:44:17 +0000 (17:44 +0100)]
updated encoder rom

9 years agoadded different tdc data format options
Cahit [Wed, 23 Mar 2016 16:22:09 +0000 (17:22 +0100)]
added different tdc data format options

9 years agoupdated top modules for trigger inputs
Cahit [Wed, 23 Mar 2016 16:15:05 +0000 (17:15 +0100)]
updated top modules for trigger inputs

9 years agoadded dirich constraints
Cahit [Wed, 23 Mar 2016 16:11:19 +0000 (17:11 +0100)]
added dirich constraints

9 years agoupdated constraints syntax
Cahit [Wed, 23 Mar 2016 16:10:25 +0000 (17:10 +0100)]
updated constraints syntax

9 years agoadded fifo and pll IPs for ecp5
Cahit [Wed, 23 Mar 2016 13:55:49 +0000 (14:55 +0100)]
added fifo and pll IPs for ecp5

9 years agoupdated chain module for ecp5
Cahit [Wed, 23 Mar 2016 13:30:37 +0000 (14:30 +0100)]
updated chain module for ecp5

9 years agoupdated rom encoder address map
Cahit [Fri, 11 Mar 2016 14:53:48 +0000 (15:53 +0100)]
updated rom encoder address map

9 years agoupdated release note information
Cahit [Tue, 26 Jan 2016 08:29:59 +0000 (09:29 +0100)]
updated release note information

9 years agotidied up the code
Cahit [Tue, 26 Jan 2016 08:28:02 +0000 (09:28 +0100)]
tidied up the code

9 years agoadded compile time to the data stream with the status trigger 0xE
Cahit [Tue, 26 Jan 2016 08:27:34 +0000 (09:27 +0100)]
added compile time to the data stream with the status trigger 0xE

9 years agodelayes BUS HANDLER read signal one clock cycle to match the MULTICYCLE constraint
Cahit [Tue, 26 Jan 2016 08:26:46 +0000 (09:26 +0100)]
delayes BUS HANDLER read signal one clock cycle to match the MULTICYCLE constraint

9 years agoupdated 32PinAddOn project top module with record entities
Cahit [Wed, 16 Dec 2015 13:31:31 +0000 (14:31 +0100)]
updated 32PinAddOn project top module with record entities

9 years agoadded temperature value in the data stream for status trigger (0xE). Fixed bug for...
Cahit [Thu, 10 Dec 2015 16:24:33 +0000 (17:24 +0100)]
added temperature value in the data stream for status trigger (0xE). Fixed bug for mixed triggers (0xE - 0x1).

9 years agoadded temperature value in the data stream for status trigger (0xE). Fixed bug for...
Cahit [Thu, 10 Dec 2015 16:11:19 +0000 (17:11 +0100)]
added temperature value in the data stream for status trigger (0xE). Fixed bug for mixed triggers (0xE - 0x1).

9 years agoupdated the release notes table and edited export script for new org-mode version 8
Cahit [Wed, 9 Dec 2015 10:51:29 +0000 (11:51 +0100)]
updated the release notes table and edited export script for new org-mode version 8

9 years agoadded trailer word to the data stream to mark some errors in the DAQ
Cahit [Tue, 8 Dec 2015 15:28:38 +0000 (16:28 +0100)]
added trailer word to the data stream to mark some errors in the DAQ

9 years agotidy up
Cahit [Tue, 8 Dec 2015 15:26:54 +0000 (16:26 +0100)]
tidy up

9 years agoreleased tdc_v2.3
Cahit [Mon, 7 Dec 2015 16:40:51 +0000 (17:40 +0100)]
released tdc_v2.3

9 years agoadded some more multicycle constraints to ease the placement
Cahit [Thu, 3 Dec 2015 17:30:27 +0000 (18:30 +0100)]
added some more multicycle constraints to ease the placement

9 years agoupdated constraints file
Cahit [Fri, 23 Oct 2015 09:29:16 +0000 (11:29 +0200)]
updated constraints file

9 years agofixed bug for dead channels
Cahit [Wed, 21 Oct 2015 15:38:05 +0000 (17:38 +0200)]
fixed bug for dead channels

9 years agoremoved unused file from the release
Cahit [Wed, 7 Oct 2015 14:09:34 +0000 (16:09 +0200)]
removed unused file from the release

9 years agoreleased new tdc version
Cahit [Wed, 7 Oct 2015 14:08:13 +0000 (16:08 +0200)]
released new tdc version

9 years agonew FIFO module
Cahit [Wed, 7 Oct 2015 14:07:56 +0000 (16:07 +0200)]
new FIFO module

9 years agotidy-up
Cahit [Fri, 11 Sep 2015 09:26:17 +0000 (11:26 +0200)]
tidy-up

9 years agoadded new FIFO cores
Cahit [Fri, 11 Sep 2015 09:23:52 +0000 (11:23 +0200)]
added new FIFO cores

9 years agoupdated tdc release number
Cahit [Fri, 21 Aug 2015 11:53:33 +0000 (13:53 +0200)]
updated tdc release number

9 years agofixing errors in record based files
Jan Michel [Mon, 10 Aug 2015 15:24:37 +0000 (17:24 +0200)]
fixing errors in record based files

9 years agoreleased version 2.1.6
Cahit [Thu, 6 Aug 2015 15:24:57 +0000 (17:24 +0200)]
released version 2.1.6

9 years agorelease new tdc version tdc_v2.1.5
Cahit [Tue, 23 Jun 2015 09:11:36 +0000 (11:11 +0200)]
release new tdc version tdc_v2.1.5

9 years agorelease new tdc version tdc_v2.1.5
Cahit [Tue, 23 Jun 2015 09:10:26 +0000 (11:10 +0200)]
release new tdc version tdc_v2.1.5

9 years agoupdated release notes & extended the export_table.pl script
Cahit [Thu, 18 Jun 2015 15:18:37 +0000 (17:18 +0200)]
updated release notes & extended the export_table.pl script

9 years agoAufräumen
Cahit [Wed, 17 Jun 2015 10:14:34 +0000 (12:14 +0200)]
Aufräumen

9 years agoreleased tdc_v2.1.4
Cahit [Wed, 17 Jun 2015 10:13:02 +0000 (12:13 +0200)]
released tdc_v2.1.4

10 years agoreleased tdc version 2.1.3
Cahit [Mon, 18 May 2015 12:28:12 +0000 (14:28 +0200)]
released tdc version 2.1.3

10 years agofixed the problem with the missing reference channel with trigger window
Cahit [Mon, 11 May 2015 06:58:43 +0000 (08:58 +0200)]
fixed the problem with the missing reference channel with trigger window

10 years agoadded new placement constraints for better timing performance
Cahit [Fri, 8 May 2015 12:55:51 +0000 (14:55 +0200)]
added new placement constraints for better timing performance

10 years agoadded a sync media interface to cbmtof
Cahit [Fri, 8 May 2015 12:54:37 +0000 (14:54 +0200)]
added a sync media interface to cbmtof

10 years agochanged calibration frequency to 33MHz
Cahit [Mon, 4 May 2015 05:51:45 +0000 (07:51 +0200)]
changed calibration frequency to 33MHz

10 years agovarious changes in version 2.1.2
Cahit [Mon, 27 Apr 2015 10:18:44 +0000 (12:18 +0200)]
various changes in version 2.1.2

10 years agoadded FIFOs for ecp3
Cahit [Fri, 17 Apr 2015 09:34:19 +0000 (11:34 +0200)]
added FIFOs for ecp3

10 years agoadded FIFOs for ecp3
Cahit [Fri, 17 Apr 2015 08:39:14 +0000 (10:39 +0200)]
added FIFOs for ecp3

10 years agofirst commit of the tdc repo
Cahit [Fri, 20 Mar 2015 15:54:10 +0000 (16:54 +0100)]
first commit of the tdc repo