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jspc29.x-matter.uni-frankfurt.de Git - trb3.git/log
Tobias Weber [Wed, 3 Jan 2018 14:36:55 +0000 (15:36 +0100)]
Testbench for sensor board slow control and minor bugfixes to corresponding source files.
Tobias Weber [Fri, 22 Dec 2017 12:10:18 +0000 (13:10 +0100)]
clocking for mupix through pll and ddr resources.
Tobias Weber [Fri, 22 Dec 2017 10:01:51 +0000 (11:01 +0100)]
synchronisation and clock signals.
Tobias Weber [Fri, 15 Dec 2017 11:04:28 +0000 (12:04 +0100)]
compiling version of mupix 8 slow control firmware
Tobias Weber [Wed, 13 Dec 2017 09:39:11 +0000 (10:39 +0100)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3
Tobias Weber [Wed, 13 Dec 2017 09:38:53 +0000 (10:38 +0100)]
minor changes
Tobias Weber [Mon, 27 Nov 2017 10:56:26 +0000 (11:56 +0100)]
add pause function to injection generator
Tobias Weber [Mon, 27 Nov 2017 10:37:00 +0000 (11:37 +0100)]
simple multiplexer for data fifos.
Tobias Weber [Mon, 27 Nov 2017 10:36:24 +0000 (11:36 +0100)]
add monitoring flags and counters to circular buffer.
Tobias Weber [Wed, 22 Nov 2017 09:13:00 +0000 (10:13 +0100)]
circular memory buffer.
Jan Michel [Fri, 17 Nov 2017 14:44:39 +0000 (15:44 +0100)]
Update ADA AddOn to newer TDC files
Jan Michel [Fri, 17 Nov 2017 14:44:04 +0000 (15:44 +0100)]
Update various files
Jan Michel [Fri, 17 Nov 2017 14:36:12 +0000 (15:36 +0100)]
Update CTS timestamp generator with records
Jan Michel [Fri, 17 Nov 2017 14:40:12 +0000 (15:40 +0100)]
Revert "gkorcyl gbe with configurable ip address"
reinclude CTS in CTS, correct TDC version and outdated setting
This reverts commit
e35c607b1da004b911a163c981b5c97939b97a2a .
Your Name [Fri, 17 Nov 2017 12:39:50 +0000 (13:39 +0100)]
gkorcyl gbe with configurable ip address
Tobias Weber [Fri, 10 Nov 2017 10:45:57 +0000 (11:45 +0100)]
Integrate slow control changes into Mupix8 board top-level.
Tobias Weber [Fri, 10 Nov 2017 10:38:28 +0000 (11:38 +0100)]
Mupix 8 Pixel Control. Works in Simulation.
Tobias Weber [Fri, 10 Nov 2017 10:38:07 +0000 (11:38 +0100)]
Testbenches for Mupix 8 Chip Slow Control.
Tobias Weber [Mon, 6 Nov 2017 14:31:14 +0000 (15:31 +0100)]
Injection generator for Mupix 8.
Tobias Weber [Mon, 6 Nov 2017 13:34:44 +0000 (14:34 +0100)]
correctly read back values from DACs.
Tobias Weber [Fri, 3 Nov 2017 09:24:27 +0000 (10:24 +0100)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3
Tobias Weber [Tue, 10 Oct 2017 14:17:37 +0000 (16:17 +0200)]
code for control of ads1018 ADC
Tobias Weber [Tue, 10 Oct 2017 08:47:42 +0000 (10:47 +0200)]
partial commit of initial mupix 8 source code and test benches.
Hadaq [Mon, 2 Oct 2017 14:41:53 +0000 (16:41 +0200)]
Fix CTS slow control register addresses
Jan Michel [Fri, 29 Sep 2017 08:53:37 +0000 (10:53 +0200)]
Remove wrong constraint files
Jan Michel [Tue, 26 Sep 2017 08:34:58 +0000 (10:34 +0200)]
Remove unused generics in CTS, now in config.vhd if necessary
Jan Michel [Tue, 26 Sep 2017 08:33:59 +0000 (10:33 +0200)]
slightly better handling of different port number for input logic
Tobias Weber [Fri, 22 Sep 2017 08:50:07 +0000 (10:50 +0200)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3
Tobias Weber [Fri, 22 Sep 2017 08:48:52 +0000 (10:48 +0200)]
new pixel control
Jan Michel [Wed, 20 Sep 2017 16:41:20 +0000 (18:41 +0200)]
Add option of trigger forwarding to central gbe design
Jan Michel [Wed, 20 Sep 2017 16:40:55 +0000 (18:40 +0200)]
Update ADA AddOn design for new trb3_tools and record-busses
Your Name [Mon, 18 Sep 2017 13:04:59 +0000 (15:04 +0200)]
gbe with forwarder
Your Name [Mon, 18 Sep 2017 12:42:15 +0000 (14:42 +0200)]
gbe with forwarder
Jan Michel [Mon, 11 Sep 2017 11:17:26 +0000 (13:17 +0200)]
add experimental double edge detection to monitor design
Jan Michel [Mon, 11 Sep 2017 11:16:28 +0000 (13:16 +0200)]
Update ADA AddOn with new entities, trb3_tools etc.
Tobias Weber [Thu, 31 Aug 2017 07:31:40 +0000 (09:31 +0200)]
creating new directories for Mupix6 and Mupix8 source code.
Tobias Weber [Thu, 31 Aug 2017 07:24:24 +0000 (09:24 +0200)]
Speed up slow control configuration of chip.
Tobias Weber [Wed, 23 Aug 2017 11:18:11 +0000 (13:18 +0200)]
changes to improve timing. timing reports show improved timing on before critical registers.
Tobias Weber [Tue, 22 Aug 2017 16:14:51 +0000 (18:14 +0200)]
synchronous reset
Tobias Weber [Tue, 22 Aug 2017 16:14:35 +0000 (18:14 +0200)]
multicycle for hitbus_timeout
Tobias Weber [Tue, 22 Aug 2017 10:07:26 +0000 (12:07 +0200)]
removing some warnings from synplify.
Tobias Weber [Fri, 11 Aug 2017 13:29:51 +0000 (15:29 +0200)]
use hitbus/szintillator from 100 MHz domain to increment number of seen edges counters.
Tobias Weber [Wed, 9 Aug 2017 15:20:44 +0000 (17:20 +0200)]
Rewriting the Hitbus/Latency Histogram to use external triggers for latency measurement.
Tobias Weber [Tue, 8 Aug 2017 12:26:51 +0000 (14:26 +0200)]
mod to gitignore list
Tobias Weber [Tue, 8 Aug 2017 12:26:27 +0000 (14:26 +0200)]
minor change to compile script.
Tobias Weber [Tue, 8 Aug 2017 12:25:35 +0000 (14:25 +0200)]
two procedure to generate trb register read/writes.
Tobias Weber [Tue, 8 Aug 2017 11:56:31 +0000 (13:56 +0200)]
Simulation for Mupix readout interface.
Tobias Weber [Tue, 8 Aug 2017 11:41:26 +0000 (13:41 +0200)]
separating mupix readout and hit generation state machines.
Tobias Weber [Mon, 7 Aug 2017 13:45:06 +0000 (15:45 +0200)]
Miscallenous changes. Having issues with persisting timing violations showing up every second compile.
Tobias Weber [Mon, 7 Aug 2017 12:38:22 +0000 (14:38 +0200)]
using records at mupix readout state machine.
Tobias Weber [Mon, 7 Aug 2017 11:34:42 +0000 (13:34 +0200)]
Getting back to working compilation after latest pull from master branch.
Tobias Weber [Mon, 7 Aug 2017 11:34:06 +0000 (13:34 +0200)]
introduce records to short entity declarations a bit.
Tobias Weber [Thu, 3 Aug 2017 13:19:47 +0000 (15:19 +0200)]
Bugfixing and minor code additions of existing code.
Tobias Weber [Thu, 3 Aug 2017 13:15:04 +0000 (15:15 +0200)]
Component to convert hit address to physical pixel position.
Tobias Weber [Thu, 3 Aug 2017 13:09:34 +0000 (15:09 +0200)]
Add missing signal delay component.
Jan Michel [Wed, 26 Jul 2017 16:14:04 +0000 (18:14 +0200)]
Include code for synchronous read-out and busy in CTS
Jan Michel [Wed, 26 Jul 2017 16:10:58 +0000 (18:10 +0200)]
Update compile script to current Diamond default settings
Jan Michel [Wed, 26 Jul 2017 16:09:23 +0000 (18:09 +0200)]
Finish backport of ADC AddOn from TRB3sc to TRB3, fix bug in "samples after trigger" setting
Jan Michel [Thu, 11 May 2017 11:31:26 +0000 (13:31 +0200)]
Update blank design with dummy data sender
Jan Michel [Thu, 11 May 2017 11:30:58 +0000 (13:30 +0200)]
remove large fifo option for monitoring by default. Fix registers in trigger logic
Jan Michel [Thu, 11 May 2017 11:30:07 +0000 (13:30 +0200)]
Update ADC design with newer entities, e.g. records
Jan Michel [Thu, 11 May 2017 11:29:26 +0000 (13:29 +0200)]
Update CTS configuration files and M26 module (fixed timing)
Jan Michel [Fri, 3 Feb 2017 17:42:49 +0000 (18:42 +0100)]
Add coincidence logic to trigger generation;
TRB3 blank project update
Jan Michel [Tue, 24 Jan 2017 17:35:10 +0000 (18:35 +0100)]
A bit of clean-up in the repo
Jan Michel [Mon, 28 Nov 2016 15:54:31 +0000 (16:54 +0100)]
Enable trb3 central hub without GbE again.
Jan Michel [Mon, 21 Nov 2016 13:40:48 +0000 (14:40 +0100)]
Update input statistics to be able to use external trigger
Add monitoring FPGA design, w/o read-out
Jan Michel [Fri, 18 Nov 2016 10:38:57 +0000 (11:38 +0100)]
add an optional timestamp generator module to CTS, based on external clock and reset signals.
local account [Mon, 7 Nov 2016 17:04:22 +0000 (18:04 +0100)]
munich is back, science bitch!
tidy up some files and make the compilation working.
Jan Michel [Mon, 10 Oct 2016 15:55:02 +0000 (17:55 +0200)]
add blank project file
Jan Michel [Fri, 7 Oct 2016 13:49:15 +0000 (15:49 +0200)]
Auto-answer readout in blank project
Jan Michel [Mon, 12 Sep 2016 08:27:08 +0000 (10:27 +0200)]
CTS: Pinout constraints for flexible I/O are now selected based on configuration.
Your Name [Wed, 10 Aug 2016 12:12:27 +0000 (14:12 +0200)]
update
Your Name [Wed, 10 Aug 2016 10:52:52 +0000 (12:52 +0200)]
killer ping added
Jan Michel [Wed, 27 Jul 2016 09:12:47 +0000 (11:12 +0200)]
Fix path in linkdesignfiles
Jan Michel [Mon, 25 Jul 2016 15:35:24 +0000 (17:35 +0200)]
Include M26 trigger module to CTS.
Include MBS master output sender to CTS
Your Name [Fri, 8 Jul 2016 12:46:52 +0000 (14:46 +0200)]
gbe update
Jan Michel [Fri, 24 Jun 2016 09:31:23 +0000 (11:31 +0200)]
ADC AddOn: changes to clock tree, baseline reset value writeable
Jan Michel [Fri, 17 Jun 2016 20:23:25 +0000 (22:23 +0200)]
fix compile script to include all constraints files
Jan Michel [Tue, 26 Apr 2016 14:43:59 +0000 (16:43 +0200)]
Fix fifo recognition problem.
Cahit [Thu, 31 Mar 2016 07:23:36 +0000 (09:23 +0200)]
corrected the p2t file location
Cahit [Tue, 29 Mar 2016 14:50:15 +0000 (16:50 +0200)]
Merge branch 'master' of jspc29.x-matter.uni-frankfurt.de:trb3
Cahit [Tue, 29 Mar 2016 14:50:10 +0000 (16:50 +0200)]
edited compile script for dirich project
Jan Michel [Tue, 29 Mar 2016 08:16:24 +0000 (10:16 +0200)]
Fixing compile script to run with specified synplify command
Cahit [Thu, 24 Mar 2016 18:00:15 +0000 (19:00 +0100)]
updated compile scripts for tdc_v2.3. brought all projects up-to-date with tdc_v2.3
Cahit [Thu, 24 Mar 2016 16:52:29 +0000 (17:52 +0100)]
resolved conflict
Cahit [Thu, 24 Mar 2016 14:07:33 +0000 (15:07 +0100)]
intermediate save
Cahit [Thu, 24 Mar 2016 14:00:32 +0000 (15:00 +0100)]
brought design up-to-date with tdc_v2.3
Cahit [Wed, 23 Mar 2016 13:23:59 +0000 (14:23 +0100)]
added TDC DATA FORMAT information to the config.vhd
Jan Michel [Mon, 21 Mar 2016 15:19:09 +0000 (16:19 +0100)]
Archiving alternative CTS busy signal for RIKEN setup
Jan Michel [Mon, 21 Mar 2016 15:17:53 +0000 (16:17 +0100)]
Adding multiplicity logic to trigger generator
Your Name [Thu, 17 Mar 2016 15:08:49 +0000 (16:08 +0100)]
updated linking script
Your Name [Thu, 17 Mar 2016 13:04:02 +0000 (14:04 +0100)]
added config file
Your Name [Thu, 17 Mar 2016 12:56:45 +0000 (13:56 +0100)]
added gbe cores
Your Name [Thu, 17 Mar 2016 12:51:11 +0000 (13:51 +0100)]
trb3_gbe update
Your Name [Thu, 17 Mar 2016 12:50:23 +0000 (13:50 +0100)]
trb3_gbe update
Your Name [Thu, 17 Mar 2016 12:50:12 +0000 (13:50 +0100)]
trb3_gbe update
Jan Michel [Mon, 29 Feb 2016 14:53:51 +0000 (15:53 +0100)]
Adding a new blank TRB3 project with latest endpoint.
Maier [Sun, 21 Feb 2016 17:23:22 +0000 (18:23 +0100)]
scaler update
Ludwig Maier [Sun, 21 Feb 2016 10:26:16 +0000 (11:26 +0100)]
scaler update
Cahit [Thu, 4 Feb 2016 14:57:11 +0000 (15:57 +0100)]
edited compile.pl help