From 0254b65056d981706a3538e31b06cdc8ffbeba5d Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Tue, 29 Jun 2010 08:59:19 +0000
Subject: [PATCH] *** empty log message ***

---
 lattice/scm/trb_net_fifo_16bit_bram_dualport.vhd | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lattice/scm/trb_net_fifo_16bit_bram_dualport.vhd b/lattice/scm/trb_net_fifo_16bit_bram_dualport.vhd
index 0a140ae..a11f313 100644
--- a/lattice/scm/trb_net_fifo_16bit_bram_dualport.vhd
+++ b/lattice/scm/trb_net_fifo_16bit_bram_dualport.vhd
@@ -33,10 +33,11 @@ architecture trb_net_fifo_16bit_bram_dualport_arch of trb_net_fifo_16bit_bram_du
           WrClock: in  std_logic; RdClock: in  std_logic;
           WrEn: in  std_logic; RdEn: in  std_logic; Reset: in  std_logic;
           RPReset: in  std_logic; Q: out  std_logic_vector(17 downto 0);
-          Empty: out  std_logic; Full: out  std_logic;
-          AlmostEmpty: out  std_logic; AlmostFull: out  std_logic);
+          Empty: out  std_logic; Full: out  std_logic);
   end component;
 
+  signal buf_empty_out, buf_full_out : std_logic;
+
 BEGIN
   FIFO_DP_BRAM : lattice_scm_fifo_16bit_dualport
     port map (
@@ -48,12 +49,13 @@ BEGIN
       Reset => fifo_gsr_in,
       RPReset => '0',
       Q => read_data_out,
-      Empty => empty_out,
-      Full => full_out,
-      AlmostEmpty => almost_empty_out,
-      AlmostFull => almost_full_out
+      Empty => buf_empty_out,
+      Full => buf_full_out
       );
-
+empty_out <= buf_empty_out;
+full_out  <= buf_full_out;
+almost_empty_out <= buf_empty_out;
+almost_full_out  <= buf_full_out;
 fifostatus_out <= (others => '0');
 valid_read_out <= '0';
 end architecture trb_net_fifo_16bit_bram_dualport_arch;
-- 
2.43.0