From 0450722208a81d84028a6ae8de8d8d44191d5db1 Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Thu, 10 Feb 2011 16:21:35 +0000
Subject: [PATCH] pexor added functions fpga_register_read/write_mem

---
 libtrbnet/trbnet.c | 61 +++++++++++++++++++++++++++++++++++++++++-----
 libtrbnet/trbnet.h | 24 +++++++++++++++---
 2 files changed, 75 insertions(+), 10 deletions(-)

diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c
index 9d132ca..e501589 100644
--- a/libtrbnet/trbnet.c
+++ b/libtrbnet/trbnet.c
@@ -1,4 +1,4 @@
-const char trbnet_version[] = "$Revision: 4.2 $";
+const char trbnet_version[] = "$Revision: 4.3 $";
 
 #include <stdlib.h>
 #include <signal.h>
@@ -17,7 +17,7 @@ const char trbnet_version[] = "$Revision: 4.2 $";
 
 #define PCIBAR 0
 static int pexorFileHandle  = -1;
-#define PEXOR_DEVICE_NAME "/dev/pexor-0"
+char pexor_deviceName[256] = "/dev/pexor-0";
 #endif
 
 #include <trberror.h>
@@ -1287,9 +1287,9 @@ int init_ports()
   /* Init semaphore and signal handling */
   if (init_semaphore() == -1) return -1;
   
-  pexorFileHandle = open(PEXOR_DEVICE_NAME, O_RDWR);
+  pexorFileHandle = open(pexor_deviceName, O_RDWR);
   if (pexorFileHandle < 0) {
-    fprintf(stderr, "open failed\n");
+    fprintf(stderr, "open of device '%s' failed\n", pexor_deviceName);
     trb_errno = TRB_PEXOR_OPEN;
     return -1;
   }
@@ -1804,7 +1804,7 @@ int trb_set_address(uint64_t uid,
 
   /* Build package and start transfer */
 #ifndef PEXOR
-  write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, 0xffff); /* always broadcast */
+  write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, 0xffff);  /* always broadcast */
 #endif
   write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
   write32_to_FPGA(CHANNEL_3_SENDER_DATA, NET_SETADDRESS);
@@ -1819,7 +1819,7 @@ int trb_set_address(uint64_t uid,
   write32_to_FPGA(CHANNEL_3_SENDER_CONTROL, CMD_NETADMINISTRATION);
 #else
   write32_to_FPGA(CHANNEL_3_SENDER_CONTROL,
-                  (uint32_t)trb_address << 16 | CMD_NETADMINISTRATION);
+                  0xffff0000 | CMD_NETADMINISTRATION); /* always broadcast */
 #endif
   /* DEBUG INFO */
   if (trb_debug > 0) {
@@ -2059,6 +2059,55 @@ int fpga_register_write(uint32_t reg_address, uint32_t value)
   return 0;
 }
 
+#ifdef PEXOR
+int fpga_register_read_mem(uint32_t reg_address, 
+                           uint32_t* data,
+                           unsigned int size)
+{
+  unsigned int i = 0;
+  trb_errno = TRB_NONE;
+
+  if (lockPorts(0) == -1) return -1;
+
+  /* DEBUG INFO */
+  if (trb_debug > 0) {
+    fprintf(stderr, "fpga_register_read_mem started.\n");
+  }
+
+  for (i = 0; i < size; i++) {
+    read32_from_FPGA(reg_address + i, &data[i]);
+  }
+  
+  if (unlockPorts(0) == -1) return -1;
+  
+  return 0;
+}
+
+
+int fpga_register_write_mem(uint32_t reg_address, 
+                            const uint32_t* data,
+                            unsigned int size)
+{
+  unsigned int i = 0;
+  trb_errno = TRB_NONE;
+  
+  if (lockPorts(0) == -1) return -1;
+  
+  /* DEBUG INFO */
+  if (trb_debug > 0) {
+    fprintf(stderr, "fpga_register_write_mem started.\n");
+  }
+  
+  for (i = 0; i < size; i++) {
+    write32_to_FPGA(reg_address + i, data[i]);
+  }
+  
+  if (unlockPorts(0) == -1) return -1;
+  
+  return 0;
+}
+#endif
+
 int network_reset()
 {
   trb_errno = TRB_NONE;
diff --git a/libtrbnet/trbnet.h b/libtrbnet/trbnet.h
index 78955a2..43f387c 100644
--- a/libtrbnet/trbnet.h
+++ b/libtrbnet/trbnet.h
@@ -9,6 +9,10 @@ extern const char trbnet_version[];
 extern unsigned int trb_debug;
 extern unsigned int trb_dma;
 
+#ifdef PEXOR
+extern char pexor_deviceName[256];
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -79,13 +83,25 @@ int trb_send_trigger_rich(uint8_t input,
                           uint16_t number);
 
 #ifndef PEXOR
-int fpga_register_read(uint16_t reg_address, uint32_t* value);
+int fpga_register_read(uint16_t reg_address,
+                       uint32_t* value);
 
-int fpga_register_write(uint16_t reg_address, uint32_t value);
+int fpga_register_write(uint16_t reg_address,
+                        uint32_t value);
 #else
-int fpga_register_read(uint32_t reg_address, uint32_t* value);
+int fpga_register_read(uint32_t reg_address,
+                       uint32_t* value);
+  
+int fpga_register_write(uint32_t reg_address,
+                        uint32_t value);
+
+int fpga_register_read_mem(uint32_t reg_address, 
+                           uint32_t* data,
+                           unsigned int size);
 
-int fpga_register_write(uint32_t reg_address, uint32_t value);
+int fpga_register_write_mem(uint32_t reg_address, 
+                            const uint32_t* data,
+                            unsigned int size);
 #endif
 
 int trb_fifo_flush(uint8_t channel);
-- 
2.43.0