From 09c33a15338d3bf49b3277aaa5c42d1ba2489038 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Thu, 1 Jul 2010 22:12:48 +0000 Subject: [PATCH] *** empty log message *** --- gbe_ecp2m/trb_net16_gbe_buf.vhd | 311 +----------------------------- gbe_ecp2m/trb_net16_gbe_setup.vhd | 2 +- 2 files changed, 4 insertions(+), 309 deletions(-) diff --git a/gbe_ecp2m/trb_net16_gbe_buf.vhd b/gbe_ecp2m/trb_net16_gbe_buf.vhd index 9906432..bda8c3e 100755 --- a/gbe_ecp2m/trb_net16_gbe_buf.vhd +++ b/gbe_ecp2m/trb_net16_gbe_buf.vhd @@ -190,225 +190,6 @@ attribute HGROUP : string; -- for whole architecture attribute HGROUP of trb_net16_gbe_buf : architecture is "GBE_BUF_group"; --- Interface between IPU channel and packet constructor -component trb_net16_ipu2gbe is -port( - CLK : in std_logic; - RESET : in std_logic; - --Event information coming from CTS - CTS_NUMBER_IN : in std_logic_vector (15 downto 0); - CTS_CODE_IN : in std_logic_vector (7 downto 0); - CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); - CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); - CTS_START_READOUT_IN : in std_logic; - --Information sent to CTS - --status data, equipped with DHDR - CTS_DATA_OUT : out std_logic_vector (31 downto 0); - CTS_DATAREADY_OUT : out std_logic; - CTS_READOUT_FINISHED_OUT : out std_logic; --no more data, end transfer, send TRM - CTS_READ_IN : in std_logic; - CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); - CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); - -- Data from Frontends - FEE_DATA_IN : in std_logic_vector (15 downto 0); - FEE_DATAREADY_IN : in std_logic; - FEE_READ_OUT : out std_logic; --must be high when idle, otherwise you will never get a dataready - FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); - FEE_BUSY_IN : in std_logic; - -- slow control interface - START_CONFIG_OUT : out std_logic; -- reconfigure MACs/IPs/ports/packet size - BANK_SELECT_OUT : out std_logic_vector(3 downto 0); -- configuration page address - CONFIG_DONE_IN : in std_logic; -- configuration finished - DATA_GBE_ENABLE_IN : in std_logic; -- IPU data is forwarded to GbE - DATA_IPU_ENABLE_IN : in std_logic; -- IPU data is forwarded to CTS / TRBnet - MULTI_EVT_ENABLE_IN : in std_logic; -- enable multi event packets - MAX_MESSAGE_SIZE_IN : in std_logic_vector(31 downto 0); -- the maximum size of one HadesQueue -- gk 08.04.10 - READOUT_CTR_IN : in std_logic_vector(23 downto 0); -- gk 26.04.10 - READOUT_CTR_VALID_IN : in std_logic; -- gk 26.04.10 - -- PacketConstructor interface - PC_WR_EN_OUT : out std_logic; - PC_DATA_OUT : out std_logic_vector (7 downto 0); - PC_READY_IN : in std_logic; - PC_SOS_OUT : out std_logic; - PC_EOD_OUT : out std_logic; - PC_SUB_SIZE_OUT : out std_logic_vector(31 downto 0); - PC_TRIG_NR_OUT : out std_logic_vector(31 downto 0); - PC_PADDING_OUT : out std_logic; - -- Debug - BSM_SAVE_OUT : out std_logic_vector(3 downto 0); - BSM_LOAD_OUT : out std_logic_vector(3 downto 0); - DBG_CTS_CTR_OUT : out std_logic_vector(2 downto 0); - DBG_REM_CTR_OUT : out std_logic_vector(3 downto 0); - DBG_SF_WCNT_OUT : out std_logic_vector(15 downto 0); - DBG_SF_RCNT_OUT : out std_logic_vector(16 downto 0); - DBG_SF_DATA_OUT : out std_logic_vector(15 downto 0); - DBG_SF_RD_EN_OUT : out std_logic; - DBG_SF_WR_EN_OUT : out std_logic; - DBG_SF_EMPTY_OUT : out std_logic; - DBG_SF_AEMPTY_OUT : out std_logic; - DBG_SF_FULL_OUT : out std_logic; - DBG_SF_AFULL_OUT : out std_logic; - DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; - -component ip_configurator is -port( - CLK : in std_logic; - RESET : in std_logic; - -- configuration interface - START_CONFIG_IN : in std_logic; -- start configuration run - BANK_SELECT_IN : in std_logic_vector(3 downto 0); -- selects config bank - CONFIG_DONE_OUT : out std_logic; -- configuration run ended, new values can be used - MEM_ADDR_OUT : out std_logic_vector(7 downto 0); -- address for - MEM_DATA_IN : in std_logic_vector(31 downto 0); -- data from IP memory - MEM_CLK_OUT : out std_logic; -- clock for BlockRAM - -- information for IP cores - DEST_MAC_OUT : out std_logic_vector(47 downto 0); -- destination MAC address - DEST_IP_OUT : out std_logic_vector(31 downto 0); -- destination IP address - DEST_UDP_OUT : out std_logic_vector(15 downto 0); -- destination port - SRC_MAC_OUT : out std_logic_vector(47 downto 0); -- source MAC address - SRC_IP_OUT : out std_logic_vector(31 downto 0); -- source IP address - SRC_UDP_OUT : out std_logic_vector(15 downto 0); -- source port - MTU_OUT : out std_logic_vector(15 downto 0); -- MTU size (max frame size) - -- Debug - DEBUG_OUT : out std_logic_vector(31 downto 0) -); -end component; - --- PacketConstructor for UDP packet -component trb_net16_gbe_packet_constr is -port ( - -- ports for user logic - RESET : in std_logic; - CLK : in std_logic; - PC_WR_EN_IN : in std_logic; - PC_DATA_IN : in std_logic_vector(7 downto 0); - PC_READY_OUT : out std_logic; - PC_START_OF_SUB_IN : in std_logic; - PC_END_OF_DATA_IN : in std_logic; - -- queue and subevent layer headers - PC_SUB_SIZE_IN : in std_logic_vector(31 downto 0); - PC_PADDING_IN : in std_logic; -- gk 29.03.10 - PC_DECODING_IN : in std_logic_vector(31 downto 0); - PC_EVENT_ID_IN : in std_logic_vector(31 downto 0); - PC_TRIG_NR_IN : in std_logic_vector(31 downto 0); - PC_QUEUE_DEC_IN : in std_logic_vector(31 downto 0); - PC_MAX_FRAME_SIZE_IN : in std_logic_vector(15 downto 0); - PC_DELAY_IN : in std_logic_vector(31 downto 0); -- gk 28.04.10 - -- NEW PORTS - FC_WR_EN_OUT : out std_logic; - FC_DATA_OUT : out std_logic_vector(7 downto 0); - FC_H_READY_IN : in std_logic; - FC_READY_IN : in std_logic; - FC_IP_SIZE_OUT : out std_logic_vector(15 downto 0); - FC_UDP_SIZE_OUT : out std_logic_vector(15 downto 0); - FC_IDENT_OUT : out std_logic_vector(15 downto 0); - FC_FLAGS_OFFSET_OUT : out std_logic_vector(15 downto 0); - FC_SOD_OUT : out std_logic; - FC_EOD_OUT : out std_logic; - -- debug ports - BSM_CONSTR_OUT : out std_logic_vector(3 downto 0); - BSM_LOAD_OUT : out std_logic_vector(3 downto 0); - BSM_SAVE_OUT : out std_logic_vector(3 downto 0); - DBG_SHF_EMPTY : out std_logic; - DBG_SHF_FULL : out std_logic; - DBG_SHF_WR_EN : out std_logic; - DBG_SHF_RD_EN : out std_logic; - DBG_SHF_Q : out std_logic_vector(7 downto 0); - DBG_DF_EMPTY : out std_logic; - DBG_DF_FULL : out std_logic; - DBG_DF_WR_EN : out std_logic; - DBG_DF_RD_EN : out std_logic; - DBG_DF_Q : out std_logic_vector(7 downto 0); - DBG_ALL_CTR : out std_logic_vector(4 downto 0); - DBG_SUB_CTR : out std_logic_vector(4 downto 0); - DBG_MY_CTR : out std_logic_vector(1 downto 0); - DBG_BYTES_LOADED : out std_logic_vector(15 downto 0); - DBG_SIZE_LEFT : out std_logic_vector(31 downto 0); - DBG_SUB_SIZE_TO_SAVE : out std_logic_vector(31 downto 0); - DBG_SUB_SIZE_LOADED : out std_logic_vector(31 downto 0); - DBG_SUB_BYTES_LOADED : out std_logic_vector(31 downto 0); - DBG_QUEUE_SIZE : out std_logic_vector(31 downto 0); - DBG_ACT_QUEUE_SIZE : out std_logic_vector(31 downto 0); - DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; - --- FrameConstructor for IP packets -component trb_net16_gbe_frame_constr is -port ( - -- ports for user logic - CLK : in std_logic; - RESET : in std_logic; - -- - WR_EN_IN : in std_logic; - DATA_IN : in std_logic_vector(7 downto 0); - START_OF_DATA_IN : in std_logic; - END_OF_DATA_IN : in std_logic; - IP_F_SIZE_IN : in std_logic_vector(15 downto 0); - UDP_P_SIZE_IN : in std_logic_vector(15 downto 0); -- needed for fragmentation - HEADERS_READY_OUT : out std_logic; - READY_OUT : out std_logic; - DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0); - DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0); - DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0); - SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0); - SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0); - SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0); - FRAME_TYPE_IN : in std_logic_vector(15 downto 0); - IHL_VERSION_IN : in std_logic_vector(7 downto 0); - TOS_IN : in std_logic_vector(7 downto 0); - IDENTIFICATION_IN : in std_logic_vector(15 downto 0); - FLAGS_OFFSET_IN : in std_logic_vector(15 downto 0); - TTL_IN : in std_logic_vector(7 downto 0); - PROTOCOL_IN : in std_logic_vector(7 downto 0); - -- ports for packetTransmitter - RD_CLK : in std_logic; - FT_DATA_OUT : out std_logic_vector(8 downto 0);-- gk 04.05.10 - --FT_EOD_OUT : out std_logic;-- gk 04.05.10 - FT_TX_EMPTY_OUT : out std_logic; - FT_TX_RD_EN_IN : in std_logic; - FT_START_OF_PACKET_OUT : out std_logic; - FT_TX_DONE_IN : in std_logic; - -- debug ports - BSM_CONSTR_OUT : out std_logic_vector(7 downto 0); - BSM_TRANS_OUT : out std_logic_vector(3 downto 0); - DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; - -component trb_net16_gbe_frame_trans is -port ( - CLK : in std_logic; - RESET : in std_logic; - TX_MAC_CLK : in std_logic; - TX_EMPTY_IN : in std_logic; - START_OF_PACKET_IN : in std_logic; - DATA_ENDFLAG_IN : in std_logic; -- (8) is end flag, rest is only for TSMAC - -- NEW PORTS - HADDR_OUT : out std_logic_vector(7 downto 0); - HDATA_OUT : out std_logic_vector(7 downto 0); - HCS_OUT : out std_logic; - HWRITE_OUT : out std_logic; - HREAD_OUT : out std_logic; - HREADY_IN : in std_logic; - HDATA_EN_IN : in std_logic; - TX_FIFOAVAIL_OUT : out std_logic; - TX_FIFOEOF_OUT : out std_logic; - TX_FIFOEMPTY_OUT : out std_logic; - TX_DONE_IN : in std_logic; - -- Debug - BSM_INIT_OUT : out std_logic_vector(3 downto 0); - BSM_MAC_OUT : out std_logic_vector(3 downto 0); - BSM_TRANS_OUT : out std_logic_vector(3 downto 0); - DBG_RD_DONE_OUT : out std_logic; - DBG_INIT_DONE_OUT : out std_logic; - DBG_ENABLED_OUT : out std_logic; - DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; - component tsmac3 port( --------------- clock and reset port declarations ------------------ @@ -528,54 +309,6 @@ port ( ); end component; -component trb_net16_med_ecp_sfp_gbe_8b is --- gk 28.04.10 -generic ( - USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 -); -port( - RESET : in std_logic; - GSR_N : in std_logic; - CLK_125_OUT : out std_logic; - CLK_RX_OUT : out std_logic; - CLK_TX_OUT : out std_logic; - CLK_125_TX_IN : in std_logic; -- gk 28.04.10 used when intclk - CLK_125_RX_IN : in std_logic; -- gk 28.04.10 used when intclk - --SGMII connection to frame transmitter (tsmac) - FT_TX_CLK_EN_OUT : out std_logic; - FT_RX_CLK_EN_OUT : out std_logic; - FT_COL_OUT : out std_logic; - FT_CRS_OUT : out std_logic; - FT_TXD_IN : in std_logic_vector(7 downto 0); - FT_TX_EN_IN : in std_logic; - FT_TX_ER_IN : in std_logic; - --SFP Connection - SD_RXD_P_IN : in std_logic; - SD_RXD_N_IN : in std_logic; - SD_TXD_P_OUT : out std_logic; - SD_TXD_N_OUT : out std_logic; - SD_REFCLK_P_IN : in std_logic; - SD_REFCLK_N_IN : in std_logic; - SD_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) - SD_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SD_TXDIS_OUT : out std_logic; -- SFP disable - -- Autonegotiation stuff - MR_RESET_IN : in std_logic; - MR_MODE_IN : in std_logic; - MR_ADV_ABILITY_IN : in std_logic_vector(15 downto 0); - MR_AN_LP_ABILITY_OUT : out std_logic_vector(15 downto 0); - MR_AN_PAGE_RX_OUT : out std_logic; - MR_AN_COMPLETE_OUT : out std_logic; - MR_AN_ENABLE_IN : in std_logic; - MR_RESTART_AN_IN : in std_logic; - -- Status and control port - STAT_OP : out std_logic_vector (15 downto 0); - CTRL_OP : in std_logic_vector (15 downto 0); - STAT_DEBUG : out std_logic_vector (63 downto 0); - CTRL_DEBUG : in std_logic_vector (63 downto 0) -); -end component; - component slv_mac_memory is port( CLK : in std_logic; @@ -598,45 +331,6 @@ port( ); end component; -component gbe_setup is -port( - CLK : in std_logic; - RESET : in std_logic; - - -- interface to regio bus - BUS_ADDR_IN : in std_logic_vector(7 downto 0); - BUS_DATA_IN : in std_logic_vector(31 downto 0); - BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 - BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 - BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 - BUS_ACK_OUT : out std_logic; -- gk 26.04.10 - - GBE_TRIG_NR_IN : in std_logic_vector(31 downto 0); - - -- output to gbe_buf - GBE_SUBEVENT_ID_OUT : out std_logic_vector(31 downto 0); - GBE_SUBEVENT_DEC_OUT : out std_logic_vector(31 downto 0); - GBE_QUEUE_DEC_OUT : out std_logic_vector(31 downto 0); - GBE_MAX_PACKET_OUT : out std_logic_vector(31 downto 0); - GBE_MAX_FRAME_OUT : out std_logic_vector(15 downto 0); - GBE_USE_GBE_OUT : out std_logic; - GBE_USE_TRBNET_OUT : out std_logic; - GBE_USE_MULTIEVENTS_OUT : out std_logic; - GBE_READOUT_CTR_OUT : out std_logic_vector(23 downto 0); -- gk 26.04.10 - GBE_READOUT_CTR_VALID_OUT : out std_logic; -- gk 26.04.10 - GBE_DELAY_OUT : out std_logic_vector(31 downto 0); - -- gk 01.06.10 - DBG_IPU2GBE1_IN : in std_logic_vector(31 downto 0); - DBG_IPU2GBE2_IN : in std_logic_vector(31 downto 0); - DBG_PC1_IN : in std_logic_vector(31 downto 0); - DBG_PC2_IN : in std_logic_vector(31 downto 0); - DBG_FC1_IN : in std_logic_vector(31 downto 0); - DBG_FC2_IN : in std_logic_vector(31 downto 0); - DBG_FT1_IN : in std_logic_vector(31 downto 0); - DBG_FT2_IN : in std_logic_vector(31 downto 0) -); -end component; - signal ig_bsm_save : std_logic_vector(3 downto 0); signal ig_bsm_load : std_logic_vector(3 downto 0); signal ig_cts_ctr : std_logic_vector(2 downto 0); @@ -1093,8 +787,9 @@ port map( DBG_RD_DONE_OUT => open, DBG_INIT_DONE_OUT => open, DBG_ENABLED_OUT => open, - DEBUG_OUT(31 downto 0) => open, - DEBUG_OUT(63 downto 32) => open + DEBUG_OUT => open + --DEBUG_OUT(31 downto 0) => open, + --DEBUG_OUT(63 downto 32) => open ); -- in case of real hardware, we use the IP cores for MAC and PHY, and also put a SerDes in diff --git a/gbe_ecp2m/trb_net16_gbe_setup.vhd b/gbe_ecp2m/trb_net16_gbe_setup.vhd index 03a0797..a44c796 100644 --- a/gbe_ecp2m/trb_net16_gbe_setup.vhd +++ b/gbe_ecp2m/trb_net16_gbe_setup.vhd @@ -119,7 +119,7 @@ begin use_trbnet <= '0'; use_multievents <= '0'; reset_values <= '0'; - readout_ctr <= x"ff_ffff"; -- gk 26.04.10 -- gk 07.06.10 corrected bug found by Sergey + readout_ctr <= x"00_0000"; --x"ff_ffff"; -- gk 26.04.10 -- gk 07.06.10 corrected bug found by Sergey readout_ctr_valid <= '0'; -- gk 26.04.10 delay <= x"0000_0000"; -- gk 28.04.10 -- 2.43.0