From 0c7b66d48cb7b211a7b3ad70155abcd7364987c1 Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Tue, 17 Feb 2015 17:32:58 +0100 Subject: [PATCH] Fix --- ADC/sim/adc_serializer.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ADC/sim/adc_serializer.vhd b/ADC/sim/adc_serializer.vhd index c2a1825..ee6d98a 100644 --- a/ADC/sim/adc_serializer.vhd +++ b/ADC/sim/adc_serializer.vhd @@ -26,7 +26,7 @@ begin ADC_DCO <= ddr_clock; output : process is - variable cnt : unsigned(4 downto 0); + variable cnt : unsigned(4 downto 0) := (others => '0'); begin wait until rising_edge(ddr_clock); ADC_DATA <= std_logic_vector(cnt); -- 2.43.0