From 0d6491929a749e043429e95782db3dc079f21390 Mon Sep 17 00:00:00 2001 From: Hades DAQ Date: Wed, 8 May 2013 11:26:57 +0200 Subject: [PATCH] up to trb053 --- base/addresses_trb3.db | 14 +++++++------- base/serials_trb3.db | 18 ++++++++++++++++++ .../start_test_system_internal_cts.sh | 16 ++++++++-------- 3 files changed, 33 insertions(+), 15 deletions(-) diff --git a/base/addresses_trb3.db b/base/addresses_trb3.db index fa40117..c72d0bd 100644 --- a/base/addresses_trb3.db +++ b/base/addresses_trb3.db @@ -109,8 +109,8 @@ 0x0203 29 3 0x8001 29 5 -0x0300 30 0 -0x0801 30 1 +0x0800 30 0 +0x0301 30 1 0x0302 30 2 0x0303 30 3 0x8000 30 5 @@ -244,31 +244,31 @@ 0x8000 51 5 0x0310 52 0 -0x0801 52 1 +0x0311 52 1 0x0312 52 2 0x0313 52 3 0x8000 52 5 0x0310 53 0 -0x0801 53 1 +0x0311 53 1 0x0312 53 2 0x0313 53 3 0x8000 53 5 0x0310 54 0 -0x0801 54 1 +0x0311 54 1 0x0312 54 2 0x0313 54 3 0x8000 54 5 0x0310 55 0 -0x0801 55 1 +0x0311 55 1 0x0312 55 2 0x0313 55 3 0x8000 55 5 0x0310 56 0 -0x0801 56 1 +0x0311 56 1 0x0312 56 2 0x0313 56 3 0x8000 56 5 diff --git a/base/serials_trb3.db b/base/serials_trb3.db index e5bbb33..00a0347 100644 --- a/base/serials_trb3.db +++ b/base/serials_trb3.db @@ -304,3 +304,21 @@ 0503 0x500000039018c928 0505 0x740000039018c628 + 0510 0x330000046efac628 + 0511 0x6a0000046efac528 + 0512 0x510000046efaae28 + 0513 0x8f0000046efab928 + 0515 0xd60000046efaba28 + + 0520 0x6f0000046efa6628 + 0521 0x8b0000046efa9f28 + 0522 0x580000046efa6728 + 0523 0x850000046efae628 + 0525 0xbc0000046efa9e28 + + 0530 0x3d0000046efce928 + 0531 0x9a0000046f47c128 + 0532 0x2d0000046f339428 + 0533 0x1a0000046f339528 + 0535 0xfd0000046f32e328 + diff --git a/users/gsi_ee_lab_kp1pc105/start_test_system_internal_cts.sh b/users/gsi_ee_lab_kp1pc105/start_test_system_internal_cts.sh index b412551..175c0fe 100755 --- a/users/gsi_ee_lab_kp1pc105/start_test_system_internal_cts.sh +++ b/users/gsi_ee_lab_kp1pc105/start_test_system_internal_cts.sh @@ -7,16 +7,16 @@ merge_serial_address.pl ~/trbsoft/daqtools/base/serials_trb3.db ~/trbsoft/daqtoo # setup tdcs on TRB3 #trbcmd w 0xfe48 0xc0 0x00000001 ## logic analyser control register -trbcmd w 0xfe48 0xc1 0x000f0005 ## trigger window enable & trigger window width -trbcmd w 0xfe48 0xc2 0x0000000f ## channel 01-31 enable -trbcmd w 0xfe48 0xc3 0x00000000 ## channel 32-63 enable +#trbcmd w 0xfe48 0xc1 0x000f0005 ## trigger window enable & trigger window width +#trbcmd w 0xfe48 0xc2 0x0000000f ## channel 01-31 enable +#trbcmd w 0xfe48 0xc3 0x00000000 ## channel 32-63 enable # setup tdc on TRB3 for designs after 20130320 -#trbcmd w 0xfe48 0xc800 0x00000001 ## logic analyser control register -#trbcmd w 0xfe48 0xc801 0x000f0005 ## trigger window enable & trigger window width -#trbcmd w 0xfe48 0xc802 0x0000000f ## channel 01-31 enable -#trbcmd w 0xfe48 0xc803 0x00000000 ## channel 32-63 enable -#trbcmd w 0xfe48 0xc804 0x00000080 ## data transfer limit +trbcmd w 0xfe48 0xc800 0x00000001 ## logic analyser control register +trbcmd w 0xfe48 0xc801 0x000f0005 ## trigger window enable & trigger window width +trbcmd w 0xfe48 0xc802 0x0000000f ## channel 01-31 enable +trbcmd w 0xfe48 0xc803 0x00000000 ## channel 32-63 enable +trbcmd w 0xfe48 0xc804 0x00000080 ## data transfer limit trbcmd w 0x8000 0xa137 0xfffff # set pulser #1 in CTS to 95Hz -- 2.43.0