From 1299503a76c13bddc229d69edea6496efdd4c116 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Wed, 9 Dec 2015 18:46:39 +0100 Subject: [PATCH] Adding UART debug interface to TDC Template. I/O on HDR 9&10 --- tdctemplate/config.vhd | 1 + tdctemplate/config_compile_frankfurt.pl | 6 +++--- tdctemplate/par.p2t | 4 ++-- tdctemplate/trb3sc_tdctemplate.prj | 1 + tdctemplate/trb3sc_tdctemplate.vhd | 17 ++++++++++------- template/trb3sc_basic.vhd | 4 ++-- 6 files changed, 19 insertions(+), 14 deletions(-) diff --git a/tdctemplate/config.vhd b/tdctemplate/config.vhd index ae25d2d..18d96af 100644 --- a/tdctemplate/config.vhd +++ b/tdctemplate/config.vhd @@ -41,6 +41,7 @@ package config is constant INCLUDE_UART : integer := c_YES; constant INCLUDE_SPI : integer := c_YES; constant INCLUDE_LCD : integer := c_YES; + constant INCLUDE_DEBUG_INTERFACE: integer := c_YES; --input monitor and trigger generation logic constant INCLUDE_TRIGGER_LOGIC : integer := c_YES; diff --git a/tdctemplate/config_compile_frankfurt.pl b/tdctemplate/config_compile_frankfurt.pl index 35eaff7..993c40c 100644 --- a/tdctemplate/config_compile_frankfurt.pl +++ b/tdctemplate/config_compile_frankfurt.pl @@ -2,12 +2,12 @@ TOPNAME => "trb3sc_tdctemplate", lm_license_file_for_synplify => "1702\@hadeb05.gsi.de", #"27000\@lxcad01.gsi.de"; lm_license_file_for_par => "1702\@hadeb05.gsi.de", lattice_path => '/d/jspc29/lattice/diamond/3.6_x64', -synplify_path => '/d/jspc29/lattice/synplify/J-2014.09-SP2/', +synplify_path => '/d/jspc29/lattice/synplify/K-2015.09/', synplify_command => "/d/jspc29/lattice/diamond/3.6_x64/bin/lin64/synpwrap -fg -options", #synplify_command => "/d/jspc29/lattice/synplify/J-2014.09-SP2/bin/synplify_premier_dp", +#synplify_command => "ssh -p 59222 jmichel\@cerberus \"cd /home/jmichel/git/trb3sc/tdctemplate/workdir; LM_LICENSE_FILE=27000\@lxcad01.gsi.de /opt/synplicity/K-2015.09/bin/synplify_premier_dp -batch ../trb3sc_tdctemplate.prj\" #", -nodelist_file => 'nodelist_frankfurt.txt', - +nodelist_file => 'nodes_frankfurt.txt', #Include only necessary lpf files #pinout_file => '', #name of pin-out file, if not equal TOPNAME diff --git a/tdctemplate/par.p2t b/tdctemplate/par.p2t index 39a0684..e202e18 100644 --- a/tdctemplate/par.p2t +++ b/tdctemplate/par.p2t @@ -1,10 +1,10 @@ -w -i 15 -l 5 --n 1 +#-n 1 -y -s 12 --t 1 +-t 8 -c 1 -e 2 #-g guidefile.ncd diff --git a/tdctemplate/trb3sc_tdctemplate.prj b/tdctemplate/trb3sc_tdctemplate.prj index 7df50ac..15af918 100644 --- a/tdctemplate/trb3sc_tdctemplate.prj +++ b/tdctemplate/trb3sc_tdctemplate.prj @@ -109,6 +109,7 @@ add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" +add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_trans.vhd" diff --git a/tdctemplate/trb3sc_tdctemplate.vhd b/tdctemplate/trb3sc_tdctemplate.vhd index f92a939..e2e16eb 100644 --- a/tdctemplate/trb3sc_tdctemplate.vhd +++ b/tdctemplate/trb3sc_tdctemplate.vhd @@ -132,8 +132,8 @@ architecture trb3sc_arch of trb3sc_tdctemplate is signal readout_rx : READOUT_RX; signal readout_tx : readout_tx_array_t(0 to 0); - signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx, bustdc_rx, bus_master_out, handlerbus_rx : CTRLBUS_RX; - signal ctrlbus_tx, bussci_tx, bustools_tx, bustc_tx, bustdc_tx, bus_master_in : CTRLBUS_TX; + signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx, bustdc_rx, bus_master_out : CTRLBUS_RX; + signal ctrlbus_tx, bussci_tx, bustools_tx, bustc_tx, bustdc_tx, bus_master_in : CTRLBUS_TX; signal common_stat_reg : std_logic_vector(std_COMSTATREG*32-1 downto 0) := (others => '0'); signal common_ctrl_reg : std_logic_vector(std_COMCTRLREG*32-1 downto 0); @@ -281,6 +281,9 @@ begin REGIO_COMMON_CTRL_REG_OUT => common_ctrl_reg, --0x20 BUS_RX => ctrlbus_rx, BUS_TX => ctrlbus_tx, + BUS_MASTER_IN => bus_master_in, + BUS_MASTER_OUT => bus_master_out, + BUS_MASTER_ACTIVE => bus_master_active, ONEWIRE_INOUT => TEMPSENS, --Timing registers TIMERS_OUT => timer @@ -301,7 +304,7 @@ begin CLK => clk_sys, RESET => reset_i, - REGIO_RX => handlerbus_rx, + REGIO_RX => ctrlbus_rx, REGIO_TX => ctrlbus_tx, BUS_RX(0) => bustools_rx, --Flash, SPI, UART, ADC, SED @@ -316,7 +319,7 @@ begin STAT_DEBUG => open ); - handlerbus_rx <= ctrlbus_rx when bus_master_active = '0' else bus_master_out; + --------------------------------------------------------------------------- -- Control Tools @@ -358,7 +361,7 @@ begin BUS_RX => bustools_rx, BUS_TX => bustools_tx, --Control master for default settings - BUS_MASTER_IN => ctrlbus_tx, + BUS_MASTER_IN => bus_master_in, BUS_MASTER_OUT => bus_master_out, BUS_MASTER_ACTIVE => bus_master_active, DEBUG_OUT => open @@ -427,8 +430,8 @@ begin end process; -TEST_LINE <= med2int(0).dataready & int2med(0).dataready & med2int(0).data(6 downto 0) & int2med(0).data(6 downto 0); - +--TEST_LINE <= med2int(0).dataready & int2med(0).dataready & med2int(0).data(6 downto 0) & int2med(0).data(6 downto 0); +TEST_LINE <= med_stat_debug(15 downto 0); ------------------------------------------------------------------------------- -- TDC diff --git a/template/trb3sc_basic.vhd b/template/trb3sc_basic.vhd index ba4b793..3dfd1f3 100644 --- a/template/trb3sc_basic.vhd +++ b/template/trb3sc_basic.vhd @@ -129,7 +129,7 @@ architecture trb3sc_arch of trb3sc_basic is signal readout_rx : READOUT_RX; signal readout_tx : readout_tx_array_t(0 to 0); - signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx, bus_master_out, handlerbus_rx : CTRLBUS_RX; + signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx, bus_master_out : CTRLBUS_RX; signal ctrlbus_tx, bussci_tx, bustools_tx, bustc_tx, bus_master_in : CTRLBUS_TX; signal common_stat_reg : std_logic_vector(std_COMSTATREG*32-1 downto 0) := (others => '0'); @@ -354,7 +354,7 @@ THE_ENDPOINT : entity work.trb_net16_endpoint_hades_full_handler_record BUS_RX => bustools_rx, BUS_TX => bustools_tx, --Control master for default settings - BUS_MASTER_IN => ctrlbus_tx, + BUS_MASTER_IN => bus_master_in, BUS_MASTER_OUT => bus_master_out, BUS_MASTER_ACTIVE => bus_master_active, DEBUG_OUT => debug_tools -- 2.43.0