From 1562b1289b786034378d4016b689c9fd70521209 Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Fri, 23 May 2014 17:49:15 +0200 Subject: [PATCH] ADC Addon: One SPI_CONN out is not true LVDS...this is an error in the schematic probably --- adc_addon/adc_addon.vhd | 5 +++-- pinout/adc_addon.lpf | 42 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/adc_addon/adc_addon.vhd b/adc_addon/adc_addon.vhd index ae199ec..8c281f0 100644 --- a/adc_addon/adc_addon.vhd +++ b/adc_addon/adc_addon.vhd @@ -40,7 +40,7 @@ entity adc_addon is SPI_CONN_H_IN : in std_logic; -- chip select for ADC SPI communication - ADC_CSB_reg : out std_logic_vector(12 downto 1); + ADC_CSB : out std_logic_vector(12 downto 1); -- general purpose to JPG1 GP_LINE : out std_logic_vector(9 downto 0) @@ -213,7 +213,7 @@ architecture adc_addon_arch of adc_addon is signal enable_cfg_flash : std_logic; - signal adc_csb : std_logic_vector(12 downto 1) := x"000"; + signal adc_csb_reg : std_logic_vector(12 downto 1) := x"000"; begin @@ -408,6 +408,7 @@ begin end if; end process; + adc_csb <= not adc_csb_reg; -- active low! --------------------------------------------------------------------------- -- Rest of the I/O diff --git a/pinout/adc_addon.lpf b/pinout/adc_addon.lpf index 0c340f4..8332917 100644 --- a/pinout/adc_addon.lpf +++ b/pinout/adc_addon.lpf @@ -30,3 +30,45 @@ LOCATE COMP "LED_ORANGE" SITE "F2"; DEFINE PORT GROUP "LED_group" "LED*"; IOBUF GROUP "LED_group" IO_TYPE=LVCMOS33; +LOCATE COMP "ADC_CSB_1" SITE "E14"; +LOCATE COMP "ADC_CSB_2" SITE "E13"; +LOCATE COMP "ADC_CSB_3" SITE "F12"; +LOCATE COMP "ADC_CSB_4" SITE "F13"; +LOCATE COMP "ADC_CSB_5" SITE "F14"; +LOCATE COMP "ADC_CSB_6" SITE "G12"; +LOCATE COMP "ADC_CSB_7" SITE "G14"; +LOCATE COMP "ADC_CSB_8" SITE "G13"; +LOCATE COMP "ADC_CSB_9" SITE "H12"; +LOCATE COMP "ADC_CSB_10" SITE "J12"; +LOCATE COMP "ADC_CSB_11" SITE "J14"; +LOCATE COMP "ADC_CSB_12" SITE "J13"; +DEFINE PORT GROUP "ADC_CSB_group" "ADC_CSB*"; +IOBUF GROUP "ADC_CSB_group" IO_TYPE=LVCMOS33; + +# SPI to TRB +LOCATE COMP "SPI_TRB_CLK_0" SITE "M11"; +LOCATE COMP "SPI_TRB_CLK_1" SITE "P12"; +LOCATE COMP "SPI_TRB_CS_0" SITE "M10"; +LOCATE COMP "SPI_TRB_CS_1" SITE "P11"; +LOCATE COMP "SPI_TRB_IN_0" SITE "A11"; +LOCATE COMP "SPI_TRB_IN_1" SITE "B12"; +LOCATE COMP "SPI_TRB_OUT_0" SITE "M9"; +LOCATE COMP "SPI_TRB_OUT_1" SITE "N10"; +DEFINE PORT GROUP "SPI_TRB_group" "SPI_TRB*"; +IOBUF GROUP "SPI_TRB_group" IO_TYPE=LVCMOS33; + +# SPI to CABLE_CONN1/2 +LOCATE COMP "SPI_CONN_L_CLK" SITE "A7"; +LOCATE COMP "SPI_CONN_L_CS" SITE "B5"; +LOCATE COMP "SPI_CONN_L_IN" SITE "A10"; +LOCATE COMP "SPI_CONN_L_OUT" SITE "C9"; +LOCATE COMP "SPI_CONN_H_CLK" SITE "A2"; +LOCATE COMP "SPI_CONN_H_CS" SITE "A3"; +LOCATE COMP "SPI_CONN_H_IN" SITE "P3"; +LOCATE COMP "SPI_CONN_H_OUT" SITE "P2"; +DEFINE PORT GROUP "SPI_CONN_group" "SPI_CONN*"; +IOBUF GROUP "SPI_CONN_group" IO_TYPE=LVDS25; +IOBUF PORT "SPI_CONN_H_OUT" IO_TYPE=LVCMOS33D; + + + -- 2.43.0