From 1a6914c03950c59e217eef1d2e6b5342fc5b2e25 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Mon, 7 Sep 2009 23:23:18 +0000 Subject: [PATCH] some nop's --- libtrbnet/Makefile | 16 +++---- libtrbnet/trbnet.c | 112 ++++++++++++++++++++++++++------------------- 2 files changed, 73 insertions(+), 55 deletions(-) diff --git a/libtrbnet/Makefile b/libtrbnet/Makefile index 4ed2074..bc7a218 100644 --- a/libtrbnet/Makefile +++ b/libtrbnet/Makefile @@ -1,7 +1,7 @@ AXIS_USABLE_LIBS = UCLIBC GLIBC include $(AXIS_TOP_DIR)/tools/build/Rules.axis -CFLAGS = -pipe -g -Wall -Winline -O3 -finline-functions -finline-limit=600000 #-DHEXMODE +CFLAGS = -pipe -g -Wall -Winline -O3 -finline-functions -finline-limit=600000 #-DHEXMODE CPPFLAGS = @@ -22,15 +22,15 @@ BIN.OBJS = LIB.OBJS = INC.OBJS = -BIN_DIR = -LIB_DIR = -INC_DIR = +BIN_DIR = +LIB_DIR = +INC_DIR = # ------------ Objects ------------------------------------------------- TARGETS = trbcmd -trbcmd.OBJS = trbcmd.o +trbcmd.OBJS = trbcmd.o # ------------ Library-Objects ---------------------------------------- @@ -44,9 +44,9 @@ libtrbnet.OBJS = port.o trberror.o trbnet.o # ----- C Code --------- %.o: %.c - $(CC) $< -c $(CPPFLAGS) $(CFLAGS) $(INCDIR) -o $@ + $(CC) $< -c $(CPPFLAGS) $(CFLAGS) $(INCDIR) -o $@ -.SUFFIXES: .o .c +.SUFFIXES: .o .c # ------------ Targets ------------------------------------------------- @@ -80,5 +80,5 @@ trberror.o: trberror.h trberror.c trbnet.o: trbnet.h trbnet.c trberror.h port.h -trbcmd.o: trbcmd.c trbnet.h trberror.h +trbcmd.o: trbcmd.c trbnet.h trberror.h diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c index 357f5ed..d00ce8d 100644 --- a/libtrbnet/trbnet.c +++ b/libtrbnet/trbnet.c @@ -1,4 +1,4 @@ -const char trbnet_version[] = "$Revision: 2.42 $"; +const char trbnet_version[] = "$Revision: 2.43 $"; #include #include @@ -133,7 +133,7 @@ const char trbnet_version[] = "$Revision: 2.42 $"; /* ---------------------------------------------------------------------- */ /* Used for blocking Signals SIGINT and SIGTERM */ -static sigset_t blockSet; +static sigset_t blockSet; static sigset_t blockSetOld; /* Semaphore handling */ @@ -199,12 +199,22 @@ static uint32_t fifoToggleBit = 0; static inline void write32_to_FPGA(uint16_t address, uint32_t value) { /* writes a 32bit word to a given address on a given device */ - + /* set address RW_WRITE */ - writePC((address & 0x7fff) | (fifoToggleBit ^ FIFO_TOGGLE_BIT)); - + fifoToggleBit ^= FIFO_TOGGLE_BIT; + writePC((address & 0x7fff) | fifoToggleBit); + __asm("nop"); + __asm("nop"); + __asm("nop"); + + + + + /* write value */ + fifoToggleBit ^= FIFO_TOGGLE_BIT; writePC((value >> 16) | fifoToggleBit); + fifoToggleBit ^= FIFO_TOGGLE_BIT; writePC((value & 0xffff) | fifoToggleBit); } @@ -213,11 +223,19 @@ static inline void write32_to_FPGA(uint16_t address, uint32_t value) static inline void read32_from_FPGA(uint16_t address, uint32_t* value) { /* reads a 32bit word from a given address on a given device */ - + /* set address RW_READ */ - writePC((address | 0x8000) | (fifoToggleBit ^ FIFO_TOGGLE_BIT)); - + fifoToggleBit ^= FIFO_TOGGLE_BIT; + writePC((address | 0x8000) | fifoToggleBit); + __asm("nop"); + __asm("nop"); + __asm("nop"); + + + + /* read value */ + fifoToggleBit ^= FIFO_TOGGLE_BIT; *value = ((readPB() << 16)); writePC(fifoToggleBit); @@ -227,7 +245,7 @@ static inline void read32_from_FPGA(uint16_t address, uint32_t* value) } static inline int read32_from_FPGA_dma(uint16_t fifo_address, - uint32_t* values, + uint32_t* values, uint32_t size) { /* Do Not Used */ @@ -473,7 +491,7 @@ static int trb_fifo_read(uint8_t channel, /* Read FIFO-Buffer, copy to User-Buffer */ while ((*tmp & MASK_FIFO_VALID) != 0) { fifoDebugCtr++; - + if (((*tmp & MASK_FIFO_TYPE) >> SHIFT_FIFO_TYPE) == FIFO_TYPE_IS_HEADER) { /* TRBNet HEADER */ if ((counter % 5) == 0) { @@ -484,7 +502,7 @@ static int trb_fifo_read(uint8_t channel, } packageCtr++; counter = 0; - + /* DEBUG INFO */ if (trb_debug > 1) { fprintf(stderr, "FIFO_%03d: 0x%08x\n", @@ -492,28 +510,28 @@ static int trb_fifo_read(uint8_t channel, } } else { /* Error: invalid buffer content, flush FIFO-BUFFER and exit */ - + /* DEBUG INFO */ if (trb_debug > 1) { fprintf(stderr, "FIFO_%03d: 0x%08x\n", fifoDebugCtr, *tmp); } - + fifo_flush(channel); trb_errno = TRB_FIFO_INCOMPLETE_PACKAGE; return -1; } } else { /* TRBNet Data Word */ - + /* DEBUG INFO */ if (trb_debug > 1) { fprintf(stderr, "FIFO_%03d: 0x%08x\n", fifoDebugCtr, *tmp); } - + if ((trb_lazy == 0) && - (((*tmp & MASK_FIFO_TYPE) >> SHIFT_FIFO_TYPE) != + (((*tmp & MASK_FIFO_TYPE) >> SHIFT_FIFO_TYPE) != (counter - 1) % 2)) { /* Error: invalid sequence (not 0, 1, .), flush FIFO-BUFFER and exit */ fifo_flush(channel); @@ -881,7 +899,7 @@ static int lockPorts() -1, /* sem_op: decrement semaphore by 1, i.e. lock it */ SEM_UNDO /* sem_flg: remove lock if process gets killed */ }; - + /* Wait for semaphore and lock it */ if (semop(semid, &sops, 1) == -1) { trb_errno = TRB_SEMAPHORE; @@ -893,7 +911,7 @@ static int lockPorts() /* Get FifoToggleBit-Status, needed by read32_from_FPGA ... */ fifoToggleBit = readPC() & FIFO_TOGGLE_BIT; - + return 0; } @@ -904,16 +922,16 @@ static int unlockPorts() 1, /* sem_op: decrement semaphore, i.e. unlock it */ SEM_UNDO /* */ }; - + /* Unblock Signals */ sigprocmask(SIG_SETMASK, &blockSetOld, NULL); - + /* Release semaphore */ if (semop(semid, &sops, 1) == -1) { trb_errno = TRB_SEMAPHORE; return -1; } - + return 0; } @@ -933,12 +951,12 @@ int init_ports() return -1; } - /* Get / Create semaphore */ - if ((semid = semget(sem_key, 1, - IPC_CREAT | IPC_EXCL | - S_IRUSR | S_IWUSR | - S_IRGRP | S_IWGRP | - S_IROTH | S_IWOTH)) == -1) { + /* Get / Create semaphore */ + if ((semid = semget(sem_key, 1, + IPC_CREAT | IPC_EXCL | + S_IRUSR | S_IWUSR | + S_IRGRP | S_IWGRP | + S_IROTH | S_IWOTH)) == -1) { if (errno == EEXIST) { /* Semaphore already exist, so just open it */ if ((semid = semget(sem_key, 1, 0)) == -1) { @@ -957,7 +975,7 @@ int init_ports() return -1; } } - + /* Do we really need this, Jan?? */ com_reset(); @@ -982,11 +1000,11 @@ int trb_fifo_flush(uint8_t channel) if (trb_debug > 1) { fprintf(stderr, "Flushing FIFO of channel# %d\n", channel); } - + if (lockPorts() == -1) return -1; fifo_flush(channel); - + if (unlockPorts() == -1) return -1; return 0; @@ -1013,7 +1031,7 @@ int trb_register_read(uint16_t trb_address, if (trb_debug > 0) { fprintf(stderr, "Init_Transfer done.\n"); } - + /* Build up package and start transfer */ write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address); write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000); @@ -1031,7 +1049,7 @@ int trb_register_read(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_REG_READ, data, dsize); if (unlockPorts() == -1) return -1; - + if ((status > 0) && (status % 2 != 0)) { trb_errno = TRB_INVALID_PKG_NUMBER; return -1; @@ -1074,7 +1092,7 @@ int trb_register_read_mem(uint16_t trb_address, if (trb_debug > 0) { fprintf(stderr, "Init_Tranfer done.\n"); } - + /* Build up package and start transfer */ write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address); write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000); @@ -1116,11 +1134,11 @@ int trb_register_write(uint16_t trb_address, uint32_t value) { int status; - + trb_errno = TRB_NONE; if (lockPorts() == -1) return -1; - + /* Init transfer */ if (trb_init_transfer(3) == -1) { unlockPorts(); @@ -1276,7 +1294,7 @@ int trb_set_address(uint64_t uid, } if (lockPorts() == -1) return -1; - + /* Init transfer */ if (trb_init_transfer(3) == -1) { unlockPorts(); @@ -1307,7 +1325,7 @@ int trb_set_address(uint64_t uid, } status = trb_fifo_read(3, FIFO_MODE_SET_ADDRESS, NULL, 0); - + if (unlockPorts() == -1) return -1; if (status == -1) return -1; @@ -1333,7 +1351,7 @@ int trb_ipu_data_read(uint8_t type, if (data == NULL) return -1; if (lockPorts() == -1) return -1; - + /* Init transfer IPU Channel */ if (trb_init_transfer(1) == -1) { unlockPorts(); @@ -1404,9 +1422,9 @@ int trb_send_trigger(uint8_t type, /* Check for replay packets (trigger) */ status = trb_fifo_read(0, FIFO_MODE_NONE, NULL, 0); - + if (unlockPorts() == -1) return -1; - + if (status == -1) return -1; return 0; @@ -1474,7 +1492,7 @@ int trb_send_trigger_rich(uint8_t trg_input, /* Check for replay packets (trigger) */ status = trb_fifo_read(0, FIFO_MODE_NONE, NULL, 0); - + if (unlockPorts() == -1) return -1; if (status == -1) return -1; @@ -1485,14 +1503,14 @@ int trb_send_trigger_rich(uint8_t trg_input, int fpga_register_read(uint16_t reg_address, uint32_t* value) { trb_errno = TRB_NONE; - + if (lockPorts() == -1) return -1; - + /* DEBUG INFO */ if (trb_debug > 0) { fprintf(stderr, "fpga_register_read started.\n"); } - + read32_from_FPGA(reg_address, value); if (unlockPorts() == -1) return -1; @@ -1503,14 +1521,14 @@ int fpga_register_read(uint16_t reg_address, uint32_t* value) int fpga_register_write(uint16_t reg_address, uint32_t value) { trb_errno = TRB_NONE; - + if (lockPorts() == -1) return -1; - + /* DEBUG INFO */ if (trb_debug > 0) { fprintf(stderr, "fpga_register_write started.\n"); } - + write32_to_FPGA(reg_address, value); if (unlockPorts() == -1) return -1; -- 2.43.0