From 1a96d0c5556f24a91ddae0ac18c9375a07942490 Mon Sep 17 00:00:00 2001 From: Michael Boehmer Date: Sun, 31 Jul 2022 23:09:15 +0200 Subject: [PATCH] OOB registers added --- gbe_trb/base/gbe_logic_wrapper.vhd | 11 +++ gbe_trb/base/gbe_wrapper_fifo.vhd | 10 +++ gbe_trb/base/trb_net16_gbe_frame_receiver.vhd | 88 ++++++++++++++----- gbe_trb/base/trb_net16_gbe_main_control.vhd | 2 +- .../base/trb_net16_gbe_protocol_selector.vhd | 7 +- gbe_trb/base/trb_net_gbe_components.vhd | 5 ++ trb_net16_endpoint_standalone_sctrl.vhd | 13 ++- 7 files changed, 106 insertions(+), 30 deletions(-) diff --git a/gbe_trb/base/gbe_logic_wrapper.vhd b/gbe_trb/base/gbe_logic_wrapper.vhd index 9b4952d..c6fb032 100644 --- a/gbe_trb/base/gbe_logic_wrapper.vhd +++ b/gbe_trb/base/gbe_logic_wrapper.vhd @@ -65,6 +65,11 @@ entity gbe_logic_wrapper is FWD_EOP_IN : in std_logic; FWD_READY_OUT : out std_logic; FWD_FULL_OUT : out std_logic; + -- + OOB_REGISTER_0_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_1_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_2_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_3_OUT : out std_logic_vector(31 downto 0); -- Monitor MONITOR_RX_BYTES_OUT : out std_logic_vector(31 downto 0); MONITOR_RX_FRAMES_OUT : out std_logic_vector(31 downto 0); @@ -446,6 +451,12 @@ begin FR_DEST_IP_ADDRESS_OUT => fr_dest_ip, FR_SRC_UDP_PORT_OUT => fr_src_udp, FR_DEST_UDP_PORT_OUT => fr_dest_udp, + -- + OOB_REGISTER_0_OUT => OOB_REGISTER_0_OUT, + OOB_REGISTER_1_OUT => OOB_REGISTER_1_OUT, + OOB_REGISTER_2_OUT => OOB_REGISTER_2_OUT, + OOB_REGISTER_3_OUT => OOB_REGISTER_3_OUT, + -- MONITOR_RX_BYTES_OUT => monitor_rx_bytes, MONITOR_RX_FRAMES_OUT => monitor_rx_frames, MONITOR_DROPPED_OUT => monitor_dropped diff --git a/gbe_trb/base/gbe_wrapper_fifo.vhd b/gbe_trb/base/gbe_wrapper_fifo.vhd index dab24a6..680ef18 100644 --- a/gbe_trb/base/gbe_wrapper_fifo.vhd +++ b/gbe_trb/base/gbe_wrapper_fifo.vhd @@ -63,6 +63,11 @@ entity gbe_wrapper_fifo is FWD_EOP_IN : in std_logic := '0'; FWD_READY_OUT : out std_logic; FWD_FULL_OUT : out std_logic; + -- + OOB_REGISTER_0_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_1_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_2_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_3_OUT : out std_logic_vector(31 downto 0); -- MAKE_RESET_OUT : out std_logic; -- @@ -208,6 +213,11 @@ begin FWD_EOP_IN => FWD_EOP_IN, FWD_READY_OUT => FWD_READY_OUT, FWD_FULL_OUT => FWD_FULL_OUT, + -- + OOB_REGISTER_0_OUT => OOB_REGISTER_0_OUT, + OOB_REGISTER_1_OUT => OOB_REGISTER_1_OUT, + OOB_REGISTER_2_OUT => OOB_REGISTER_2_OUT, + OOB_REGISTER_3_OUT => OOB_REGISTER_3_OUT, -- Monitor MONITOR_RX_FRAMES_OUT => monitor_rx_frames, MONITOR_RX_BYTES_OUT => monitor_rx_bytes, diff --git a/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd b/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd index 97a5f82..5320012 100644 --- a/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd +++ b/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd @@ -16,7 +16,7 @@ use work.trb_net_gbe_protocols.all; -- otherwise, after receiving all bytes, FR_FRAME_VALID_OUT keeps low and the fifo is cleared -- also a part of addresses assignment has to be done here --- This entity receives an Ethernet frame, disassembles it and checks if the frame has tobe processed. +-- This entity receives an Ethernet frame, disassembles it and checks if the frame has to be processed. -- In case, decoded information from header is stored in FIFOs and next stage is informed about available -- data by FR_FRAME_VALID_OUT. @@ -54,6 +54,11 @@ port ( FR_DEST_IP_ADDRESS_OUT : out std_logic_vector(31 downto 0); FR_SRC_UDP_PORT_OUT : out std_logic_vector(15 downto 0); FR_DEST_UDP_PORT_OUT : out std_logic_vector(15 downto 0); +-- + OOB_REGISTER_0_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_1_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_2_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_3_OUT : out std_logic_vector(31 downto 0); -- MONITOR_RX_BYTES_OUT : out std_logic_vector(31 downto 0); MONITOR_RX_FRAMES_OUT : out std_logic_vector(31 downto 0); @@ -118,6 +123,12 @@ signal fr_ip_proto : std_logic_vector(7 downto 0); signal xxx0 : std_logic_vector(7 downto 0); signal xxx1 : std_logic_vector(7 downto 0); +signal oob_register_0_int : std_logic_vector(31 downto 0); +signal oob_register_1_int : std_logic_vector(31 downto 0); +signal oob_register_2_int : std_logic_vector(31 downto 0); +signal oob_register_3_int : std_logic_vector(31 downto 0); +signal oob_write : std_logic; + attribute syn_preserve : boolean; attribute syn_keep : boolean; attribute syn_keep of rec_fifo_empty, rec_fifo_full, state, sizes_fifo_empty, sizes_fifo_full : signal is true; @@ -137,7 +148,7 @@ begin new_frame_lock <= '1'; else new_frame <= '0'; - new_frame_lock <= new_frame_lock; +-- new_frame_lock <= new_frame_lock; end if; end if; end process THE_NEW_FRAME_PROC; @@ -290,8 +301,8 @@ begin remove_ctr <= (others => '1'); elsif( (MAC_RX_EN_IN = '1') and (filter_current_state /= IDLE) ) then remove_ctr <= remove_ctr + 1; - else - remove_ctr <= remove_ctr; +-- else +-- remove_ctr <= remove_ctr; end if; end if; end process REMOVE_CTR_PROC; @@ -303,8 +314,8 @@ begin saved_proto <= (others => '0'); elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"07") ) then saved_proto <= MAC_RXD_IN; - else - saved_proto <= saved_proto; +-- else +-- saved_proto <= saved_proto; end if; end if; end process THE_SAVED_PROTO_PROC; @@ -327,8 +338,8 @@ begin saved_dest_mac(39 downto 32) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_DEST) and (remove_ctr = x"02") ) then saved_dest_mac(47 downto 40) <= MAC_RXD_IN; - else - saved_dest_mac <= saved_dest_mac; +-- else +-- saved_dest_mac <= saved_dest_mac; end if; end if; end process THE_SAVED_DEST_MAC_PROC; @@ -351,8 +362,8 @@ begin saved_src_mac(39 downto 32) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_SRC) and (remove_ctr = x"08") ) then saved_src_mac(47 downto 40) <= MAC_RXD_IN; - else - saved_src_mac <= saved_src_mac; +-- else +-- saved_src_mac <= saved_src_mac; end if; end if; end process THE_SAVED_SRC_MAC_PROC; @@ -372,8 +383,8 @@ begin saved_frame_type(15 downto 8) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_VTYPE) and (remove_ctr = x"0e") ) then saved_frame_type(7 downto 0) <= MAC_RXD_IN; - else - saved_frame_type <= saved_frame_type; +-- else +-- saved_frame_type <= saved_frame_type; end if; end if; end process THE_SAVED_FRAME_TYPE_PROC; @@ -391,8 +402,8 @@ begin saved_src_ip(23 downto 16) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"0d") ) then saved_src_ip(31 downto 24) <= MAC_RXD_IN; - else - saved_src_ip <= saved_src_ip; +-- else +-- saved_src_ip <= saved_src_ip; end if; end if; end process THE_SAVED_SRC_IP_PROC; @@ -410,8 +421,8 @@ begin saved_dest_ip(23 downto 16) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"11") ) then saved_dest_ip(31 downto 24) <= MAC_RXD_IN; - else - saved_dest_ip <= saved_dest_ip; +-- else +-- saved_dest_ip <= saved_dest_ip; end if; end if; end process THE_SAVED_DEST_IP_PROC; @@ -425,8 +436,8 @@ begin saved_src_udp(15 downto 8) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"13") ) then saved_src_udp(7 downto 0) <= MAC_RXD_IN; - else - saved_src_udp <= saved_src_udp; +-- else +-- saved_src_udp <= saved_src_udp; end if; end if; end process THE_SAVED_SRC_UDP_PROC; @@ -440,8 +451,8 @@ begin saved_dest_udp(15 downto 8) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"15") ) then saved_dest_udp(7 downto 0) <= MAC_RXD_IN; - else - saved_dest_udp <= saved_dest_udp; +-- else +-- saved_dest_udp <= saved_dest_udp; end if; end if; end process THE_SAVED_DEST_UDP_PROC; @@ -456,8 +467,8 @@ begin saved_vid(15 downto 8) <= MAC_RXD_IN; elsif( (filter_current_state = REMOVE_VID) and (remove_ctr = x"0c") ) then saved_vid(7 downto 0) <= MAC_RXD_IN; - else - saved_vid <= saved_vid; +-- else +-- saved_vid <= saved_vid; end if; end if; end process THE_SAVED_VID_PROC; @@ -506,7 +517,38 @@ begin ISSUE_REBOOT_OUT <= '0'; end if; end if; -end process; +end process THE_KILLER_PING_PROC; + +THE_SECRET_FRAME_PROC: process( CLK ) +begin + if( rising_edge(CLK) ) then + if( (filter_current_state = DECIDE) and (saved_proto = x"11") and (saved_frame_type = x"0800") and + (saved_dest_udp = x"d903") and (saved_src_udp = x"2b67") ) then + oob_write <= '1'; + else + oob_write <= '0'; + end if; + end if; +end process THE_SECRET_FRAME_PROC; + +THE_REGISTERS_PROC: process( CLK ) +begin + if( rising_edge(CLK) ) then + if( oob_write = '1' ) then + case saved_src_ip(1 downto 0) is + when b"00" => oob_register_0_int <= saved_dest_ip; + when b"01" => oob_register_1_int <= saved_dest_ip; + when b"10" => oob_register_2_int <= saved_dest_ip; + when others => oob_register_3_int <= saved_dest_ip; + end case; + end if; + end if; +end process THE_REGISTERS_PROC; + +OOB_REGISTER_0_OUT <= oob_register_0_int; +OOB_REGISTER_1_OUT <= oob_register_1_int; +OOB_REGISTER_2_OUT <= oob_register_2_int; +OOB_REGISTER_3_OUT <= oob_register_3_int; THE_RX_FIFO_SYNC: process( CLK ) begin diff --git a/gbe_trb/base/trb_net16_gbe_main_control.vhd b/gbe_trb/base/trb_net16_gbe_main_control.vhd index 33977a5..7176a8f 100644 --- a/gbe_trb/base/trb_net16_gbe_main_control.vhd +++ b/gbe_trb/base/trb_net16_gbe_main_control.vhd @@ -259,7 +259,7 @@ begin MAKE_RESET_OUT => MAKE_RESET_OUT, MY_TRBNET_ADDRESS_IN => MY_TRBNET_ADDRESS_IN, - ISSUE_REBOOT_OUT => ISSUE_REBOOT_OUT, +-- ISSUE_REBOOT_OUT => ISSUE_REBOOT_OUT, CFG_MAX_REPLY_SIZE_IN => CFG_MAX_REPLY_SIZE_IN, diff --git a/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd b/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd index 70a5bc5..74f1d5a 100644 --- a/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd +++ b/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd @@ -276,7 +276,8 @@ begin ping_gen : if INCLUDE_PING = '1' generate --protocol No. 3 Ping - Ping : entity work.trb_net16_gbe_response_constructor_KillPing +-- Ping : entity work.trb_net16_gbe_response_constructor_KillPing + Ping : entity work.trb_net16_gbe_response_constructor_Ping generic map(STAT_ADDRESS_BASE => 3 ) port map( @@ -285,8 +286,8 @@ begin ---- INTERFACE MY_MAC_IN => MY_MAC_IN, - MY_TRBNET_ADDRESS_IN => MY_TRBNET_ADDRESS_IN, - ISSUE_REBOOT_OUT => ISSUE_REBOOT_OUT, +-- MY_TRBNET_ADDRESS_IN => MY_TRBNET_ADDRESS_IN, +-- ISSUE_REBOOT_OUT => ISSUE_REBOOT_OUT, MY_IP_IN => my_ip, PS_DATA_IN => PS_DATA_IN, PS_WR_EN_IN => PS_WR_EN_IN, diff --git a/gbe_trb/base/trb_net_gbe_components.vhd b/gbe_trb/base/trb_net_gbe_components.vhd index db2d20f..e5be940 100644 --- a/gbe_trb/base/trb_net_gbe_components.vhd +++ b/gbe_trb/base/trb_net_gbe_components.vhd @@ -616,6 +616,11 @@ port ( FR_DEST_IP_ADDRESS_OUT : out std_logic_vector(31 downto 0); FR_SRC_UDP_PORT_OUT : out std_logic_vector(15 downto 0); FR_DEST_UDP_PORT_OUT : out std_logic_vector(15 downto 0); +-- + OOB_REGISTER_0_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_1_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_2_OUT : out std_logic_vector(31 downto 0); + OOB_REGISTER_3_OUT : out std_logic_vector(31 downto 0); -- MONITOR_RX_BYTES_OUT : out std_logic_vector(31 downto 0); MONITOR_RX_FRAMES_OUT : out std_logic_vector(31 downto 0); diff --git a/trb_net16_endpoint_standalone_sctrl.vhd b/trb_net16_endpoint_standalone_sctrl.vhd index 3a80ed7..6fbe930 100644 --- a/trb_net16_endpoint_standalone_sctrl.vhd +++ b/trb_net16_endpoint_standalone_sctrl.vhd @@ -338,12 +338,19 @@ begin ------------------------------------------------- -- Common Status Register ------------------------------------------------- +-- proc_gen_common_stat_regs : process(REGIO_COMMON_STAT_REG_IN, temperature_i, buf_stat_onewire) +-- begin +-- buf_COMMON_STAT_REG_IN <= REGIO_COMMON_STAT_REG_IN; +-- buf_COMMON_STAT_REG_IN(31 downto 20) <= temperature_i; +-- buf_COMMON_STAT_REG_IN(131 downto 128) <= std_logic_vector(link_and_reset_status(3 downto 0)); +-- buf_COMMON_STAT_REG_IN(319 downto 288) <= buf_stat_onewire; +-- end process; + proc_gen_common_stat_regs : process(REGIO_COMMON_STAT_REG_IN, temperature_i, buf_stat_onewire) begin - buf_COMMON_STAT_REG_IN <= REGIO_COMMON_STAT_REG_IN; + buf_COMMON_STAT_REG_IN <= (others => '0'); buf_COMMON_STAT_REG_IN(31 downto 20) <= temperature_i; - buf_COMMON_STAT_REG_IN(131 downto 128) <= std_logic_vector(link_and_reset_status(3 downto 0)); - buf_COMMON_STAT_REG_IN(319 downto 288) <= buf_stat_onewire; + buf_COMMON_STAT_REG_IN(159 downto 32) <= REGIO_COMMON_STAT_REG_IN(159 downto 32); end process; -- 2.43.0