From 1bc2d6b690148421dd7165feea19b76005f1c370 Mon Sep 17 00:00:00 2001 From: Adrian Weber Date: Mon, 22 Jun 2020 17:09:43 +0200 Subject: [PATCH] Start of inclusion of Data from FEE in Path to CRI. Fix for CTS Readout: Additional RDO must be set to finished to prevent Stop of trigger release --- combiner_cts/combiner.prj | 11 + combiner_cts/combiner.vhd | 169 ++++++++----- combiner_cts/cri/trb_net16_cri_interface.vhd | 235 ++++++++++++++++++- 3 files changed, 348 insertions(+), 67 deletions(-) diff --git a/combiner_cts/combiner.prj b/combiner_cts/combiner.prj index fda15ee..7d5727b 100644 --- a/combiner_cts/combiner.prj +++ b/combiner_cts/combiner.prj @@ -112,6 +112,13 @@ add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dual add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd" add_file -vhdl -lib work "../../trbnet/lattice/ecp3/ram_18x256_oreg.vhd" add_file -vhdl -lib work "./core/FIFO_36x64.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_32kx18x9_wcnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_64kx9_af_cnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_8kx9_af_cnt.vhd" + +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_4096x9.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_512x32.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_512x32x8.vhd" #Flash & Reload, Tools add_file -vhdl -lib work "../../trbnet/special/slv_register.vhd" @@ -210,6 +217,10 @@ add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd" #CRI add_file -vhdl -lib work "./cri/trb_net16_cri_interface.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_ipu_interface.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_TrbNetData.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_event_constr.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_setup.vhd" #TDC Calibration #add_file -vhdl -lib work "./code/Calibration.vhd" diff --git a/combiner_cts/combiner.vhd b/combiner_cts/combiner.vhd index 69a55f3..049cbc9 100644 --- a/combiner_cts/combiner.vhd +++ b/combiner_cts/combiner.vhd @@ -115,8 +115,8 @@ architecture arch of combiner is signal int2med : int2med_array_t(0 to INTERFACE_NUM); -- 1 more due to uplink signal med_stat_debug : std_logic_vector (1*64-1 downto 0); - signal ctrlbus_rx, bustools_rx, bustc_rx, bus_master_out, handlerbus_rx, busdebug_rx, bustdccal_rx, buscts_rx : CTRLBUS_RX; - signal ctrlbus_tx, bustools_tx, bustc_tx, bus_master_in , busdebug_tx , bustdccal_tx, buscts_tx : CTRLBUS_TX; + signal ctrlbus_rx, bustools_rx, bustc_rx, bus_master_out, handlerbus_rx, busdebug_rx, bustdccal_rx, buscts_rx, buscrireg_rx : CTRLBUS_RX; + signal ctrlbus_tx, bustools_tx, bustc_tx, bus_master_in , busdebug_tx , bustdccal_tx, buscts_tx, buscrireg_tx : CTRLBUS_TX; signal bussci_tx : ctrlbus_tx_array_t(0 to 3); signal bussci_rx : ctrlbus_rx_array_t(0 to 3); @@ -240,30 +240,56 @@ architecture arch of combiner is signal reset_via_cri : std_logic := '0'; signal last_cri_resetPulse : std_logic; - component trb_net16_cri_interface is - port( - CLK : in std_logic; - RESET : in std_logic; - CLK_EN : in std_logic; - - --Media Interface - MEDIA_MED2INT : in med2int_array_t(0 to 0); - MEDIA_INT2MED : out int2med_array_t(0 to 0); - - --Gbe Sctrl Input - GSC_INIT_DATAREADY_OUT : out std_logic; - GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0); - GSC_INIT_PACKET_NUM_OUT : out std_logic_vector( 2 downto 0); - GSC_INIT_READ_IN : in std_logic; - GSC_REPLY_DATAREADY_IN : in std_logic; - GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0); - GSC_REPLY_PACKET_NUM_IN : in std_logic_vector( 2 downto 0); - GSC_REPLY_READ_OUT : out std_logic; - GSC_BUSY_IN : in std_logic; - - TIMER_TICKS_IN : in std_logic_vector( 1 downto 0) - ); - end component; +-- component trb_net16_cri_interface is +-- generic( +-- INCLUDE_READOUT : std_logic := '0'; +-- INCLUDE_SLOWCTRL : std_logic := '1' +-- ); +-- port( +-- CLK : in std_logic; +-- RESET : in std_logic; +-- CLK_EN : in std_logic; +-- +-- --Media Interface +-- MEDIA_MED2INT : in med2int_array_t(0 to 0); +-- MEDIA_INT2MED : out int2med_array_t(0 to 0); +-- +-- --Event information coming from CTS for CRI +-- CTS_NUMBER_IN : in std_logic_vector (15 downto 0); +-- CTS_CODE_IN : in std_logic_vector (7 downto 0); +-- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); +-- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); +-- CTS_START_READOUT_IN : in std_logic; +-- +-- --Information sent to CTS +-- CTS_READOUT_FINISHED_OUT : out std_logic; --no more data, end transfer, send TRM +-- CTS_STATUS_BITS_OUT : out std_logic_vector (31 downto 0); +-- +-- --Data from Frontends +-- FEE_DATA_IN : in std_logic_vector (15 downto 0); +-- FEE_DATAREADY_IN : in std_logic; +-- FEE_READ_OUT : out std_logic; --must be high when idle, otherwise you will never get a dataready +-- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); +-- FEE_BUSY_IN : in std_logic; +-- +-- --Gbe Sctrl Input +-- GSC_INIT_DATAREADY_OUT : out std_logic; +-- GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0); +-- GSC_INIT_PACKET_NUM_OUT : out std_logic_vector( 2 downto 0); +-- GSC_INIT_READ_IN : in std_logic; +-- GSC_REPLY_DATAREADY_IN : in std_logic; +-- GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0); +-- GSC_REPLY_PACKET_NUM_IN : in std_logic_vector( 2 downto 0); +-- GSC_REPLY_READ_OUT : out std_logic; +-- GSC_BUSY_IN : in std_logic; +-- +-- -- Registers config +-- BUS_REG_RX : in CTRLBUS_RX; +-- BUS_REG_TX : out CTRLBUS_TX; +-- +-- TIMER_TICKS_IN : in std_logic_vector( 1 downto 0) +-- ); +-- end component; begin @@ -292,14 +318,14 @@ THE_CLOCK_RESET : entity work.clock_reset_handler ); - CRI_RESET_PULSE_PROC : process begin - wait until rising_edge(clk_sys); - last_cri_resetPulse <= med2int(INTERFACE_NUM).stat_op(13); - reset_via_cri <= last_cri_resetPulse and not med2int(INTERFACE_NUM).stat_op(13); - end process; +-- CRI_RESET_PULSE_PROC : process begin +-- wait until rising_edge(clk_sys); +-- last_cri_resetPulse <= med2int(INTERFACE_NUM).stat_op(13); +-- reset_via_cri <= last_cri_resetPulse and not med2int(INTERFACE_NUM).stat_op(13); +-- end process; - --reset_via_cri <= med2int(INTERFACE_NUM).stat_op(13); + reset_via_cri <= med2int(INTERFACE_NUM).stat_op(13); proc_make_reset : process begin wait until rising_edge(clk_sys); @@ -665,29 +691,54 @@ back_slave_ready_i <= BACK_SLAVE_READY; --- GBE channels to CRI Board --- ------------------------------------------------------------------------- -THE_CRI_INTERFACE : trb_net16_cri_interface +THE_CRI_INTERFACE : entity work.trb_net16_cri_interface + generic map ( + INCLUDE_READOUT => '1', + READOUT_BUFFER_SIZE => 4 + ) port map ( - CLK => clk_sys, - RESET => reset_i, - CLK_EN => '1', + CLK => clk_sys, + RESET => reset_i, + CLK_EN => '1', --Media Interface - MEDIA_MED2INT(0) => med2int(INTERFACE_NUM), - MEDIA_INT2MED(0) => int2med(INTERFACE_NUM), + MEDIA_MED2INT(0) => med2int(INTERFACE_NUM), + MEDIA_INT2MED(0) => int2med(INTERFACE_NUM), - --Gbe Sctrl Input - GSC_INIT_DATAREADY_OUT => gsc_init_dataready, - GSC_INIT_DATA_OUT => gsc_init_data, - GSC_INIT_PACKET_NUM_OUT => gsc_init_packet_num, - GSC_INIT_READ_IN => gsc_init_read, - GSC_REPLY_DATAREADY_IN => gsc_reply_dataready, - GSC_REPLY_DATA_IN => gsc_reply_data, - GSC_REPLY_PACKET_NUM_IN => gsc_reply_packet_num, - GSC_REPLY_READ_OUT => gsc_reply_read, - GSC_BUSY_IN => gsc_busy, + --Event information coming from CTS for CRI + CTS_NUMBER_IN => gbe_cts_number, + CTS_CODE_IN => gbe_cts_code, + CTS_INFORMATION_IN => gbe_cts_information, + CTS_READOUT_TYPE_IN => gbe_cts_readout_type, + CTS_START_READOUT_IN => gbe_cts_start_readout, - TIMER_TICKS_IN(0) => timer.tick_us, - TIMER_TICKS_IN(1) => timer.tick_ms + --Information sent to CTS + CTS_READOUT_FINISHED_OUT => gbe_cts_readout_finished, + CTS_STATUS_BITS_OUT => gbe_cts_status_bits, + + --Data from Frontends + FEE_DATA_IN => gbe_fee_data, + FEE_DATAREADY_IN => gbe_fee_dataready, + FEE_READ_OUT => gbe_fee_read, + FEE_STATUS_BITS_IN => gbe_fee_status_bits, + FEE_BUSY_IN => gbe_fee_busy, + + --Gbe Sctrl Input + GSC_INIT_DATAREADY_OUT => gsc_init_dataready, + GSC_INIT_DATA_OUT => gsc_init_data, + GSC_INIT_PACKET_NUM_OUT => gsc_init_packet_num, + GSC_INIT_READ_IN => gsc_init_read, + GSC_REPLY_DATAREADY_IN => gsc_reply_dataready, + GSC_REPLY_DATA_IN => gsc_reply_data, + GSC_REPLY_PACKET_NUM_IN => gsc_reply_packet_num, + GSC_REPLY_READ_OUT => gsc_reply_read, + GSC_BUSY_IN => gsc_busy, + + BUS_REG_RX => buscrireg_rx, + BUS_REG_TX => buscrireg_tx, + + TIMER_TICKS_IN(0) => timer.tick_us, + TIMER_TICKS_IN(1) => timer.tick_ms ); ------------------------------------------------------------------------- @@ -696,11 +747,11 @@ THE_CRI_INTERFACE : trb_net16_cri_interface gen_addition_ports : for i in 0 to cts_rdo_additional_ports-1 generate - cts_rdo_additional_data(31 + i*32 downto 32*i) <= cts_rdo_additional(i).data; - cts_rdo_trg_status_bits_additional(31 + i*32 downto 32*i) <= cts_rdo_additional(i).statusbits; + cts_rdo_additional_data(31 + i*32 downto 32*i) <= x"00000000";--cts_rdo_additional(i).data; + cts_rdo_trg_status_bits_additional(31 + i*32 downto 32*i) <= x"00000000";--cts_rdo_additional(i).statusbits; - cts_rdo_additional_write(i) <= cts_rdo_additional(i).data_write; - cts_rdo_additional_finished(i) <= cts_rdo_additional(i).data_finished; + cts_rdo_additional_write(i) <= '0';--cts_rdo_additional(i).data_write; + cts_rdo_additional_finished(i) <= '1';--cts_rdo_additional(i).data_finished; end generate; gen_media_record : for i in 0 to INTERFACE_NUM-1 generate @@ -794,9 +845,11 @@ THE_CRI_INTERFACE : trb_net16_cri_interface --------------------------------------------------------------------------- THE_BUS_HANDLER : entity work.trb_net16_regio_bus_handler_record generic map( - PORT_NUMBER => 9, - PORT_ADDRESSES => (0 => x"d000", 1 => x"d300", 2 => x"b000", 3 => x"b200", 4 => x"b400", 5 => x"b600", 6 => x"e000", 7 => x"ef00", 8 => x"a000", others => x"0000"), - PORT_ADDR_MASK => (0 => 12, 1 => 1, 2 => 9, 3 => 9, 4 => 9, 5 => 9 , 6 => 12 , 7 => 8 , 8 => 11 , others => 0), + PORT_NUMBER => 10, + PORT_ADDRESSES => (0 => x"d000", 1 => x"d300", 2 => x"b000", 3 => x"b200", 4 => x"b400", 5 => x"b600", 6 => x"e000", + 7 => x"ef00", 8 => x"a000", 9 => x"8300", others => x"0000"), + PORT_ADDR_MASK => (0 => 12, 1 => 1, 2 => 9, 3 => 9, 4 => 9, 5 => 9, 6 => 12, + 7 => 8 , 8 => 11, 9 => 8, others => 0), PORT_MASK_ENABLE => 1 ) port map( @@ -815,6 +868,7 @@ THE_CRI_INTERFACE : trb_net16_cri_interface BUS_RX(6) => bustdccal_rx, BUS_RX(7) => busdebug_rx, BUS_RX(8) => buscts_rx, + BUS_RX(9) => buscrireg_rx, BUS_TX(0) => bustools_tx, BUS_TX(1) => bustc_tx, BUS_TX(2) => bussci_tx(0), @@ -824,6 +878,7 @@ THE_CRI_INTERFACE : trb_net16_cri_interface BUS_TX(6) => bustdccal_tx, BUS_TX(7) => busdebug_tx, BUS_TX(8) => buscts_tx, + BUS_TX(9) => buscrireg_tx, STAT_DEBUG => open ); diff --git a/combiner_cts/cri/trb_net16_cri_interface.vhd b/combiner_cts/cri/trb_net16_cri_interface.vhd index 5a6e811..509a9ee 100644 --- a/combiner_cts/cri/trb_net16_cri_interface.vhd +++ b/combiner_cts/cri/trb_net16_cri_interface.vhd @@ -10,17 +10,41 @@ use work.trb_net_components.all; use work.trb3_components.all; use work.trb_net16_hub_func.all; use work.trb_net_gbe_components.all; +use work.trb_net_gbe_protocols.all; use work.med_sync_define.all; entity trb_net16_cri_interface is + generic( + INCLUDE_READOUT : std_logic := '0'; + INCLUDE_SLOWCTRL : std_logic := '1'; + READOUT_BUFFER_SIZE : integer range 1 to 4 := 1 + ); port( - CLK : in std_logic; - RESET : in std_logic; - CLK_EN : in std_logic; + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; --Media Interface - MEDIA_MED2INT : in med2int_array_t(0 to 0); - MEDIA_INT2MED : out int2med_array_t(0 to 0); + MEDIA_MED2INT : in med2int_array_t(0 to 0); + MEDIA_INT2MED : out int2med_array_t(0 to 0); + + --Event information coming from CTS for CRI + CTS_NUMBER_IN : in std_logic_vector (15 downto 0); + CTS_CODE_IN : in std_logic_vector (7 downto 0); + CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); + CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); + CTS_START_READOUT_IN : in std_logic; + + --Information sent to CTS + CTS_READOUT_FINISHED_OUT : out std_logic; --no more data, end transfer, send TRM + CTS_STATUS_BITS_OUT : out std_logic_vector (31 downto 0); + + --Data from Frontends + FEE_DATA_IN : in std_logic_vector (15 downto 0); + FEE_DATAREADY_IN : in std_logic; + FEE_READ_OUT : out std_logic; --must be high when idle, otherwise you will never get a dataready + FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); + FEE_BUSY_IN : in std_logic; --Gbe Sctrl Input GSC_INIT_DATAREADY_OUT : out std_logic; @@ -33,6 +57,10 @@ entity trb_net16_cri_interface is GSC_REPLY_READ_OUT : out std_logic; GSC_BUSY_IN : in std_logic; + -- Registers config + BUS_REG_RX : in CTRLBUS_RX; + BUS_REG_TX : out CTRLBUS_TX; + TIMER_TICKS_IN : in std_logic_vector( 1 downto 0) ); end entity; @@ -64,6 +92,24 @@ architecture arch of trb_net16_cri_interface is signal io_data_in : std_logic_vector(4*16-1 downto 0); signal io_packet_num_in : std_logic_vector(4*3-1 downto 0); signal io_error_in : std_logic_vector(2 downto 0); + + signal cfg_gbe_enable : std_logic; + signal cfg_ipu_enable : std_logic; + signal cfg_mult_enable : std_logic; + signal cfg_subevent_id : std_logic_vector(31 downto 0); + signal cfg_subevent_dec : std_logic_vector(31 downto 0); + signal cfg_queue_dec : std_logic_vector(31 downto 0); + signal cfg_readout_ctr : std_logic_vector(23 downto 0); + signal cfg_readout_ctr_valid : std_logic; + signal cfg_insert_ttype : std_logic; + signal cfg_max_sub : std_logic_vector(15 downto 0); + signal cfg_max_queue : std_logic_vector(15 downto 0); + signal cfg_max_subs_in_queue : std_logic_vector(15 downto 0); + signal cfg_max_single_sub : std_logic_vector(15 downto 0); + signal cfg_additional_hdr : std_logic; + signal cfg_soft_rst : std_logic; + signal cfg_allow_rx : std_logic; + signal cfg_max_frame : std_logic_vector(15 downto 0); begin @@ -181,7 +227,110 @@ begin MED_READ_OUT => io_read_out(0) ); ---iobuf on streaming api, towards CRI, data channel +--------------------------------------------------------------------- +-- TrbNet Data Readout +--------------------------------------------------------------------- + trbnet_gen : if INCLUDE_READOUT = '1' generate + + TrbNetData : trb_net16_gbe_response_constructor_TrbNetData + generic map( + RX_PATH_ENABLE => 0, + DO_SIMULATION => 0, + READOUT_BUFFER_SIZE => READOUT_BUFFER_SIZE + ) + port map( + CLK => CLK, + RESET => reset_i_mux_io, + + -- INTERFACE + MY_MAC_IN => (others => '0'), + MY_IP_IN => (others => '0'), + PS_DATA_IN => (others => '0'), + PS_WR_EN_IN => '0', + PS_ACTIVATE_IN => '0', + PS_RESPONSE_READY_OUT => open,--resp_ready(3), -- TODO: make use of it + PS_BUSY_OUT => open,--busy(3), -- TODO: make use of it + PS_SELECTED_IN => '1', + PS_SRC_MAC_ADDRESS_IN => (others => '0'), + PS_DEST_MAC_ADDRESS_IN => (others => '0'), + PS_SRC_IP_ADDRESS_IN => (others => '0'), + PS_DEST_IP_ADDRESS_IN => (others => '0'), + PS_SRC_UDP_PORT_IN => (others => '0'), + PS_DEST_UDP_PORT_IN => (others => '0'), + + -- BEGIN TODO : Connect this to the ouside world. Now data is just thrown away + TC_RD_EN_IN => '1',--TC_RD_EN_IN, + TC_DATA_OUT => open,--tc_data(4 * 9 - 1 downto 3 * 9), + TC_FRAME_SIZE_OUT => open,--tc_size(4 * 16 - 1 downto 3 * 16), + TC_FRAME_TYPE_OUT => open,--tc_type(4 * 16 - 1 downto 3 * 16), + TC_IP_PROTOCOL_OUT => open,--tc_ip_proto(4 * 8 - 1 downto 3 * 8), + TC_IDENT_OUT => open,--tc_ident(4 * 16 - 1 downto 3 * 16), + -- END TODO + + TC_DEST_MAC_OUT => open, + TC_DEST_IP_OUT => open, + TC_DEST_UDP_OUT => open, + TC_SRC_MAC_OUT => open, + TC_SRC_IP_OUT => open, + TC_SRC_UDP_OUT => open, + STAT_DATA_OUT => open, + STAT_ADDR_OUT => open, + STAT_DATA_RDY_OUT => open, + STAT_DATA_ACK_IN => '0', + DEBUG_OUT => open,--MONITOR_SELECT_GEN_DBG_OUT(4 * 64 - 1 downto 3 * 64), + -- END OF INTERFACE + + -- CTS interface + CTS_NUMBER_IN => CTS_NUMBER_IN, + CTS_CODE_IN => CTS_CODE_IN, + CTS_INFORMATION_IN => CTS_INFORMATION_IN, + CTS_READOUT_TYPE_IN => CTS_READOUT_TYPE_IN, + CTS_START_READOUT_IN => CTS_START_READOUT_IN, + CTS_DATA_OUT => open, + CTS_DATAREADY_OUT => open, + CTS_READOUT_FINISHED_OUT => CTS_READOUT_FINISHED_OUT, + CTS_READ_IN => '1', + CTS_LENGTH_OUT => open, + CTS_ERROR_PATTERN_OUT => CTS_STATUS_BITS_OUT, + -- Data payload interface + FEE_DATA_IN => FEE_DATA_IN, + FEE_DATAREADY_IN => FEE_DATAREADY_IN, + FEE_READ_OUT => FEE_READ_OUT, + FEE_STATUS_BITS_IN => FEE_STATUS_BITS_IN, + FEE_BUSY_IN => FEE_BUSY_IN, + -- ip configurator + SLV_ADDR_IN => (others => '0'), + SLV_READ_IN => '0', + SLV_WRITE_IN => '0', + SLV_BUSY_OUT => open, + SLV_ACK_OUT => open, + SLV_DATA_IN => (others => '0'), + SLV_DATA_OUT => open, + CFG_GBE_ENABLE_IN => cfg_gbe_enable, + CFG_IPU_ENABLE_IN => cfg_ipu_enable, + CFG_MULT_ENABLE_IN => cfg_mult_enable, + CFG_SUBEVENT_ID_IN => cfg_subevent_id, + CFG_SUBEVENT_DEC_IN => cfg_subevent_dec, + CFG_QUEUE_DEC_IN => cfg_queue_dec, + CFG_READOUT_CTR_IN => cfg_readout_ctr, + CFG_READOUT_CTR_VALID_IN => cfg_readout_ctr_valid, + CFG_INSERT_TTYPE_IN => cfg_insert_ttype, + CFG_MAX_SUB_IN => cfg_max_sub, + CFG_MAX_QUEUE_IN => cfg_max_queue, + CFG_MAX_SUBS_IN_QUEUE_IN => cfg_max_subs_in_queue, + CFG_MAX_SINGLE_SUB_IN => cfg_max_single_sub, + CFG_AUTO_THROTTLE_IN => '0', + CFG_THROTTLE_PAUSE_IN => (others => '0'), + MONITOR_SELECT_REC_OUT => open,--MONITOR_SELECT_REC_OUT(4 * 32 - 1 downto 3 * 32), + MONITOR_SELECT_REC_BYTES_OUT => open,--MONITOR_SELECT_REC_BYTES_OUT(4 * 32 - 1 downto 3 * 32), + MONITOR_SELECT_SENT_BYTES_OUT => open,--MONITOR_SELECT_SENT_BYTES_OUT(4 * 32 - 1 downto 3 * 32), + MONITOR_SELECT_SENT_OUT => open,--MONITOR_SELECT_SENT_OUT(4 * 32 - 1 downto 3 * 32), + MONITOR_SELECT_DROP_OUT_OUT => open,--MONITOR_SELECT_DROP_OUT_OUT(4 * 32 - 1 downto 3 * 32), + MONITOR_SELECT_DROP_IN_OUT => open, + DATA_HIST_OUT => open--DATA_HIST_OUT + ); + + --iobuf on streaming api, towards CRI, data channel -- THE_IOBUF_1 : trb_net16_iobuf -- generic map( -- IBUF_DEPTH => 6, @@ -243,10 +392,15 @@ begin -- STAT_INIT_OBUF_DEBUG => open, -- STAT_REPLY_OBUF_DEBUG => open, -- TIMER_TICKS_IN => TIMER_TICKS_IN --- ); +-- ); + end generate trbnet_gen; + + --- terminate data channel; debug mode - THE_IOBUF_1 : trb_net16_term_buf + + no_readout_gen : if INCLUDE_READOUT = '0' generate + -- terminate data channel if no readout + THE_IOBUF_1 : trb_net16_term_buf port map ( -- Misc CLK => CLK , @@ -267,7 +421,14 @@ begin MED_DATA_IN => io_data_in(31 downto 16), MED_PACKET_NUM_IN => io_packet_num_in(5 downto 3), MED_READ_OUT => io_read_out(1) - ); + ); + + --Clean Data Output + CTS_READOUT_FINISHED_OUT <= '0'; + CTS_STATUS_BITS_OUT <= (others => '0'); + FEE_READ_OUT <= '0'; + end generate no_readout_gen; + --who cares about an unused channel? THE_IOBUF_2 : trb_net16_term_buf @@ -387,6 +548,60 @@ begin ); io_error_in <= MEDIA_MED2INT(0).stat_op(2 downto 0); + + SETUP : gbe_setup + port map( + CLK => CLK, + RESET => reset_i_mux_io, + + -- interface to regio bus + BUS_ADDR_IN => BUS_REG_RX.addr(7 downto 0), + BUS_DATA_IN => BUS_REG_RX.data, + BUS_DATA_OUT => BUS_REG_TX.data, + BUS_WRITE_EN_IN => BUS_REG_RX.write, + BUS_READ_EN_IN => BUS_REG_RX.read, + BUS_ACK_OUT => BUS_REG_TX.ack, + + -- output to gbe_buf + GBE_SUBEVENT_ID_OUT => cfg_subevent_id, + GBE_SUBEVENT_DEC_OUT => cfg_subevent_dec, + GBE_QUEUE_DEC_OUT => cfg_queue_dec, + GBE_MAX_FRAME_OUT => cfg_max_frame, + GBE_USE_GBE_OUT => cfg_gbe_enable, + GBE_USE_TRBNET_OUT => cfg_ipu_enable, + GBE_USE_MULTIEVENTS_OUT => cfg_mult_enable, + GBE_READOUT_CTR_OUT => cfg_readout_ctr, + GBE_READOUT_CTR_VALID_OUT => cfg_readout_ctr_valid, + GBE_ALLOW_RX_OUT => cfg_allow_rx, + GBE_ADDITIONAL_HDR_OUT => cfg_additional_hdr, + GBE_INSERT_TTYPE_OUT => cfg_insert_ttype, + GBE_SOFT_RESET_OUT => cfg_soft_rst, + GBE_MAX_REPLY_OUT => open, -- is for SLWCNTR + GBE_MAX_SUB_OUT => cfg_max_sub, + GBE_MAX_QUEUE_OUT => cfg_max_queue, + GBE_MAX_SUBS_IN_QUEUE_OUT => cfg_max_subs_in_queue, + GBE_MAX_SINGLE_SUB_OUT => cfg_max_single_sub, + GBE_AUTOTHROTTLE_OUT => open, + GBE_THROTTLE_PAUSE_OUT => open, + MONITOR_RX_BYTES_IN => (others => '0'), --sum_rx_bytes, + MONITOR_RX_FRAMES_IN => (others => '0'), --sum_rx_frames, + MONITOR_TX_BYTES_IN => (others => '0'), --sum_tx_bytes, + MONITOR_TX_FRAMES_IN => (others => '0'), --sum_tx_frames, + MONITOR_TX_PACKETS_IN => (others => '0'), --sum_tx_packets, + MONITOR_DROPPED_IN => (others => '0'), --sum_dropped, + MONITOR_SELECT_REC_IN => (others => '0'), --dbg_select_rec, + MONITOR_SELECT_REC_BYTES_IN => (others => '0'), --dbg_select_rec_bytes, + MONITOR_SELECT_SENT_BYTES_IN => (others => '0'), --dbg_select_sent_bytes, + MONITOR_SELECT_SENT_IN => (others => '0'), --dbg_select_sent, + MONITOR_SELECT_DROP_IN_IN => (others => '0'), --dbg_select_drop_in, + MONITOR_SELECT_DROP_OUT_IN => (others => '0'), --dbg_select_drop_out, + MONITOR_SELECT_GEN_DBG_IN => (others => '0'), --monitor_gen_dbg, --dbg_select_gen, + + DUMMY_EVENT_SIZE_OUT => open,--dummy_event, + DUMMY_TRIGGERED_MODE_OUT => open, + DATA_HIST_IN => (others => (others => '0')), --dbg_hist, + SCTRL_HIST_IN => (others => (others => '0')) --dbg_hist2 + ); end architecture; -- 2.43.0