From 1fbbb40cb98b223b4335336c39392b165bbddbdd Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Mon, 9 Jan 2023 15:46:49 +0100 Subject: [PATCH] update prj files --- cbmrich/trb5sc_cbmrich.prj | 1 - gbe_standalone/trb5sc_gbe_template.prj | 1 - mimosis/trb5sc_mimosis.prj | 1 - or_logic_rj45/trb5sc_or_logic_rj45.prj | 1 - tdc16clk/trb5sc_mdctdc.prj | 1 - template/trb5sc_template.prj | 5 ++--- 6 files changed, 2 insertions(+), 8 deletions(-) diff --git a/cbmrich/trb5sc_cbmrich.prj b/cbmrich/trb5sc_cbmrich.prj index 728ad6a..79ced77 100644 --- a/cbmrich/trb5sc_cbmrich.prj +++ b/cbmrich/trb5sc_cbmrich.prj @@ -117,7 +117,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" diff --git a/gbe_standalone/trb5sc_gbe_template.prj b/gbe_standalone/trb5sc_gbe_template.prj index 9cd3de6..bd8fe46 100644 --- a/gbe_standalone/trb5sc_gbe_template.prj +++ b/gbe_standalone/trb5sc_gbe_template.prj @@ -105,7 +105,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" diff --git a/mimosis/trb5sc_mimosis.prj b/mimosis/trb5sc_mimosis.prj index ccbecb7..45d1a4c 100644 --- a/mimosis/trb5sc_mimosis.prj +++ b/mimosis/trb5sc_mimosis.prj @@ -107,7 +107,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" add_file -vhdl -lib work "../../trb3sc/code/common_i2c.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" diff --git a/or_logic_rj45/trb5sc_or_logic_rj45.prj b/or_logic_rj45/trb5sc_or_logic_rj45.prj index e6964ef..9f634b5 100644 --- a/or_logic_rj45/trb5sc_or_logic_rj45.prj +++ b/or_logic_rj45/trb5sc_or_logic_rj45.prj @@ -103,7 +103,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" diff --git a/tdc16clk/trb5sc_mdctdc.prj b/tdc16clk/trb5sc_mdctdc.prj index f04d564..e9741b4 100644 --- a/tdc16clk/trb5sc_mdctdc.prj +++ b/tdc16clk/trb5sc_mdctdc.prj @@ -102,7 +102,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" diff --git a/template/trb5sc_template.prj b/template/trb5sc_template.prj index ab9a75d..5fa2ccd 100644 --- a/template/trb5sc_template.prj +++ b/template/trb5sc_template.prj @@ -103,7 +103,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" @@ -148,10 +147,10 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd" ######################################### #channel 0, backplane -#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd" +add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd" #channel 1, SFP -add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd" +#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd" ########################################## add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd" -- 2.43.0