From 211df9d18b54855118933c0275ba53c2902942b6 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Wed, 15 Jan 2014 14:12:47 +0100 Subject: [PATCH] bugfix for padding correction --- trb_net16_api_base.vhd | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/trb_net16_api_base.vhd b/trb_net16_api_base.vhd index 1856306..40128ea 100644 --- a/trb_net16_api_base.vhd +++ b/trb_net16_api_base.vhd @@ -106,6 +106,7 @@ architecture trb_net16_api_base_arch of trb_net16_api_base is signal fifo_to_int_read : std_logic; signal fifo_to_int_full : std_logic; signal fifo_to_int_empty : std_logic; + signal last_fifo_to_int_empty : std_logic; -- signals for the INT to APL: signal fifo_to_apl_data_in : std_logic_vector(c_DATA_WIDTH-1 downto 0) := (others => '0'); @@ -772,7 +773,7 @@ INT_MASTER_DATAREADY_OUT <= buf_INT_MASTER_DATAREADY_OUT; next_INT_MASTER_DATAREADY_OUT <= sbuf_free and ((fifo_to_int_read_before or master_counter(2)) or --write data from fifo (fifo_to_int_empty and not master_counter(2))); --fill with padding words - if fifo_to_int_empty = '1' then + if last_fifo_to_int_empty = '1' then out_select <= PAD; end if; if master_counter = c_F3 and fifo_to_int_empty = '1' and sbuf_free = '1' then @@ -809,6 +810,7 @@ INT_MASTER_DATAREADY_OUT <= buf_INT_MASTER_DATAREADY_OUT; state_to_int <= next_state_to_int; send_trm_wrong_addr <= next_send_trm_wrong_addr; fifo_was_not_empty <= next_fifo_was_not_empty; + last_fifo_to_int_empty <= fifo_to_int_empty; end if; end if; end process; -- 2.43.0