From 2475dd208986406fe7beebf7110cc8ba99c16afa Mon Sep 17 00:00:00 2001 From: hadaq Date: Tue, 20 Mar 2007 17:19:12 +0000 Subject: [PATCH] new sbuf version, Ingo --- trb_net_ibuf.vhd | 8 ++-- trb_net_sbuf.vhd | 85 ++++++++++++++++++++++++++++------------ xilinx/shift_lut_x16.vhd | 2 +- 3 files changed, 63 insertions(+), 32 deletions(-) diff --git a/trb_net_ibuf.vhd b/trb_net_ibuf.vhd index ea974e6..2f6bca7 100644 --- a/trb_net_ibuf.vhd +++ b/trb_net_ibuf.vhd @@ -208,22 +208,21 @@ reg_buffer: process(CLK) current_last_header, tmp_INT_DATAREADY_OUT, INT_READ_IN, release_locked, is_locked, sbuf_free, fifo_empty) begin - tmp_INT_DATA_OUT <= (others => '1'); + -- tmp_INT_DATA_OUT <= (others => '1'); + tmp_INT_DATA_OUT <= fifo_data_out; tmp_INT_DATAREADY_OUT <= '0'; got_eob_out <= '0'; fifo_read <= '0'; got_locked <= is_locked; next_last_header <= current_last_header; - + if fifo_empty = '0' then if sbuf_free = '1' and fifo_data_out(TYPE_POSITION) = TYPE_DAT then -- next data word can be registered - tmp_INT_DATA_OUT <= fifo_data_out; tmp_INT_DATAREADY_OUT <= '1'; fifo_read <= '1'; elsif sbuf_free = '1' and fifo_data_out(TYPE_POSITION) = TYPE_TRM then got_eob_out <= '1'; --exactly when buffer is killed - tmp_INT_DATA_OUT <= fifo_data_out; tmp_INT_DATAREADY_OUT <= '1'; if release_locked = '0' then got_locked <= '1'; @@ -231,7 +230,6 @@ reg_buffer: process(CLK) fifo_read <= '1'; elsif sbuf_free = '1' and fifo_data_out(TYPE_POSITION) = TYPE_HDR then next_last_header <= fifo_data_out; - tmp_INT_DATA_OUT <= fifo_data_out; tmp_INT_DATAREADY_OUT <= '1'; fifo_read <= '1'; elsif fifo_data_out(TYPE_POSITION) = TYPE_EOB then diff --git a/trb_net_sbuf.vhd b/trb_net_sbuf.vhd index ca49fd1..344d99d 100644 --- a/trb_net_sbuf.vhd +++ b/trb_net_sbuf.vhd @@ -16,6 +16,7 @@ use work.trb_net_std.all; entity trb_net_sbuf is generic (DATA_WIDTH : integer := 56); +-- generic (DATA_WIDTH : integer := 1); port( -- Misc @@ -48,14 +49,14 @@ architecture trb_net_sbuf_arch of trb_net_sbuf is signal current_b2_buffer, next_b2_buffer : STD_LOGIC_VECTOR (DATA_WIDTH-1 downto 0); signal next_next_READ_OUT, current_next_READ_OUT : std_logic; signal next_SYN_DATAREADY_OUT, current_SYN_DATAREADY_OUT : std_logic; + + signal move_b1_buffer, move_b2_buffer: std_logic; type BUFFER_STATE is (BUFFER_EMPTY, BUFFER_B2_FULL, BUFFER_B1_FULL); signal current_buffer_state, next_buffer_state : BUFFER_STATE; - signal test_buffer_state : STD_LOGIC_VECTOR (1 downto 0); - signal current_got_overflow, next_got_overflow : std_logic; - + signal combined_COMB_DATAREADY_IN: std_logic; begin COMB_next_READ_OUT <= current_next_READ_OUT; @@ -64,6 +65,8 @@ architecture trb_net_sbuf_arch of trb_net_sbuf is STAT_BUFFER(0) <= current_got_overflow; STAT_BUFFER(31 downto 1) <= (others => '0'); + + combined_COMB_DATAREADY_IN <= (COMB_DATAREADY_IN and COMB_READ_IN); COMB: process (current_buffer_state, COMB_DATAREADY_IN, COMB_READ_IN, SYN_READ_IN, COMB_DATA_IN, current_b1_buffer, current_b2_buffer, @@ -71,36 +74,44 @@ COMB: process (current_buffer_state, COMB_DATAREADY_IN, COMB_READ_IN, begin -- process COMB next_buffer_state <= current_buffer_state; next_next_READ_OUT <= '1'; - next_b2_buffer <= current_b2_buffer; - next_b1_buffer <= current_b1_buffer; +-- next_b2_buffer <= current_b2_buffer; +-- next_b1_buffer <= current_b1_buffer; + next_b1_buffer <= COMB_DATA_IN; + next_b2_buffer <= COMB_DATA_IN; + move_b1_buffer <= '0'; + move_b2_buffer <= '0'; + next_SYN_DATAREADY_OUT <= current_SYN_DATAREADY_OUT; next_got_overflow <= current_got_overflow; - test_buffer_state <= "00"; + if current_buffer_state = BUFFER_EMPTY then - test_buffer_state <= "01"; - if COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' then + + if combined_COMB_DATAREADY_IN = '1' then -- COMB logic is writing into the sbuf next_buffer_state <= BUFFER_B2_FULL; next_next_READ_OUT <= '0'; - next_b2_buffer <= COMB_DATA_IN; +-- next_b2_buffer <= COMB_DATA_IN; + move_b2_buffer <= '1'; next_SYN_DATAREADY_OUT <= '1'; end if; elsif current_buffer_state = BUFFER_B2_FULL then - test_buffer_state <= "10"; - if COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' and SYN_READ_IN = '1' then + + if combined_COMB_DATAREADY_IN = '1' and SYN_READ_IN = '1' then -- COMB logic is writing into the sbuf -- at the same time syn port is reading next_buffer_state <= BUFFER_B2_FULL; next_next_READ_OUT <= '0'; - next_b2_buffer <= COMB_DATA_IN; +-- next_b2_buffer <= COMB_DATA_IN; + move_b2_buffer <= '1'; next_SYN_DATAREADY_OUT <= '1'; - elsif COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' then + elsif combined_COMB_DATAREADY_IN = '1' then -- ONLY COMB logic is writing into the sbuf -- this is the case when we should use the additional -- buffer next_buffer_state <= BUFFER_B1_FULL; next_next_READ_OUT <= '0'; --PLEASE stop writing - next_b1_buffer <= COMB_DATA_IN; +-- next_b1_buffer <= COMB_DATA_IN; + move_b1_buffer <= '1'; next_SYN_DATAREADY_OUT <= '1'; elsif SYN_READ_IN = '1' then next_buffer_state <= BUFFER_EMPTY; @@ -111,16 +122,18 @@ begin -- process COMB next_SYN_DATAREADY_OUT <= '1'; end if; elsif current_buffer_state = BUFFER_B1_FULL then - test_buffer_state <= "11"; - if COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' and SYN_READ_IN = '1' then + + if combined_COMB_DATAREADY_IN = '1' and SYN_READ_IN = '1' then -- COMB logic is writing into the sbuf -- at the same time syn port is reading next_buffer_state <= BUFFER_B1_FULL; next_next_READ_OUT <= '0'; - next_b1_buffer <= COMB_DATA_IN; +-- next_b1_buffer <= COMB_DATA_IN; next_b2_buffer <= current_b1_buffer; + move_b1_buffer <= '1'; + move_b2_buffer <= '1'; next_SYN_DATAREADY_OUT <= '1'; - elsif COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' then + elsif combined_COMB_DATAREADY_IN = '1' then -- ONLY COMB logic is writing into the sbuf -- FATAL ERROR next_got_overflow <= '1'; @@ -130,7 +143,7 @@ begin -- process COMB elsif SYN_READ_IN = '1' then next_buffer_state <= BUFFER_B2_FULL; next_next_READ_OUT <= '0'; - next_b2_buffer <= current_b1_buffer; +-- next_b2_buffer <= current_b1_buffer; next_SYN_DATAREADY_OUT <= '1'; else next_buffer_state <= BUFFER_B1_FULL; @@ -147,27 +160,47 @@ end process COMB; if RESET = '1' then current_buffer_state <= BUFFER_EMPTY; current_got_overflow <= '0'; - current_b1_buffer <= (others => '0'); - current_b2_buffer <= (others => '0'); current_SYN_DATAREADY_OUT <= '0'; current_next_READ_OUT <= '0'; elsif CLK_EN = '1' then current_buffer_state <= next_buffer_state; current_got_overflow <= next_got_overflow; - current_b1_buffer <= next_b1_buffer; - current_b2_buffer <= next_b2_buffer; current_SYN_DATAREADY_OUT <= next_SYN_DATAREADY_OUT; current_next_READ_OUT <= next_next_READ_OUT; else current_buffer_state <= current_buffer_state; current_got_overflow <= current_got_overflow; - current_b1_buffer <= current_b1_buffer; - current_b2_buffer <= current_b2_buffer; current_SYN_DATAREADY_OUT <= current_SYN_DATAREADY_OUT; current_next_READ_OUT <= current_next_READ_OUT; end if; end if; - end process; + end process; + + REG2 : process(CLK) + begin + if rising_edge(CLK) then + if RESET = '1' then + current_b1_buffer <= (others => '0'); + elsif move_b1_buffer = '1' then + current_b1_buffer <= next_b1_buffer; + else + current_b1_buffer <= current_b1_buffer; + end if; + end if; +end process; + REG3 : process(CLK) + begin + if rising_edge(CLK) then + if RESET = '1' then + current_b2_buffer <= (others => '0'); + elsif move_b2_buffer = '1' then + current_b2_buffer <= next_b2_buffer; + else + current_b2_buffer <= current_b2_buffer; + end if; + end if; + end process; + diff --git a/xilinx/shift_lut_x16.vhd b/xilinx/shift_lut_x16.vhd index e26b758..138a45c 100644 --- a/xilinx/shift_lut_x16.vhd +++ b/xilinx/shift_lut_x16.vhd @@ -50,7 +50,7 @@ begin SHIFT_CHAIN(0) <= D; -- -- ShiftRegister Instantiations -U_SRLC16E_INST: for i in 0 to (2**ADDRESS_WIDTH) generate +U_SRLC16E_INST: for i in 0 to ((2**(ADDRESS_WIDTH))-1) generate -- U_SRLC16E: SRLC16E port map ( -- 2.43.0