From 29bcb2ae57c8a07bcdf679167e8dec977329e35b Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Wed, 10 Nov 2010 18:47:06 +0000
Subject: [PATCH] FIFO_TOGGLE_BIT-BUG Workaround com_reset()

---
 libtrbnet/trbnet.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c
index 3122e4b..6f475aa 100644
--- a/libtrbnet/trbnet.c
+++ b/libtrbnet/trbnet.c
@@ -1,4 +1,4 @@
-const char trbnet_version[] = "$Revision: 2.91 $";
+const char trbnet_version[] = "$Revision: 2.92 $";
 
 #include <stdlib.h>
 #include <signal.h>
@@ -422,7 +422,7 @@ static int trb_wait_tx_not_busy(uint8_t channel)
 static int trb_init_transfer(uint8_t channel)
 {
   uint32_t tmp = 0;
-  
+
   if (channel >= 4) {
     trb_errno = TRB_INVALID_CHANNEL;
     return -1;
@@ -430,12 +430,23 @@ static int trb_init_transfer(uint8_t channel)
   
   /* Check for TX not Busy */
   read32_from_FPGA(CHANNEL_N_SENDER_STATUS | ((channel * 2 + 1) << 4), &tmp);
+  if (tmp != 0) {
+    /* FIFO_TOGGLE_BIT-BUG Workaround */
+    com_reset();
+  }
+  read32_from_FPGA(CHANNEL_N_SENDER_STATUS | ((channel * 2 + 1) << 4), &tmp);
   if (tmp != 0) {
     trb_errno = TRB_TX_BUSY;
     return -1;
   }
   
   /* Check receiver FIFO empty*/
+  read32_from_FPGA(CHANNEL_N_RECEIVER_FIFO_STATUS | ((channel * 2 + 1) << 4), 
+                   &tmp);
+  if ((tmp & MASK_FIFO_EMPTY) == 0) {
+    /* FIFO_TOGGLE_BIT-BUG Workaround */
+    com_reset();
+  }
   read32_from_FPGA(CHANNEL_N_RECEIVER_FIFO_STATUS | ((channel * 2 + 1) << 4), 
                    &tmp);
   if ((tmp & MASK_FIFO_EMPTY) == 0) {
-- 
2.43.0