From 30287e5f805eacd2cf4ea305ef65f9b1820c06bd Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Mon, 2 Jul 2018 10:43:25 +0200 Subject: [PATCH] validate trigger must not do checks on its own --- releases/tdc_v2.3/TDC_record.vhd | 7 ++-- releases/tdc_v2.3/TriggerHandler.vhd | 54 +++++++++++++++++----------- 2 files changed, 37 insertions(+), 24 deletions(-) diff --git a/releases/tdc_v2.3/TDC_record.vhd b/releases/tdc_v2.3/TDC_record.vhd index f9c9828..81a3b3c 100644 --- a/releases/tdc_v2.3/TDC_record.vhd +++ b/releases/tdc_v2.3/TDC_record.vhd @@ -475,7 +475,7 @@ begin valid_trg_rdo <= busreadout_rx.valid_notiming_trg or busreadout_rx.valid_timing_trg; -- Timing Trigger handler - TheTriggerHandler : TriggerHandler + TheTriggerHandler : entity work.TriggerHandler generic map ( TRIGGER_NUM => 1, PHYSICAL_EVENT_TRG_NUM => 0) @@ -486,8 +486,9 @@ begin RESET_TRG => reset_rdo, RESET_RDO => reset_rdo, RESET_TDC => reset_tdc, - VALID_TIMING_TRG_IN => trg_handler_trg_valid, + VALID_TIMING_TRG_IN => busreadout_rx.valid_timing_trg, VALID_NOTIMING_TRG_IN => busreadout_rx.valid_notiming_trg, + INVALID_TRG_IN => busreadout_rx.invalid_trg, TRG_TYPE_IN => busreadout_rx.trg_type, TRG_RELEASE_IN => busreadout_tx.busy_release, TRG_IN(0) => trg_in, @@ -504,7 +505,7 @@ begin DEBUG_OUT => trg_handler_status_registers ); trg_in <= REFERENCE_TIME; - trg_handler_trg_valid <= busreadout_rx.valid_timing_trg or busreadout_rx.invalid_trg; +-- trg_handler_trg_valid <= busreadout_rx.valid_timing_trg or busreadout_rx.invalid_trg; ------------------------------------------------------------------------------- -- Readout diff --git a/releases/tdc_v2.3/TriggerHandler.vhd b/releases/tdc_v2.3/TriggerHandler.vhd index 4310b36..7c168c4 100644 --- a/releases/tdc_v2.3/TriggerHandler.vhd +++ b/releases/tdc_v2.3/TriggerHandler.vhd @@ -31,6 +31,7 @@ entity TriggerHandler is RESET_TDC : in std_logic; VALID_TIMING_TRG_IN : in std_logic; VALID_NOTIMING_TRG_IN : in std_logic; + INVALID_TRG_IN : in std_logic; TRG_TYPE_IN : in std_logic_vector(3 downto 0); TRG_RELEASE_IN : in std_logic; TRG_IN : in std_logic_vector(TRIGGER_NUM-1 downto 0); @@ -66,6 +67,7 @@ architecture behavioral of TriggerHandler is signal trg_release_200 : std_logic; signal valid_timing_200 : std_logic; signal valid_notiming_200 : std_logic; + signal invalid_200 : std_logic; signal valid_trigger_flag : std_logic := '0'; -- trigger window signals type TrgWinCounter_FSM is (IDLE, COUNT, COUNT_CALIBRATION, VALIDATE_TRIGGER, WIN_END, @@ -133,18 +135,18 @@ trg_pulse_tdc(0) <= valid_timing_200; TRG_RDO_OUT <= trg_pulse_rdo when rising_edge(CLK_RDO); TRG_TDC_OUT <= trg_pulse_tdc when rising_edge(CLK_TDC); - ValidateTrigger : process (CLK_TDC) is - begin - if rising_edge(CLK_TDC) then -- rising clock edge - if RESET_TDC = '1' then - valid_trigger_flag <= '0'; - elsif valid_timing_200 = '1' then - valid_trigger_flag <= '1'; - elsif trg_release_200 = '1' then - valid_trigger_flag <= '0'; - end if; - end if; - end process ValidateTrigger; +-- ValidateTrigger : process (CLK_TDC) is +-- begin +-- if rising_edge(CLK_TDC) then -- rising clock edge +-- if RESET_TDC = '1' then +-- valid_trigger_flag <= '0'; +-- elsif valid_timing_200 = '1' then +-- valid_trigger_flag <= '1'; +-- elsif trg_release_200 = '1' then +-- valid_trigger_flag <= '0'; +-- end if; +-- end if; +-- end process ValidateTrigger; TriggerReleaseSync : entity work.pulse_sync port map ( @@ -164,6 +166,16 @@ trg_pulse_tdc(0) <= valid_timing_200; RESET_B_IN => RESET_TDC, PULSE_B_OUT => valid_timing_200); + + InValidTriggerSync : entity work.pulse_sync + port map ( + CLK_A_IN => CLK_RDO, + RESET_A_IN => RESET_RDO, + PULSE_A_IN => INVALID_TRG_IN, + CLK_B_IN => CLK_TDC, + RESET_B_IN => RESET_TDC, + PULSE_B_OUT => invalid_200); + ValidNoTriggerSync : entity work.pulse_sync port map ( CLK_A_IN => CLK_RDO, @@ -196,8 +208,8 @@ trg_pulse_tdc(0) <= valid_timing_200; DEBUG_OUT(31 downto 24) <= (others => '0'); FSM_TRIGGER_WINDOW_COMBINATIONAL : process (STATE_TW_CURRENT, trg_in_3r, TRG_WIN_EN_IN, - valid_notiming_200, TRG_TYPE_IN, trg_win_cnt, - TRG_WIN_POST_IN, valid_trigger_flag, trg_release_200) is + valid_notiming_200, TRG_TYPE_IN, trg_win_cnt, valid_timing_200, + TRG_WIN_POST_IN, valid_trigger_flag, trg_release_200, invalid_200) is begin -- Default values STATE_TW_NEXT <= STATE_TW_CURRENT; @@ -208,7 +220,7 @@ trg_pulse_tdc(0) <= valid_timing_200; case STATE_TW_CURRENT is when IDLE => - if valid_timing_200 = '1' and trg_in_3r(0) = '1' then + if valid_timing_200 = '1' then if TRG_WIN_EN_IN = '1' then STATE_TW_NEXT <= COUNT; else @@ -220,7 +232,7 @@ trg_pulse_tdc(0) <= valid_timing_200; else STATE_TW_NEXT <= WAIT_NEXT_TRIGGER; end if; - elsif valid_timing_200 = '1' then + elsif invalid_200 = '1' then STATE_TW_NEXT <= MISSING_REFERENCE_TIME; else STATE_TW_NEXT <= IDLE; @@ -246,11 +258,11 @@ trg_pulse_tdc(0) <= valid_timing_200; trg_win_state_debug_f <= x"4"; when VALIDATE_TRIGGER => - if valid_trigger_flag = '1' then - STATE_TW_NEXT <= WIN_END; - else - STATE_TW_NEXT <= VALIDATE_TRIGGER; - end if; +-- if valid_trigger_flag = '1' then + STATE_TW_NEXT <= WIN_END; +-- else +-- STATE_TW_NEXT <= VALIDATE_TRIGGER; +-- end if; trg_win_end_f <= '0'; trg_win_state_debug_f <= x"5"; -- 2.43.0