From 380a7c9e77459ab5ad3f1e25eef6271ba3b64922 Mon Sep 17 00:00:00 2001 From: Cahit Date: Mon, 7 Mar 2016 17:02:49 +0100 Subject: [PATCH] made project compatible with the last tdc version --- tdc_release | 2 +- tdctemplate/trb3sc_tdctemplate.lpf | 12 ++++++------ tdctemplate/trb3sc_tdctemplate.vhd | 1 + 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/tdc_release b/tdc_release index 8d7edce..01b50d4 120000 --- a/tdc_release +++ b/tdc_release @@ -1 +1 @@ -../tdc/releases/tdc_v2.2 \ No newline at end of file +../tdc/releases/tdc_v2.3 \ No newline at end of file diff --git a/tdctemplate/trb3sc_tdctemplate.lpf b/tdctemplate/trb3sc_tdctemplate.lpf index c702426..a5f0b63 100644 --- a/tdctemplate/trb3sc_tdctemplate.lpf +++ b/tdctemplate/trb3sc_tdctemplate.lpf @@ -1,8 +1,8 @@ -MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full_osc" 1 X ; -MULTICYCLE FROM CLKNET "clk_full_osc" TO CLKNET "clk_sys" 2 X ; +#MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full_osc" 1 X ; +#MULTICYCLE FROM CLKNET "clk_full_osc" TO CLKNET "clk_sys" 2 X ; -MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x; -MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x; +#MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x; +#MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x; -MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CLKNET clk_sys 5x; -MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full_osc 2x; +#MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CLKNET clk_sys 5x; +#MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full_osc 2x; diff --git a/tdctemplate/trb3sc_tdctemplate.vhd b/tdctemplate/trb3sc_tdctemplate.vhd index e2e16eb..0085b3d 100644 --- a/tdctemplate/trb3sc_tdctemplate.vhd +++ b/tdctemplate/trb3sc_tdctemplate.vhd @@ -456,6 +456,7 @@ TEST_LINE <= med_stat_debug(15 downto 0); BUS_RX => bustdc_rx, BUS_TX => bustdc_tx, -- Dubug signals + INFO_IN => timer, LOGIC_ANALYSER_OUT => logic_analyser_i ); -- 2.43.0