From 46ca2fa9f43933956d4d96ae4ed03968f7c8610c Mon Sep 17 00:00:00 2001
From: Michael Wiebusch <stratomaster@gmx.net>
Date: Thu, 19 Dec 2013 11:52:53 +0100
Subject: [PATCH] rearranged uC regs, so they match the new CbController.xml

---
 firmware/src/CB_functions.c | 25 +++++++++++++------------
 firmware/src/CB_functions.h |  2 +-
 firmware/src/main.c         | 21 +++++----------------
 firmware/src/periph_conf.c  | 11 +++++++++++
 firmware/src/periph_conf.h  |  2 ++
 5 files changed, 32 insertions(+), 29 deletions(-)

diff --git a/firmware/src/CB_functions.c b/firmware/src/CB_functions.c
index bfd3e7a..553dc18 100644
--- a/firmware/src/CB_functions.c
+++ b/firmware/src/CB_functions.c
@@ -11,9 +11,10 @@
 #include "stm32f10x_conf.h"
 
 
+extern uint16_t uC_regs[];
 
-void decode_register(uint8_t addr,uint16_t *registers) {
-  uint16_t thisRegister = registers[addr];
+void decode_register(uint8_t addr) {
+  uint16_t thisRegister = uC_regs[addr];
   switch (addr){
     case 0x0:
 //       thisRegister[thisRegister]++; // just for debug reasons
@@ -33,7 +34,7 @@ void decode_register(uint8_t addr,uint16_t *registers) {
       CB_GPIO_Out(SENSOREN0,thisRegister & 1<<1);
       CB_GPIO_Out(JTAGEN0,thisRegister & 1<<0);
       break;
-    case 0x2: // Switches1
+    case 0x6: // Switches1
       CB_GPIO_Out(ENAA1,thisRegister & 1<<5);
       CB_GPIO_Out(DISA1,thisRegister & 1<<4);
       CB_GPIO_Out(ENAD1,thisRegister & 1<<3);
@@ -42,7 +43,7 @@ void decode_register(uint8_t addr,uint16_t *registers) {
       CB_GPIO_Out(JTAGEN1,thisRegister & 1<<0);
       break;
       
-    case 0x10: // LEDs
+    case 0x11: // LEDs
       if(thisRegister & 1<<7) {
         CB_GPIO_Out(LED4,thisRegister & 1<<3);
       }
@@ -99,18 +100,18 @@ void init_CB_GPIO_Outputs(void) {
   CB_GPIO_Out_Lo(LED2);
   CB_GPIO_Out_Lo(LED3);
   CB_GPIO_Out_Lo(LED4);
-  CB_GPIO_Out_Hi(JTAGEN0);
-  CB_GPIO_Out_Hi(JTAGEN1);
-  CB_GPIO_Out_Hi(SENSOREN0);
-  CB_GPIO_Out_Hi(SENSOREN1);
+  CB_GPIO_Out_Lo(JTAGEN0);
+  CB_GPIO_Out_Lo(JTAGEN1);
+  CB_GPIO_Out_Lo(SENSOREN0);
+  CB_GPIO_Out_Lo(SENSOREN1);
   CB_GPIO_Out_Lo(DISD0);
   CB_GPIO_Out_Lo(DISA0);
   CB_GPIO_Out_Lo(DISD1);
   CB_GPIO_Out_Lo(DISA1);
-  CB_GPIO_Out_Hi(ENAD0);
-  CB_GPIO_Out_Hi(ENAA0);
-  CB_GPIO_Out_Hi(ENAD1);
-  CB_GPIO_Out_Hi(ENAA1);
+  CB_GPIO_Out_Lo(ENAD0);
+  CB_GPIO_Out_Lo(ENAA0);
+  CB_GPIO_Out_Lo(ENAD1);
+  CB_GPIO_Out_Lo(ENAA1);
 //   CB_GPIO_Out_Lo(OVCD_C0); //input!
 //   CB_GPIO_Out_Lo(OVCA_C0); //input!
 //   CB_GPIO_Out_Lo(OVCD_C1); //input!
diff --git a/firmware/src/CB_functions.h b/firmware/src/CB_functions.h
index b8c7b5a..9a1d00f 100644
--- a/firmware/src/CB_functions.h
+++ b/firmware/src/CB_functions.h
@@ -10,4 +10,4 @@
 
 
 void init_CB_GPIO_Outputs(void);
-void decode_register(uint8_t addr,uint16_t *registers);
\ No newline at end of file
+void decode_register(uint8_t addr);
\ No newline at end of file
diff --git a/firmware/src/main.c b/firmware/src/main.c
index df5932f..cee88b5 100644
--- a/firmware/src/main.c
+++ b/firmware/src/main.c
@@ -9,19 +9,21 @@
 #include "stm32f10x.h"
 #include "stm32f10x_conf.h" // contains all std periph includes
 #include "core_cm3.h"
+
 #include "stm32f10x_it.h"
-#include "periph_conf.h"
 #include <stdio.h>
-#include "newlib_stubs.c"
+
 #include "CB_functions.h"
 #include "usart1.h"
 #include "spi2.h"
+#include "periph_conf.h"
 
 
 #define UC_NO_REGS 17
 
 
 extern uint16_t SPIBuffer[];
+uint16_t uC_regs[UC_NO_REGS];
 
 GPIO_InitTypeDef GPIO_InitStructure;
 NVIC_InitTypeDef NVIC_InitStructure;
@@ -29,17 +31,12 @@ SPI_InitTypeDef SPI_InitStructure;
 USART_InitTypeDef USART_InitStructure;
 DMA_InitTypeDef DMA_InitStructure;
 
-uint16_t uC_regs[UC_NO_REGS];
 
 
 // prototypes for functions that are included in main.c
 
 void SysTick_Handler(void);
 
-void disable_JTAG(void);
-
-
-
 
 
 /* function prototypes */ 
@@ -152,15 +149,7 @@ void SysTick_Handler(void)
 }
 
 
-void disable_JTAG(void) {
-  
-//DISABLE JTAG, Enable SWD
-  RCC_APB2PeriphClockCmd(
-      RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO,
-      ENABLE);
-  GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); // Disable JTAG/SWD so pins are available
 
-}
 
 
 
@@ -196,7 +185,7 @@ void USART1_IRQHandler(void)
       byte0 = data;
       uC_regs[addr] = ((uint16_t) byte1)<<8 | (uint16_t) byte0;
       byte_counter = 0;
-      decode_register(addr,uC_regs);
+      decode_register(addr);
       break;
   }
 }      
diff --git a/firmware/src/periph_conf.c b/firmware/src/periph_conf.c
index 5f2495d..3b42978 100644
--- a/firmware/src/periph_conf.c
+++ b/firmware/src/periph_conf.c
@@ -149,3 +149,14 @@ void CB_GPIO_Out_Toggle(CB_GPIO_Pin_TypeDef Pin)
 {
   CB_GPIO_PORT[Pin]->ODR ^= CB_GPIO_PIN[Pin];
 }
+
+
+void disable_JTAG(void) {
+  
+//DISABLE JTAG, Enable SWD
+  RCC_APB2PeriphClockCmd(
+      RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO,
+      ENABLE);
+  GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); // Disable JTAG/SWD so pins are available
+
+}
\ No newline at end of file
diff --git a/firmware/src/periph_conf.h b/firmware/src/periph_conf.h
index 76ec968..3191a98 100644
--- a/firmware/src/periph_conf.h
+++ b/firmware/src/periph_conf.h
@@ -171,3 +171,5 @@ void CB_GPIO_Out_Hi(CB_GPIO_Pin_TypeDef Pin);
 void CB_GPIO_Out_Lo(CB_GPIO_Pin_TypeDef Pin);
 void CB_GPIO_Out_Toggle(CB_GPIO_Pin_TypeDef Pin);
 void CB_GPIO_Out(CB_GPIO_Pin_TypeDef Pin,uint16_t state);
+
+void disable_JTAG(void);
-- 
2.43.0