From 47c2e4b636b7480a82d261600f1b6fb6d9c80157 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Thu, 13 Apr 2017 15:46:11 +0200 Subject: [PATCH] FEE loads trigger number with first event after reset, event buffer checks event numbers and waits until matching event is requested. --- special/handler_ipu.vhd | 59 ++++++++++++++++++++++------------------ special/handler_lvl1.vhd | 7 ++++- 2 files changed, 39 insertions(+), 27 deletions(-) diff --git a/special/handler_ipu.vhd b/special/handler_ipu.vhd index 7f1dc78..408d132 100644 --- a/special/handler_ipu.vhd +++ b/special/handler_ipu.vhd @@ -51,7 +51,7 @@ end entity; architecture handler_ipu_arch of handler_ipu is type cnt10_DAT_t is array (DATA_INTERFACE_NUMBER-1 downto 0) of unsigned(15 downto 0); - type fsm_state_t is (IDLE, WAIT_FOR_LENGTH, WAITING_FOR_EVENT, SEND_DHDR, READ_DATA, END_READOUT); + type fsm_state_t is (IDLE, WAIT_FOR_LENGTH, SEND_DHDR, READ_DATA, END_READOUT, SEND_FAIL); signal current_state, next_state : fsm_state_t; signal state_bits : std_logic_vector(3 downto 0); @@ -60,12 +60,12 @@ architecture handler_ipu_arch of handler_ipu is signal error_sync : std_logic; signal error_missing, next_error_missing : std_logic; signal error_not_configured : std_logic; - signal lvl1_fifo_read, next_lvl1_fifo_read : std_logic; signal hdr_fifo_read, next_hdr_fifo_read : std_logic; signal hdr_fifo_valid_read, next_hdr_fifo_valid_read : std_logic; signal last_hdr_fifo_valid_read : std_logic; signal first_fifo_read, next_first_fifo_read : std_logic; + signal hdr_data_waiting, next_hdr_data_waiting : std_logic; signal dat_fifo_read : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); signal dat_fifo_select, next_dat_fifo_select : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); @@ -93,14 +93,13 @@ begin if rising_edge(CLOCK) then if RESET = '1' then current_state <= IDLE; - lvl1_fifo_read <= '0'; hdr_fifo_read <= '0'; + hdr_data_waiting <= '0'; else current_state <= next_state; error_not_found <= next_error_not_found; error_missing <= next_error_missing; error_lvl1 <= next_error_lvl1; - lvl1_fifo_read <= next_lvl1_fifo_read; hdr_fifo_read <= next_hdr_fifo_read; ipu_finished_i <= next_ipu_finished_i; ipu_dataready_i <= next_ipu_dataready_i; @@ -109,6 +108,7 @@ begin first_fifo_read <= next_first_fifo_read; dat_fifo_number <= next_dat_fifo_number; suppress_output <= next_suppress_output; + hdr_data_waiting <= next_hdr_data_waiting; end if; end if; end process; @@ -117,14 +117,13 @@ begin THE_FSM : process(current_state, error_not_found, IPU_START_READOUT_IN, DAT_HDR_DATA_EMPTY_IN, DAT_HDR_DATA_IN, last_hdr_fifo_valid_read, ipu_dataready_i, IPU_READ_IN, error_missing, dat_fifo_valid_read, next_dat_fifo_number, error_lvl1, - dat_fifo_finished, dat_fifo_number, DAT_DATA_IN, suppress_output) + dat_fifo_finished, dat_fifo_number, DAT_DATA_IN, suppress_output, hdr_data_waiting) begin next_state <= current_state; next_error_not_found <= error_not_found; next_error_missing <= error_missing; next_error_lvl1 <= error_lvl1; next_hdr_fifo_read <= '0'; - next_lvl1_fifo_read <= '0'; next_ipu_data_i <= (others => '0'); next_ipu_dataready_i <= '0'; next_ipu_finished_i <= '0'; @@ -135,10 +134,11 @@ begin case current_state is when IDLE => if IPU_START_READOUT_IN = '1' then - if DAT_HDR_DATA_EMPTY_IN = '0' then + if DAT_HDR_DATA_EMPTY_IN = '0' and hdr_data_waiting = '0' then next_state <= WAIT_FOR_LENGTH; - next_lvl1_fifo_read <= '1'; next_hdr_fifo_read <= '1'; + elsif hdr_data_waiting = '1' then + next_state <= WAIT_FOR_LENGTH; end if; next_error_not_found <= '0'; next_error_missing <= '0'; @@ -147,18 +147,19 @@ begin end if; when WAIT_FOR_LENGTH => - --missing: compare data flags and hdr fifo data --- next_state <= GOT_LENGTH; - if last_hdr_fifo_valid_read = '1' then - next_state <= SEND_DHDR; - next_suppress_output <= DAT_HDR_DATA_IN(28); - next_error_lvl1 <= DAT_HDR_DATA_IN(29); - next_error_missing <= DAT_HDR_DATA_IN(30); - end if; - --- when GOT_LENGTH => - - + if last_hdr_fifo_valid_read = '1' or hdr_data_waiting = '1' then + if DAT_HDR_DATA_IN(15 downto 0) = IPU_NUMBER_IN then + next_state <= SEND_DHDR; + next_suppress_output <= DAT_HDR_DATA_IN(28); + next_error_lvl1 <= DAT_HDR_DATA_IN(29); + next_error_missing <= DAT_HDR_DATA_IN(30); + next_hdr_data_waiting<= '0'; + else + next_state <= SEND_FAIL; + next_error_not_found <= '1'; + next_hdr_data_waiting <= '1'; + end if; + end if; when SEND_DHDR => next_ipu_data_i <= x"0" & DAT_HDR_DATA_IN(27 downto 0); @@ -182,16 +183,20 @@ begin next_ipu_dataready_i <= (dat_fifo_valid_read or (ipu_dataready_i and not IPU_READ_IN)); next_ipu_data_i <= DAT_DATA_IN(dat_fifo_number*32+31 downto dat_fifo_number*32); - + when SEND_FAIL => + next_ipu_dataready_i <= '1'; + next_ipu_data_i <= x"0" & DAT_HDR_DATA_IN(27 downto 0); + if ipu_dataready_i = '1' and IPU_READ_IN = '1' then + next_ipu_dataready_i <= '0'; + next_state <= END_READOUT; + end if; + when END_READOUT => next_ipu_finished_i <= '1'; if IPU_START_READOUT_IN = '0' then next_state <= IDLE; end if; - when WAITING_FOR_EVENT => - --CTS request came, but no data in Fifo yet - next_error_not_found <= '1'; end case; end process; @@ -258,7 +263,9 @@ begin next_hdr_fifo_valid_read <= hdr_fifo_read and not DAT_HDR_DATA_EMPTY_IN; hdr_fifo_valid_read <= next_hdr_fifo_valid_read; last_hdr_fifo_valid_read <= hdr_fifo_valid_read; - if last_hdr_fifo_valid_read = '1' then + if next_hdr_data_waiting = '1' then + total_length <= 0; + elsif last_hdr_fifo_valid_read = '1' then total_length <= next_total_length; end if; end if; @@ -424,4 +431,4 @@ assert ( STATUS_OUT(31 downto 24) <= (others => '0'); -end architecture; \ No newline at end of file +end architecture; diff --git a/special/handler_lvl1.vhd b/special/handler_lvl1.vhd index c318db2..5deb004 100644 --- a/special/handler_lvl1.vhd +++ b/special/handler_lvl1.vhd @@ -146,6 +146,7 @@ signal tmg_edge_found_i : std_logic; signal sr0 : std_logic; signal tmg_edge_async : std_logic; signal buf_STATUS_OUT : std_logic_vector(63 downto 0); +signal waiting_for_first : std_logic; begin @@ -496,10 +497,14 @@ begin if( rising_edge(CLOCK) ) then if ( (RESET = '1') ) then lvl1_int_trg_number <= (others => '0'); + waiting_for_first <= '1'; elsif( LVL1_INT_TRG_LOAD_IN = '1' ) then lvl1_int_trg_number <= unsigned(LVL1_INT_TRG_COUNTER_IN); elsif( lvl1_int_trg_ce = '1' ) then lvl1_int_trg_number <= lvl1_int_trg_number + to_unsigned(1,1); + elsif waiting_for_first = '1' and LVL1_TRG_RECEIVED_IN = '1' then + lvl1_int_trg_number <= unsigned(LVL1_TRG_NUMBER_IN); + waiting_for_first <= '0'; end if; end if; end process THE_INTERNAL_TRG_CTR_PROC; @@ -692,4 +697,4 @@ SPIKE_DETECTED_OUT <= short_tmg_trg; -- gk 29.09.10 DEBUG_OUT <= debug; -end architecture; \ No newline at end of file +end architecture; -- 2.43.0