From 484a96ec87428401e2a9e94166bc474024d16238 Mon Sep 17 00:00:00 2001
From: Hadaq in Frankfurt <hadaq@frankfurt>
Date: Thu, 7 Feb 2013 16:33:36 +0100
Subject: [PATCH] edited comments in startup script

---
 base/startup_example.sh | 72 +++++++++++++++++++++++------------------
 1 file changed, 41 insertions(+), 31 deletions(-)

diff --git a/base/startup_example.sh b/base/startup_example.sh
index 5651315..fb98a08 100755
--- a/base/startup_example.sh
+++ b/base/startup_example.sh
@@ -1,20 +1,22 @@
-# example startup file, tailored for trb046
+#This example start-up script as to be adapted to your setup!
 
-# You *have* to adapt the trbnetaddresses to get the CTS running
-# Also the destination MAC address has to be changed if you want to see data
 
-##### TRBNET #####
-# set the TRBNet addresses of the Endpoints
-#trbcmd s 0xb000000390381d28 0 0x0200
-#trbcmd s 0xa300000390381328 1 0x0201
-#trbcmd s 0x4800000390381628 2 0x0202
-#trbcmd s 0x1700000390382028 3 0x0203
-#trbcmd s 0xdc00000390380c28 5 0x8000
+####### TrbNet           #######
+################################
 
 # automatic setup of all trbnet addresses
 ~/daqtools/merge_serial_address.pl ~/daqtools/base/serials_trb3.db ~/daqtools/base/addresses_trb3.db > /dev/null
 
-##### Ethernet and UDP #######
+#If you need to use special addresses, generate your own addresses_trb3.db or state the addresses explicitly as shown below:
+#trbcmd s 0xb000000390381d28 0 0x0200
+
+
+
+
+####### Ethernet and UDP #######
+################################
+#Repeat this block for all boards using GbE
+
 trbcmd w 0x8000 0x8300 0x8000        #Subsystem ID in data files, should be equal to address
 trbcmd w 0x8000 0x8301 0x00020001
 trbcmd w 0x8000 0x8302 0x00030062
@@ -27,30 +29,38 @@ trbcmd w 0x8000 0x8308 0xffffff
 trbcmd w 0x8000 0x830b 0x7
 trbcmd w 0x8000 0x830d 0x0
 
-#mac address of the EB
-# cbmpc026_eth0: 90:f6:52:03:8f:c4
-trbcmd w 0x8000 0x8100 0x52038fc4    # lower 4 bytes of receiver Max
-trbcmd w 0x8000 0x8101 0x90f6 #upper byte
+trbcmd w 0x8000 0x8100 0x52038fc4    # lower 4 bytes of receiver Mac
+trbcmd w 0x8000 0x8101 0x90f6        # upper 2 bytes of receiver Mac
+trbcmd w 0x8000 0x8102 0xc0a80001    # destination IP 192.168.0.1
+trbcmd w 0x8000 0x8103 0xc350        # destination port: 50000
+trbcmd w 0x8000 0x8104 0xdead8001    # source IP
+trbcmd w 0x8000 0x8105 0x0230        # Lower 4 bytes of sender Mac
+trbcmd w 0x8000 0x8106 0xc0a80072    # Upper 2 byte of sender Mac
+trbcmd w 0x8000 0x8107 0xc350        # destination port
+trbcmd w 0x8000 0x8108 0x0578        
+
+
 
-# destination port and source IP and so on
-trbcmd w 0x8000 0x8102 0xc0a80001 # destination IP 192.168.0.1
-trbcmd w 0x8000 0x8103 0xc350     # destination port: 50000
-trbcmd w 0x8000 0x8104 0xdead8001 # source IP
-trbcmd w 0x8000 0x8105 0x0230     
-trbcmd w 0x8000 0x8106 0xc0a80072
-trbcmd w 0x8000 0x8107 0xc350     # source port
-trbcmd w 0x8000 0x8108 0x0578     #ignore
 
+####### TDC              #######
+################################
+# Settings for all TRB3-TDC-endpoints in the system
+trbcmd w 0xfe48 0xc0 0x00000001      # logic analyser control register
+trbcmd w 0xfe48 0xc1 0x000f0005      # trigger window enable & trigger window width (off if MSB not set)
+trbcmd w 0xfe48 0xc2 0xffffffff      # channel 32- 1 enable (0 is reference time and always on)
+trbcmd w 0xfe48 0xc3 0x00000000      # channel 64-33 enable
 
-#####  TDC  #######
-# 0xfe48 is the broadcast address of TDC-endpoints in the system
-trbcmd w 0xfe48 0xc0 0x00000001 ## logic analyser control register
-trbcmd w 0xfe48 0xc1 0x000f0005 ## trigger window enable & trigger window width
-trbcmd w 0xfe48 0xc2 0xffffffff ## channel 01-31 enable
-trbcmd w 0xfe48 0xc3 0x00000000 ## channel 32-63 enable
+#Settings for TDC inside CTS
+trbcmd w 0x8000 0xc0 0x00000001      # logic analyser control register
+trbcmd w 0x8000 0xc1 0x000f0005      # trigger window enable & trigger window width (off if MSB not set)
+trbcmd w 0x8000 0xc2 0x00000000      # channel 32- 1 enable (0 is reference time and always on)
+trbcmd w 0x8000 0xc3 0x00000000      # channel 64-33 enable
 
 
 
+####### CTS              #######
+################################
+#A dump of register settings can be obtained from the Web GUI!
 
-trbcmd w 0x8000 0xa137 0xfffff  #set CTS pulser to 100Hz
-trbcmd setbit 0x8000 0xa101 0x2 #enable pulser channel 0
+trbcmd w 0x8000 0xa137 0xfffff       #set CTS pulser 0 to 100Hz
+trbcmd setbit 0x8000 0xa101 0x2      #enable pulser 0
-- 
2.43.0