From 4ab59b1629e09d96562b06d3875efbb5a12d7084 Mon Sep 17 00:00:00 2001 From: Tobias Weber Date: Fri, 22 Sep 2017 10:48:52 +0200 Subject: [PATCH] new pixel control --- mupix/Mupix6/sources/MuPix3_PixCtr.vhd | 32 +++++++++++++++++++++----- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/mupix/Mupix6/sources/MuPix3_PixCtr.vhd b/mupix/Mupix6/sources/MuPix3_PixCtr.vhd index 119cc47..f8109bc 100644 --- a/mupix/Mupix6/sources/MuPix3_PixCtr.vhd +++ b/mupix/Mupix6/sources/MuPix3_PixCtr.vhd @@ -91,14 +91,15 @@ architecture Behavioral of PixCtr is signal config_fsm : config_fsm_type := idle; --check sum for data integrity - signal crc_checksum_out, crc_checksum_in : std_logic_vector(4 downto 0) := (others => '0'); signal crc_correct : std_logic; signal enable_crc_to_mupix : std_logic; signal data_in_crc_to_mupix : std_logic; signal crc_out_crc_to_mupix : std_logic_vector(4 downto 0); + signal reset_crc_to_mupix : std_logic; signal enable_crc_from_mupix : std_logic; signal data_in_crc_from_mupix : std_logic; signal crc_out_crc_from_mupix : std_logic_vector(4 downto 0); + signal reset_crc_from_mupix : std_logic; --control signals to mupix signal mupix_ctrl_i, mupix_ctrl_reg : MupixSlowControl := MuPixSlowControlInit; @@ -127,22 +128,26 @@ begin -- Behavioral generic map(detect_enable_edge => true) port map( clk => clk, - rst => reset, + rst => reset_crc_to_mupix, enable => enable_crc_to_mupix, data_in => data_in_crc_to_mupix, crc_out => crc_out_crc_to_mupix ); + reset_crc_to_mupix <= reset or controlConfig(2); + crc_out : entity work.CRC generic map(detect_enable_edge => true) port map( clk => clk, - rst => reset, + rst => reset_crc_from_mupix, enable => enable_crc_from_mupix, data_in => data_in_crc_from_mupix, crc_out => crc_out_crc_from_mupix ); + reset_crc_from_mupix <= reset or controlConfig(3); + spi_clk_div_proc : process (clk) is begin if rising_edge(clk) then @@ -178,6 +183,10 @@ begin -- Behavioral mupix_ctrl_i.ck_c <= '0'; mupix_ctrl_i.ck_d <= '0'; mupix_ctrl_i.sin <= '0'; + enable_crc_to_mupix <= '0'; + enable_crc_from_mupix <= '0'; + data_in_crc_from_mupix <= '0'; + data_in_crc_to_mupix <= '0'; case bit_send_fsm is when idle => bitcouner_word <= fifo_word_width - 1; @@ -199,11 +208,19 @@ begin -- Behavioral else mupix_ctrl_i.ck_c <= '1'; end if; + enable_crc_to_mupix <= '1'; + data_in_crc_to_mupix <= DataOut(bitcouner_word); bit_send_fsm <= sendbit3; sending <= '1'; when sendbit3 => sending <= '1'; mupix_ctrl_i.sin <= DataOut(bitcouner_word); + enable_crc_from_mupix <= '1'; + if controlConfig(0) = '1' then + data_in_crc_from_mupix <= sout_d_from_mupix; + else + data_in_crc_from_mupix <= sout_c_from_mupix; + end if; bitcouner_word <= bitcouner_word - 1; bitcounter <= bitcounter + 1; if bitcouner_word = 0 or bitcounter = bitstosend then @@ -288,7 +305,10 @@ begin -- Behavioral --x0080: input to fifo (write)/current fifo output (read) --x0081: current CRC check sum (read only) --x0082: data fifo is full (read only) - --x0083: configure bit 0: configure chip dacs/pixel dacs, bit 1: readback bit 32-16 number of config bits + --x0083: configure bit 0: configure chip dacs/pixel dacs, + -- bit 1: readback bit 32-16 number of config bits + -- bit 2: reset outgoing CRC sum + -- bit 3: reset incoming CRC sum ----------------------------------------------------------------------------- SLV_BUS : process (clk) begin -- process SLV_BUS @@ -320,7 +340,7 @@ begin -- Behavioral SLV_DATA_OUT <= DataOut; SLV_ACK_OUT <= '1'; when x"0081" => - SLV_DATA_OUT(10 downto 0) <= crc_checksum_in & crc_checksum_out & crc_correct; + SLV_DATA_OUT(10 downto 0) <= crc_out_crc_from_mupix & crc_out_crc_to_mupix & crc_correct; SLV_ACK_OUT <= '1'; when x"0082" => SLV_DATA_OUT(1 downto 0) <= Empty & Full; @@ -335,7 +355,7 @@ begin -- Behavioral end if; end process SLV_BUS; - crc_correct <= '1' when crc_checksum_out = crc_checksum_in else '0'; + crc_correct <= '1' when crc_out_crc_from_mupix = crc_out_crc_to_mupix else '0'; output_pipe : process (clk) is begin -- 2.43.0