From 516c58c545edda31cf08634f1fd1b16ea61aaf74 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Fri, 2 Aug 2013 14:45:26 +0200 Subject: [PATCH] changed ui commands to new structure --- soft/toolbox/jtag_atomic/ui.pl | 17 +++--- soft/toolbox/jtag_atomic/ui_generators.pl | 74 +++++++++++------------ 2 files changed, 46 insertions(+), 45 deletions(-) diff --git a/soft/toolbox/jtag_atomic/ui.pl b/soft/toolbox/jtag_atomic/ui.pl index 86f3f3a..38c2704 100755 --- a/soft/toolbox/jtag_atomic/ui.pl +++ b/soft/toolbox/jtag_atomic/ui.pl @@ -229,6 +229,7 @@ $chainsini = $ENV{'JTAGCONFIGPATH'}."/".$chainsini if exists($ENV{'JTAGCONFIGPAT my $chainnr = $chain_settings{'chainnr'}; my $chain_fpga_addr = any2dec($chain_settings{'FPGAtrbnetAddr'}); my $cmd_reg_addr = any2dec($chain_settings{'CMDreg_trbnetAddr'}); + my $cmd_base_addr = any2dec($chain_settings{'CONFCommandBaseAddr'}); my $data_reg_addr = any2dec($chain_settings{'DATAreg_trbnetAddr'}); my $subr; if(("h_".$opt_operation) eq 'h_man_maps_reset') { @@ -236,28 +237,28 @@ $chainsini = $ENV{'JTAGCONFIGPATH'}."/".$chainsini if exists($ENV{'JTAGCONFIGPAT $subr = generate_h_man_maps_reset($chain, $chain_fpga_addr, $conf_signals_addr); } elsif(("h_".$opt_operation) eq 'h_delay0' ) { - $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 0); + $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_base_addr, 0); } elsif(("h_".$opt_operation) eq 'h_delay1' ) { - $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 1); + $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_base_addr, 1); } elsif(("h_".$opt_operation) eq 'h_delay2' ) { - $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 2); + $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_base_addr, 2); } elsif(("h_".$opt_operation) eq 'h_delay3' ) { - $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 3); + $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_base_addr, 3); } elsif(("h_".$opt_operation) eq 'h_prog_ram' ) { $subr = generate_h_prog_ram($chain); } elsif(("h_".$opt_operation) eq 'h_set_timing_10mhz' ) { - $subr = generate_h_set_timing_10mhz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr); + $subr = generate_h_set_timing_10mhz($chain, $chain_fpga_addr,$cmd_base_addr); } elsif(("h_".$opt_operation) eq 'h_set_timing_1mhz' ) { - $subr = generate_h_set_timing_1mhz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr); + $subr = generate_h_set_timing_1mhz($chain, $chain_fpga_addr,$cmd_base_addr); } elsif(("h_".$opt_operation) eq 'h_set_timing_100khz' ) { - $subr = generate_h_set_timing_100khz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr); + $subr = generate_h_set_timing_100khz($chain, $chain_fpga_addr,$cmd_base_addr); } elsif(("h_".$opt_operation) eq 'h_set_inout' ) { my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'}); @@ -318,7 +319,7 @@ $chainsini = $ENV{'JTAGCONFIGPATH'}."/".$chainsini if exists($ENV{'JTAGCONFIGPAT $subr = generate_h_read_ram1c_word($chain, $chain_fpga_addr, $debug_chain_ram1caddr_addr, $debug_chain_ram1cdata_addr, $opt_addr); } elsif(("h_".$opt_operation) eq 'h_copy_ram1b1c' ) { - $subr = generate_h_copy_ram1b1c($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr); + $subr = generate_h_copy_ram1b1c($chain, $chain_fpga_addr, $cmd_base_addr); } unless ($subr==1) { diff --git a/soft/toolbox/jtag_atomic/ui_generators.pl b/soft/toolbox/jtag_atomic/ui_generators.pl index 69513c2..c8a0bee 100644 --- a/soft/toolbox/jtag_atomic/ui_generators.pl +++ b/soft/toolbox/jtag_atomic/ui_generators.pl @@ -1,8 +1,8 @@ #Send a command that writes data sub send_write_command { - my ($fpga, $dreg, $creg, $val, $cmd) = @_; - trb_register_write($fpga, $dreg, $val) or die trb_strerror(); - trb_register_write($fpga, $creg, $cmd) or die trb_strerror(); + my ($fpga, $dreg, $val, $cmd) = @_; + trb_register_write($fpga, $dreg+$cmd, $val) or die trb_strerror(); +# trb_register_write($fpga, $creg, $cmd) or die trb_strerror(); } sub any2dec { # converts numeric expressions 0x, 0b or decimal to decimal @@ -43,10 +43,10 @@ sub generate_h_read_ram1c_word { sub generate_h_copy_ram1b1c { - my ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $addr) = @_; + my ($chain, $fpga_addr, $cmd_base_addr) = @_; # return sub { init_msg( "read ram1b word " . $chain); - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000008,0x00000064); #M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER with unconditional trigger + send_write_command($fpga_addr,$cmd_base_addr,0x00000008,0x00000064); #M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER with unconditional trigger # } } @@ -118,59 +118,59 @@ sub generate_h_prog_ram { } sub generate_h_set_timing_10mhz { - my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_; + my($chain, $fpga_addr, $command_base_addr) = @_; # return sub { init_msg("timing 10 MHz $chain."); - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A); #M26C_CMD_STOP - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x0000000A,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000003,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000008,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000004,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000004,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000004,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000009,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009); #M26C_CMD_START + send_write_command($fpga_addr,$command_base_addr,0x00000000,0x00000009);#M26C_CMD_STOP + send_write_command($fpga_addr,$command_base_addr,0x0000000A,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH + send_write_command($fpga_addr,$command_base_addr,0x00000003,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x00000008,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x00000004,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x00000004,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x00000004,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 + send_write_command($fpga_addr,$command_base_addr,0x00000009,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME + send_write_command($fpga_addr,$command_base_addr,0x00000001,0x00000009);#M26C_CMD_START # } } sub generate_h_set_timing_1mhz { - my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_; + my($chain, $fpga_addr, $command_base_addr) = @_; # return sub { init_msg("timing 1 MHz $chain."); - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A); #M26C_CMD_STOP - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000064,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000031,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000062,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000030,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000030,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000030,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000063,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009); #M26C_CMD_START + send_write_command($fpga_addr,$command_base_addr,0x00000000,0x00000009);#M26C_CMD_STOP + send_write_command($fpga_addr,$command_base_addr,0x00000064,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH + send_write_command($fpga_addr,$command_base_addr,0x00000031,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x00000062,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x00000030,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x00000030,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x00000030,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 + send_write_command($fpga_addr,$command_base_addr,0x00000063,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME + send_write_command($fpga_addr,$command_base_addr,0x00000001,0x00000009);#M26C_CMD_START # } } sub generate_h_set_timing_100khz { - my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_; + my($chain, $fpga_addr, $command_base_addr) = @_; # return sub { init_msg("timing 100 kHz $chain."); - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A); #M26C_CMD_STOP - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000003E8,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000001CC,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000003C0,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000001F0,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000001F0,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000001F0,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000003E7,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009); #M26C_CMD_START + send_write_command($fpga_addr,$command_base_addr,0x00000000,0x00000009);#M26C_CMD_STOP + send_write_command($fpga_addr,$command_base_addr,0x000003E8,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH + send_write_command($fpga_addr,$command_base_addr,0x000001CC,0x00000042);#M26C_CMD_SET_JTAG_CLOCK_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x000003C0,0x00000044);#M26C_CMD_SET_JTAG_CLOCK_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x000001F0,0x00000046);#M26C_CMD_SET_JTAG_SAMPLE_TIME1 + send_write_command($fpga_addr,$command_base_addr,0x000001F0,0x00000048);#M26C_CMD_SET_JTAG_SAMPLE_TIME2 + send_write_command($fpga_addr,$command_base_addr,0x000001F0,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3 + send_write_command($fpga_addr,$command_base_addr,0x000003E7,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME + send_write_command($fpga_addr,$command_base_addr,0x00000001,0x00000009);#M26C_CMD_START # } } sub generate_h_delay { - my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $delay) = @_; + my($chain, $fpga_addr, $command_base_addr, $delay) = @_; # return sub { init_msg("Delay $delay $chain."); - send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,$delay,0x00000067); + send_write_command($fpga_addr,$command_base_addr,$cmd_reg_addr,$delay,0x00000067); # } } -- 2.43.0