From 542afaf5535020236a3cd8c585e59aa3e0e1b3cb Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Mon, 20 Jul 2009 14:24:42 +0000 Subject: [PATCH] *** empty log message *** --- media_interfaces/trb_net16_med_ecp_fot.vhd | 61 +--------------------- trb_net16_api_base.vhd | 4 +- trb_net16_endpoint_hades_full.vhd | 2 + trb_net16_hub_ipu_logic.vhd | 50 ++++++++++++------ trb_net16_hub_logic.vhd | 34 +++++++++++- trb_net16_ipudata.vhd | 2 +- trb_net_components.vhd | 2 + 7 files changed, 75 insertions(+), 80 deletions(-) diff --git a/media_interfaces/trb_net16_med_ecp_fot.vhd b/media_interfaces/trb_net16_med_ecp_fot.vhd index c8d5db9..4694622 100644 --- a/media_interfaces/trb_net16_med_ecp_fot.vhd +++ b/media_interfaces/trb_net16_med_ecp_fot.vhd @@ -5,6 +5,7 @@ USE IEEE.std_logic_UNSIGNED.ALL; library work; use work.trb_net_std.all; +use work.trb_net_components.all; entity trb_net16_med_ecp_fot is port( @@ -90,47 +91,7 @@ attribute HGROUP of trb_net16_med_ecp_fot_arch : architecture is "GROUP_PCS"; ); end component; - component trb_net16_lsm_sfp is - port( - SYSCLK : in std_logic; -- fabric clock - RESET : in std_logic; -- synchronous reset - CLEAR : in std_logic; -- asynchronous reset, connect to '0' if not needed / available - -- status signals - SFP_MISSING_IN : in std_logic; -- SFP Present ('0' = no SFP mounted, '1' = SFP in place) - SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SD_LINK_OK_IN : in std_logic; -- SerDes Link OK ('0' = not linked, '1' link established) - SD_LOS_IN : in std_logic; -- SerDes Loss Of Signal ('0' = OK, '1' = signal lost) - SD_TXCLK_BAD_IN : in std_logic; -- SerDes Tx Clock locked ('0' = locked, '1' = not locked) - SD_RXCLK_BAD_IN : in std_logic; -- SerDes Rx Clock locked ('0' = locked, '1' = not locked) - SD_RETRY_IN : in std_logic; -- '0' = handle byte swapping in logic, '1' = simply restart link and hope - SD_ALIGNMENT_IN : in std_logic_vector(1 downto 0); -- SerDes Byte alignment ("10" = swapped, "01" = correct) - SD_CV_IN : in std_logic_vector(1 downto 0); -- SerDes Code Violation ("00" = OK, everything else = BAD) - -- control signals - FULL_RESET_OUT : out std_logic; -- full reset AKA quad_reset - LANE_RESET_OUT : out std_logic; -- partial reset AKA lane_reset - TX_ALLOW_OUT : out std_logic; -- allow normal transmit operation - RX_ALLOW_OUT : out std_logic; -- allow normal receive operation - SWAP_BYTES_OUT : out std_logic; -- bytes need swapping ('0' = correct order, '1' = swapped order) - -- debug signals - STAT_OP : out std_logic_vector(15 downto 0); - CTRL_OP : in std_logic_vector(15 downto 0); - STAT_DEBUG : out std_logic_vector(31 downto 0) - ); - end component; - component signal_sync is - generic( - WIDTH : integer := 1; -- - DEPTH : integer := 3 - ); - port( - RESET : in std_logic; --Reset is neceessary to avoid optimization to shift register - CLK0 : in std_logic; --clock for first FF - CLK1 : in std_logic; --Clock for other FF - D_IN : in std_logic_vector(WIDTH-1 downto 0); --Data input - D_OUT : out std_logic_vector(WIDTH-1 downto 0) --Data output - ); - end component; -- -- component lattice_ecp2m_fifo_8x8_dualport -- port ( @@ -162,26 +123,6 @@ attribute HGROUP of trb_net16_med_ecp_fot_arch : architecture is "GROUP_PCS"; -- ); -- end component; - component trb_net_fifo_16bit_bram_dualport is - generic( - USE_STATUS_FLAGS : integer := c_YES - ); - port( read_clock_in : in std_logic; - write_clock_in : in std_logic; - read_enable_in : in std_logic; - write_enable_in : in std_logic; - fifo_gsr_in : in std_logic; - write_data_in : in std_logic_vector(17 downto 0); - read_data_out : out std_logic_vector(17 downto 0); - full_out : out std_logic; - empty_out : out std_logic; - fifostatus_out : out std_logic_vector(3 downto 0); - valid_read_out : out std_logic; - almost_empty_out : out std_logic; - almost_full_out : out std_logic - ); - end component; - signal link_error : std_logic_vector(7 downto 0); signal link_error_q: std_logic_vector(7 downto 0); signal reg_link_error : std_logic_vector(7 downto 0); diff --git a/trb_net16_api_base.vhd b/trb_net16_api_base.vhd index 023d0c1..f66b8a1 100644 --- a/trb_net16_api_base.vhd +++ b/trb_net16_api_base.vhd @@ -18,6 +18,7 @@ entity trb_net16_api_base is SECURE_MODE_TO_APL: integer range 0 to 1 := c_YES; SECURE_MODE_TO_INT: integer range 0 to 1 := c_YES; APL_WRITE_ALL_WORDS:integer range 0 to 1 := c_YES; + ADDRESS_MASK : std_logic_vector(15 downto 0) := x"FFFF"; BROADCAST_BITMASK : std_logic_vector(7 downto 0) := x"FF" ); @@ -633,7 +634,8 @@ INT_MASTER_DATAREADY_OUT <= buf_INT_MASTER_DATAREADY_OUT; slave_start <= '1'; end if; if INT_SLAVE_PACKET_NUM_IN = c_F1 then - if (INT_SLAVE_DATA_IN = APL_MY_ADDRESS_IN) or (and_all(not((not INT_SLAVE_DATA_IN) and (x"FF" & BROADCAST_BITMASK))) = '1') then + if ((INT_SLAVE_DATA_IN and ADDRESS_MASK) = (APL_MY_ADDRESS_IN and ADDRESS_MASK)) + or (and_all(not((not INT_SLAVE_DATA_IN) and (x"FF" & BROADCAST_BITMASK))) = '1') then next_state_to_apl <= sa_MY_ADDR; slave_start <= '1'; else diff --git a/trb_net16_endpoint_hades_full.vhd b/trb_net16_endpoint_hades_full.vhd index 2a46bff..4d44bcd 100644 --- a/trb_net16_endpoint_hades_full.vhd +++ b/trb_net16_endpoint_hades_full.vhd @@ -25,6 +25,7 @@ entity trb_net16_endpoint_hades_full is REPLY_CAN_RECEIVE_DATA : channel_config_t := (c_NO,c_NO,c_NO,c_NO); USE_CHECKSUM : channel_config_t := (c_NO,c_YES,c_YES,c_YES); APL_WRITE_ALL_WORDS : channel_config_t := (c_NO,c_NO,c_NO,c_NO); + ADDRESS_MASK : std_logic_vector(15 downto 0) := x"FFFF"; BROADCAST_BITMASK : std_logic_vector(7 downto 0) := x"FF"; REGIO_NUM_STAT_REGS : integer range 0 to 6 := 3; --log2 of number of status registers REGIO_NUM_CTRL_REGS : integer range 0 to 6 := 3; --log2 of number of ctrl registers @@ -299,6 +300,7 @@ begin SECURE_MODE_TO_APL => API_SECURE_MODE_TO_APL(i), SECURE_MODE_TO_INT => API_SECURE_MODE_TO_INT(i), APL_WRITE_ALL_WORDS=> APL_WRITE_ALL_WORDS(i), + ADDRESS_MASK => ADDRESS_MASK, BROADCAST_BITMASK => BROADCAST_BITMASK ) port map ( diff --git a/trb_net16_hub_ipu_logic.vhd b/trb_net16_hub_ipu_logic.vhd index 61249e5..810c21a 100644 --- a/trb_net16_hub_ipu_logic.vhd +++ b/trb_net16_hub_ipu_logic.vhd @@ -187,6 +187,12 @@ architecture trb_net16_hub_ipu_logic_arch of trb_net16_hub_ipu_logic is signal evt_number_mismatch : std_logic; signal enable_packing : std_logic; + + type timeout_counter_t is array (POINT_NUMBER-1 downto 0) of unsigned(25 downto 0); + signal timeout_counter : timeout_counter_t; + signal timeout_counter_reset : std_logic_vector(POINT_NUMBER-1 downto 0); + signal connection_timed_out : std_logic_vector(POINT_NUMBER-1 downto 0); + begin ---------------------------------- @@ -472,22 +478,32 @@ begin end generate; +---------------------------------- +--Check for Timeouts +---------------------------------- + + gen_timeout_counters : for i in 0 to POINT_NUMBER-1 generate + proc_timeout_counters : process (CLK) + begin + if rising_edge(CLK) then + connection_timed_out(i) <= '0'; + if REPLY_DATAREADY_IN(i) = '1' or real_activepoints(i) = '0' or init_locked = '0' then + timeout_counter(i) <= (others => '0'); + elsif timeout_counter(i)(timeout_counter(i)'left) = '1' then + timeout_counter(i) <= timeout_counter(i); + connection_timed_out(i) <= '1'; + else + timeout_counter(i) <= timeout_counter(i) + to_unsigned(1,1); + end if; + end if; + end process; + end generate; + --- process(current_reply_packet_type, reply_arbiter_result) --- begin --- current_muxed_reading_DAT <= '0'; --- gen_current_reading_dat : for i in 0 to POINT_NUMBER-1 loop --- if reply_arbiter_result(i) = '1' then --- if current_reply_packet_type((i+1)*3-1 downto i*3) = TYPE_DAT then --- current_muxed_reading_DAT <= '1'; --- end if; --- end if; --- end loop; --- end process; ---------------------------------- --saving (D)HDR -------------------------- +---------------------------------- gen_saving_dhdr : for i in 0 to POINT_NUMBER-1 generate hdrram_write_enable(i) <= (reg_current_reply_reading_HDR(i) or reg_current_reply_reading_DHDR(i)) and not reply_reading_H0(i); @@ -648,7 +664,7 @@ begin if locked = '0' then real_activepoints <= CTRL_activepoints(POINT_NUMBER-1 downto 0); else - real_activepoints <= real_activepoints and CTRL_activepoints(POINT_NUMBER-1 downto 0); + real_activepoints <= real_activepoints and CTRL_activepoints(POINT_NUMBER-1 downto 0) and not connection_timed_out; end if; end if; end process; @@ -663,7 +679,7 @@ begin if RESET = '1' or send_reply_trm = '1' or locked = '0' then got_trm <= (others => '0'); else - got_trm <= got_trm or locking_point or (reply_reading_F3 and reg_current_reply_reading_TRM) or not real_activepoints; + got_trm <= got_trm or locking_point or (reply_reading_F3 and reg_current_reply_reading_TRM) or not real_activepoints or connection_timed_out; end if; end if; end process; @@ -996,14 +1012,15 @@ begin if packet_counter /= c_H0 then next_state <= SEND_PADDING; else + comb_REPLY_POOL_DATAREADY <= '0'; next_state <= SENDING_REPLY_TRM; end if; end if; when SEND_PADDING => comb_REPLY_POOL_DATAREADY <= REPLY_POOL_next_read; - comb_REPLY_POOL_DATA <= (others => '0'); - if packet_counter = c_F3 then + comb_REPLY_POOL_DATA <= (1 => '1', others => '0'); + if packet_counter = c_F3 and REPLY_POOL_next_read = '1' then next_state <= SENDING_REPLY_TRM; end if; @@ -1130,6 +1147,7 @@ begin STAT_DEBUG(13 downto 10) <= reply_fsm_state(3 downto 0); STAT_DEBUG(14) <= REPLY_POOL_next_read; STAT_DEBUG(31 downto 15) <= (others => '0'); + --STAT(15 downto 8) <= data_counter; STAT_POINTS_locked(POINT_NUMBER-1 downto 0) <= not got_trm; STAT_POINTS_locked(31 downto POINT_NUMBER) <= (others => '0'); diff --git a/trb_net16_hub_logic.vhd b/trb_net16_hub_logic.vhd index 37cd54a..225fb50 100644 --- a/trb_net16_hub_logic.vhd +++ b/trb_net16_hub_logic.vhd @@ -2,6 +2,7 @@ LIBRARY IEEE; USE IEEE.std_logic_1164.ALL; USE IEEE.std_logic_ARITH.ALL; USE IEEE.std_logic_UNSIGNED.ALL; +use ieee.numeric_std.all; library work; use work.trb_net_std.all; @@ -127,6 +128,12 @@ architecture trb_net16_hub_logic_arch of trb_net16_hub_logic is signal reply_packet_num_in_i: std_logic_vector(c_NUM_WIDTH*POINT_NUMBER-1 downto 0) := (others => '0'); signal register_buf_REPLY_READ_OUT : std_logic_vector(POINT_NUMBER-1 downto 0) := (others => '0'); + + type timeout_counter_t is array (POINT_NUMBER-1 downto 0) of unsigned(25 downto 0); + signal timeout_counter : timeout_counter_t; + signal timeout_counter_reset : std_logic_vector(POINT_NUMBER-1 downto 0); + signal connection_timed_out : std_logic_vector(POINT_NUMBER-1 downto 0); + begin ---------------------------------- @@ -454,12 +461,34 @@ begin if reset_i = '1' or send_reply_trm = '1' or locked = '0' then got_trm <= (others => '0'); else - got_trm <= got_trm or locking_point or reading_trmF2 or not real_activepoints; + got_trm <= got_trm or locking_point or reading_trmF2 or not real_activepoints or connection_timed_out; end if; end if; end process; +---------------------------------- +--Check for Timeouts +---------------------------------- + + gen_timeout_counters : for i in 0 to POINT_NUMBER-1 generate + proc_timeout_counters : process (CLK) + begin + if rising_edge(CLK) then + connection_timed_out(i) <= '0'; + if REPLY_DATAREADY_IN(i) = '1' or real_activepoints(i) = '0' or init_locked = '0' then + timeout_counter(i) <= (others => '0'); + elsif timeout_counter(i)(timeout_counter(i)'left) = '1' then + timeout_counter(i) <= timeout_counter(i); + connection_timed_out(i) <= '1'; + else + timeout_counter(i) <= timeout_counter(i) + to_unsigned(1,1); + end if; + end if; + end process; + end generate; + + ---------------------------------- --REPLY Counters ---------------------------------- @@ -614,7 +643,8 @@ begin when c_F1 => comb_REPLY_POOL_DATA <= REPLY_combined_trm_F1; when c_F2 => - comb_REPLY_POOL_DATA <= REPLY_combined_trm_F2; + comb_REPLY_POOL_DATA <= REPLY_combined_trm_F2; + comb_REPLY_POOL_DATA(6) <= REPLY_combined_trm_F2(6) or or_all(connection_timed_out); when c_F3 => comb_REPLY_POOL_DATA <= REPLY_combined_trm_F3; if REPLY_POOL_next_read = '1' and (init_locked = '1') then diff --git a/trb_net16_ipudata.vhd b/trb_net16_ipudata.vhd index 7f9c806..b762e46 100644 --- a/trb_net16_ipudata.vhd +++ b/trb_net16_ipudata.vhd @@ -267,7 +267,7 @@ begin if reg_IPU_DATA(15 downto 0) /= buf_NUMBER then evt_number_mismatch <= '1'; end if; - if reg_IPU_DATA(23 downto 16) /= buf_RND_CODE then + if reg_IPU_DATA_high(7 downto 0) /= buf_RND_CODE then evt_code_mismatch <= '1'; end if; end if; diff --git a/trb_net_components.vhd b/trb_net_components.vhd index a2eb275..b251251 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -62,6 +62,7 @@ package trb_net_components is SECURE_MODE_TO_APL: integer range 0 to 1 := c_YES; SECURE_MODE_TO_INT: integer range 0 to 1 := c_YES; APL_WRITE_ALL_WORDS:integer range 0 to 1 := c_NO; + ADDRESS_MASK : std_logic_vector(15 downto 0) := x"FFFF"; BROADCAST_BITMASK : std_logic_vector(7 downto 0) := x"FF" ); @@ -198,6 +199,7 @@ package trb_net_components is REPLY_CAN_RECEIVE_DATA : channel_config_t := (c_NO,c_NO,c_NO,c_NO); USE_CHECKSUM : channel_config_t := (c_NO,c_YES,c_YES,c_YES); APL_WRITE_ALL_WORDS : channel_config_t := (c_NO,c_NO,c_NO,c_NO); + ADDRESS_MASK : std_logic_vector(15 downto 0) := x"FFFF"; BROADCAST_BITMASK : std_logic_vector(7 downto 0) := x"FF"; REGIO_NUM_STAT_REGS : integer range 0 to 6 := 3; --log2 of number of status registers REGIO_NUM_CTRL_REGS : integer range 0 to 6 := 3; --log2 of number of ctrl registers -- 2.43.0