From 55d4774406b555cf9b1665ac97232877d379e92c Mon Sep 17 00:00:00 2001 From: Thomas Gessler Date: Tue, 23 Feb 2021 19:59:57 +0100 Subject: [PATCH] XCKU MGTs: Add TXPI, make TX soft reset optional The TX phase interpolator (PI) ports can be used to adjust the TX-data phase with respect to the reference (and user) clock to achieve deterministic latency. --- media_interfaces/med_xcku_sfp_sync.vhd | 25 +++++++-- .../gth_xcku_2gbps0_100mhz.xci | 14 ++--- .../gth_xcku_2gbps0_100mhz.xml | 16 +++--- .../gth_xcku_2gbps0_200mhz.xci | 14 ++--- .../gth_xcku_2gbps0_200mhz.xml | 16 +++--- .../gth_xcku_2gbps4_120mhz.xci | 14 ++--- .../gth_xcku_2gbps4_120mhz.xml | 16 +++--- .../gth_xcku_2gbps4_120mhz_txprogdiv240.xci | 14 ++--- .../gth_xcku_2gbps4_120mhz_txprogdiv240.xml | 16 +++--- ...2gbps4_120mhz_txprogdiv240_txbufbypass.xci | 14 ++--- ...2gbps4_120mhz_txprogdiv240_txbufbypass.xml | 16 +++--- media_interfaces/xcku/gth_xcku_top.vhd | 56 +++++++++++++++++++ 12 files changed, 152 insertions(+), 79 deletions(-) diff --git a/media_interfaces/med_xcku_sfp_sync.vhd b/media_interfaces/med_xcku_sfp_sync.vhd index 599b671..f4e831c 100644 --- a/media_interfaces/med_xcku_sfp_sync.vhd +++ b/media_interfaces/med_xcku_sfp_sync.vhd @@ -16,11 +16,13 @@ entity med_xcku_sfp_sync is LINE_RATE_KBPS : integer := 2000000; REFCLK_FREQ_HZ : integer := 100000000; USE_TXPROGDIV : integer range 0 to 1 := 0; - BYPASS_TXBUF : integer range 0 to 1 := 0 + BYPASS_TXBUF : integer range 0 to 1 := 0; + SOFT_RESET_TX : integer range 0 to 1 := 1 ); port ( SYSCLK : in std_logic; CLK_100 : in std_logic; + RESET_ALL : in std_logic := '0'; GTREFCLK : in std_logic; GTREFCLK_BUFG : in std_logic; RXOUTCLK : out std_logic; @@ -76,6 +78,12 @@ entity med_xcku_sfp_sync is TXPRGDIVRESETDONE : out std_logic; + TXPIPPMEN : in std_logic := '0'; + TXPIPPMOVRDEN : in std_logic := '0'; + TXPIPPMPD : in std_logic := '0'; + TXPIPPMSEL : in std_logic := '0'; + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + TXDLYBYPASS : in std_logic := '0'; TXDLYEN : in std_logic := '0'; TXDLYHOLD : in std_logic := '0'; @@ -110,7 +118,9 @@ architecture med_xcku_sfp_sync_arch of med_xcku_sfp_sync is signal rxnotintable : std_logic; signal rxpmareset : std_logic; - signal reset_all : std_logic; + signal reset_all_i : std_logic; + + signal quad_rst : std_logic; signal rx_cdr_lol : std_logic; signal tx_lol : std_logic; @@ -156,6 +166,8 @@ begin SD_TXDIS_OUT <= '0'; + reset_all_i <= quad_rst or RESET_ALL when SOFT_RESET_TX = 1 else RESET_ALL; + THE_SERDES : entity work.gth_xcku_top generic map ( LINE_RATE_KBPS => LINE_RATE_KBPS, @@ -174,7 +186,7 @@ begin TXUSRCLK_DOUBLE => TXUSRCLK_DOUBLE, RXUSRCLK_ACTIVE => RXUSRCLK_ACTIVE, TXUSRCLK_ACTIVE => TXUSRCLK_ACTIVE, - RESET_ALL => reset_all, + RESET_ALL => reset_all_i, RXPMARESET => rxpmareset, RXPCSRESET => '0', TXPMARESET => '0', @@ -212,6 +224,11 @@ begin TXPOSTCURSOR => TXPOSTCURSOR, TXPRECURSOR => TXPRECURSOR, TXPRGDIVRESETDONE => TXPRGDIVRESETDONE, + TXPIPPMEN => TXPIPPMEN, + TXPIPPMOVRDEN => TXPIPPMOVRDEN, + TXPIPPMPD => TXPIPPMPD, + TXPIPPMSEL => TXPIPPMSEL, + TXPIPPMSTEPSIZE => TXPIPPMSTEPSIZE, TXDLYBYPASS => TXDLYBYPASS, TXDLYEN => TXDLYEN, TXDLYHOLD => TXDLYHOLD, @@ -279,7 +296,7 @@ begin WA_POSITION => (others => '0'), RX_SERDES_RST => rxpmareset, RX_PCS_RST => open, - QUAD_RST => reset_all, + QUAD_RST => quad_rst, TX_PCS_RST => open, MEDIA_MED2INT => MEDIA_MED2INT, MEDIA_INT2MED => MEDIA_INT2MED, diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci index 6e88795..bdea94e 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_100mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 18 + 20 0 None 8 @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml index acdf8a6..8013010 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:5d220aeb + 9:95178624 @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -16210,7 +16210,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out RX_REFCLK_SOURCE @@ -16323,7 +16323,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 18 + 20 diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci index 62fbd3c..f1ac1b3 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_200mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 20 + 22 0 None 8 @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml index 82c5206..c11782c 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:b87ae0cb + 9:7831f99d @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -16212,7 +16212,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out RX_REFCLK_SOURCE @@ -16325,7 +16325,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 20 + 22 diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci index f4b2d7c..b0ff13c 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps4_120mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 24 + 26 0 None 9 @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml index 3810e34..dc29e2d 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:47853102 + 9:851956ec @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -16208,7 +16208,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out RX_REFCLK_SOURCE @@ -16321,7 +16321,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 24 + 26 diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xci b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xci index 68c87f1..01cd3f9 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps4_120mhz_txprogdiv240 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 26 + 28 0 None 9 @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xml b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xml index 60d31ba..6db879b 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240/gth_xcku_2gbps4_120mhz_txprogdiv240.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:19deeac7 + 9:d9cd5635 @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -16209,7 +16209,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out RX_REFCLK_SOURCE @@ -16322,7 +16322,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 26 + 28 diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xci b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xci index b346738..648b57f 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 28 + 30 0 None 9 @@ -1292,11 +1292,11 @@ true true true - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xml b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xml index 0b7f7df..19ae553 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass/gth_xcku_2gbps4_120mhz_txprogdiv240_txbufbypass.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:428f62ef + 9:4eaee027 @@ -10626,7 +10626,7 @@ - false + true @@ -10652,7 +10652,7 @@ - false + true @@ -10678,7 +10678,7 @@ - false + true @@ -10704,7 +10704,7 @@ - false + true @@ -10730,7 +10730,7 @@ - false + true @@ -16235,7 +16235,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out RX_REFCLK_SOURCE @@ -16341,7 +16341,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 28 + 30 diff --git a/media_interfaces/xcku/gth_xcku_top.vhd b/media_interfaces/xcku/gth_xcku_top.vhd index 82a4588..06a64b9 100644 --- a/media_interfaces/xcku/gth_xcku_top.vhd +++ b/media_interfaces/xcku/gth_xcku_top.vhd @@ -69,6 +69,12 @@ entity gth_xcku_top is TXPRGDIVRESETDONE : out std_logic := '0'; + TXPIPPMEN : in std_logic := '0'; + TXPIPPMOVRDEN : in std_logic := '0'; + TXPIPPMPD : in std_logic := '0'; + TXPIPPMSEL : in std_logic := '0'; + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + TXDLYBYPASS : in std_logic := '0'; TXDLYEN : in std_logic := '0'; TXDLYHOLD : in std_logic := '0'; @@ -136,6 +142,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -206,6 +217,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -276,6 +292,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -346,6 +367,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -430,6 +456,11 @@ architecture behavioral of gth_xcku_top is txphdlytstclk_in : in std_logic_vector(0 downto 0); txphinit_in : in std_logic_vector(0 downto 0); txphovrden_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -631,6 +662,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -704,6 +740,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -777,6 +818,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -850,6 +896,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -937,6 +988,11 @@ begin txphdlytstclk_in(0) => TXPHDLYTSTCLK, txphinit_in(0) => TXPHINIT, txphovrden_in(0) => TXPHOVRDEN, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, -- 2.43.0