From 58670895a6f249c6d10a8f96d19a617c0c1f5093 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Fri, 9 Jul 2010 09:49:54 +0000 Subject: [PATCH] *** empty log message *** --- biblio.bib | 7 + cts.tex | 2 +- hubs.tex | 6 +- installation_trbnet.tex | 35 +++- main.tex | 9 +- mdc.tex | 34 +--- showerdata.tex | 13 +- software.tex | 346 +++++++++++++++++++++++----------------- 8 files changed, 257 insertions(+), 195 deletions(-) diff --git a/biblio.bib b/biblio.bib index 6f00dc8..5ee8c30 100755 --- a/biblio.bib +++ b/biblio.bib @@ -26,3 +26,10 @@ title={RICH ADCM 3 Schematics}, language={american}, note={\url{http://hades-wiki.gsi.de/pub/DaqSlowControl/TDCReadoutBoardV2/RICH_ADCMv3.pdf}} } + +@url{CTS, +key={CTS}, +title={CTS AddOn}, +language={american}, +note={\url{http://hades-wiki.gsi.de/pub/DaqSlowControl/TDCReadoutBoardV2/CTS_AddOn1-SCM.pdf}} +} \ No newline at end of file diff --git a/cts.tex b/cts.tex index fbfda33..04a678b 100644 --- a/cts.tex +++ b/cts.tex @@ -1,4 +1,4 @@ - +The schematics of the new CTS AddOn can be found in \cite{CTS}. diff --git a/hubs.tex b/hubs.tex index ecdd484..2aa35f9 100755 --- a/hubs.tex +++ b/hubs.tex @@ -27,12 +27,13 @@ \item[Bit 10 - 12] current packet counter \item[Bit 13 - 15] read pointer to DHDR memory \end{description} - \item[0x88 - 0x8B: Timeouts $\dagger$] One register for each TrbNet channel. Each bit gives the status of one port: 1 if there was a timeout on this port, 0 otherwise. These registers are cleared after being read. + \item[0x88 - 0x8B: Timeouts $\dagger$] One register for each TrbNet channel. Each bit gives the status of one port: 1 if there was a timeout on this port, 0 otherwise. These registers are cleared after being read. If a bit in these registers is set, it also causes the corresponding link LED to flash (approx. 2 Hz, 25\% off). \item[0x8C - 0x8F: Waiting for ACK] One register for each TrbNet channel. Each bit gives the status of one port: 1 if data transmission on this port is stopped because the receiver did not acknowledge previous EOB words, 0 otherwise. \item[0x90: Link error status] One bit for each port. 0 if normal operation / inactive, 1 in cave of error (e.g. code violation). \item[0xA0 - 0xA3: Error-/Status-Bits $\dagger$] One register for each TrbNet channel. Each register is the last Error-/Status-Bits, combined from all ports. \item[0xA4: Slow Control Error $\dagger$] One bit for each port. 1 if either one of the Errorbits 1,3,6 on the slow control channel have been set before. This register is cleared after being read. \item[0xA5: Endpoint reached] One bit for each port. 1 if this port returned the ``Endpoint reached'' bit in the status word set in the last slow control access, 0 otherwise. This information can be used to track a single board in the network: First a read access using the network address of the selected board has to be done. Immediately afterward this register can be read. To secure this non-atomic operation, the register is only updated if the board also return the ``don't understand' bit, e.g. after a read memory access to register 0. + \item[0xA6: Link packet timeout $\dagger$] One bit for each port, 1 if there was a timeout while receiving a full packet of data (i.e. only 1 to 4 words of a packet have been received within the given time limit). Register is reset when read. \item[0x4000 - 0x400F: IPU Packet counter] One register for each port. Each register is a 32 bit counter of the packets (with 64bit payload each) received on the IPU channel on this port. A write to 0x4000 resets all counters. \item[0x4010 - 0x401F: Slow Control Packet counter] One register for each port. Each register is a 32 bit counter of the packets (with 64bit payload each) received on the slow control channel on this port. A write to 0x4010 resets all counters. \item[0x4020 - 0x402F: Error Bits $\dagger$] One register for each port. Contents are part of the last Error-/Status-Bits received on this port: @@ -46,7 +47,7 @@ \item[0x4030 - 0x403F: Inclusive busy counter]One register for each port counting the time the port is busy (waiting for the reply after a trigger has been sent). Writing to 0x4030 clears all counters. \item[0x4040 - 0x404F: Exclusive busy counter] One register for each port counting the time this port and only this port is busy (waiting for the reply after a trigger has been sent). Writing to 0x4040 clears all counters. \item[0x4050: Global Time] Here, the global time also accessible in register 0x50 is readable. This allows to do a simultaneous readout with the busy counter registers to get exact time information. - +\item[0x4060: LSM Status] Status of the media interfaces. Bit 2--0: med\_error\_out, Bit 7--4: Link state machine status bits. \end{description} $\dagger$: Register is not reset during network reset @@ -57,6 +58,7 @@ $\dagger$: Register is not reset during network reset \item[0xC4: Port Disable] One bit for each port. Each bit controls one port. 1: port is powered down. 0: port is switched on (default). \item[0xC5: Timeouts] Configure duration of timeout for each channel. Each hex digit controls one channel. 0xF switches off timeouts, values 0x0 - 0x7 set timeout to $2^{(2 \cdot value+1)}$ms (2,8,32,128ms;1,4,16,64s). Default is 0x106F (8ms on slow control, 1s on IPU, off on LVL1). \item[0xC6: Network Reset] One bit for each port. Sends a network reset to the selected ports. 1: send network reset on port, 0: normal operation. Has to be cleared by user. + \item[0xC7: Link Lookup] One bit for each port. If bit is set, the corresponding link LED (usually green) will flash (approx. 8 Hz, 25\% off time). \end{description} \subsection{RegIO Data Port} diff --git a/installation_trbnet.tex b/installation_trbnet.tex index 6191b9f..935aa57 100644 --- a/installation_trbnet.tex +++ b/installation_trbnet.tex @@ -59,5 +59,38 @@ The usage of physical ports 5 -- 16 on TrbNet Hubs is given in the following lis \subsection{MDC Hub} The MDC Hub has 5 FPGAs: FPGA 1 serves the first 8 FOT, FPGA 2 the second 8 FOT, FPGA 3 controls FOT 17 to 24, FPGA 4 FOT 25 to 32. The fifth FPGA controls the Uplink (logical port 0) and connects to the other 4 FPGAs (FPGA1: port 1 -- FPGA4: port 4). -Due to very different cable length, there is no clear rule where which OEP is connected. See section \ref{mdcaddonconnections} for details. + +\label{mdcaddonconnections} +Since the length of optical cables is far from optimal, the ports to which they are connected are also quite sub-optimal. Table \ref{MDCPortMap} shows what is connected where. This table is meant for DAQ operators and to easily translate network addresses to positions, thus numbering starts with 0. + +To get the real network address of the hub FPGAs, the FPGA number (1--4) has to be added to the address in the left column. Boards 1000 -- 1050 are located on the platform next to RICH, boards 1010 -- 1030 are mounted in the right corner of the mainframe, boards 1000, 1040 and 1050 are mounted in the left corner of the mainframe. + + +\begin{sidewaystable} +\begin{center} +\begin{tabular}{|c|c|c|c|c|c|c|c|c|} +\hline +\textbf{Address} & \multicolumn{2}{c|}{\textbf{FPGA 1}} & \multicolumn{2}{c|}{\textbf{FPGA 2}} & \multicolumn{2}{c|}{\textbf{FPGA 3}} & \multicolumn{2}{c|}{\textbf{FPGA 4}} \\ + & \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8} \\ + & \textbf{FOT 1--6} & \textbf{FOT 7--8}& \textbf{FOT 9--14} & \textbf{FOT 15--16}& \textbf{FOT 17--22} & \textbf{FOT 23--24}& \textbf{FOT 25--30} & \textbf{FOT 31--32} \\ +\hline +\hline +1000 & \multicolumn{3}{c|}{P0 S4 0-D} & -- & \multicolumn{4}{c|}{P1 S2 0-F} \\ +1010 & P1 S0 0-5 & \multicolumn{3}{c|}{P1 S5 6-F} & P1 S1 0-5 & \multicolumn{3}{c|}{P1 S0 6-F} \\ +1020 & \multicolumn{3}{c|}{P0 S0 0-D} & -- & \multicolumn{3}{c|}{P0 S5 0-D} & -- \\ +1030 & \multicolumn{3}{c|}{P0 S1 0-D} & -- & \multicolumn{3}{c|}{P0 S2 0-D} & -- \\ +1040 & \multicolumn{3}{c|}{P0 S3 0-D} & -- & \multicolumn{4}{c|}{P1 S3 0-F} \\ +1050 & \multicolumn{4}{c|}{P1 S4 0-F} & P1 S5 0-5 & \multicolumn{3}{c|}{P1 S1 6-F} \\ +1100 & \multicolumn{4}{c|}{P2 S0 0-F} & \multicolumn{4}{c|}{P3 S0 0-F} \\ +1110 & \multicolumn{4}{c|}{P3 S1 F-0} & \multicolumn{4}{c|}{P2 S1 F-0} \\ +1120 & \multicolumn{4}{c|}{P3 S2 F-0} & \multicolumn{4}{c|}{P2 S2 F-0} \\ +1130 & \multicolumn{4}{c|}{P3 S3 F-0} & \multicolumn{4}{c|}{P2 S3 F-0} \\ +1140 & \multicolumn{4}{c|}{P2 S4 0-F} & \multicolumn{4}{c|}{P3 S4 0-F} \\ +1150 & \multicolumn{4}{c|}{P2 S5 0-F} & \multicolumn{4}{c|}{P3 S5 0-F} \\ +\hline +\end{tabular} +\caption{Connected OEPs on each MDC AddOn FPGA. Plane (P) and Sector (S) numbers are counted starting at 0. Port numbers refer to the bit numbers inside the Hub status and control registers. Port 0 is always the uplink.} +\label{MDCPortMap} +\end{center} +\end{sidewaystable} diff --git a/main.tex b/main.tex index 5701ffc..02f5c89 100755 --- a/main.tex +++ b/main.tex @@ -159,12 +159,13 @@ \input{software} \clearpage -\part{Network Port Map} - \section{TrbNet Hubs} +\part{Cables \& Installation} + \section{TrbNet Hubs Port Map} \input{installation_trbnet} - \section{Ethernet Switches} + \section{Ethernet Switches Port Map} \input{installation_ethernet} - + \section{Trigger Distribution} + \input{trigger} \clearpage diff --git a/mdc.tex b/mdc.tex index 967294d..75e7582 100755 --- a/mdc.tex +++ b/mdc.tex @@ -293,36 +293,4 @@ Figure \ref{fig:mdcoeppositions} shows the positions of each OEP on the chambers \end{figure} \subsubsection{MDC AddOn Connections} -\label{mdcaddonconnections} -Since the length of optical cables is far from optimal, the ports to which they are connected are also quite sub-optimal. Table \ref{MDCPortMap} shows what is connected where. This table is meant for DAQ operators and to easily translate network addresses to positions, thus numbering starts with 0. - -To get the real network address of the hub FPGAs, the FPGA number (1--4) has to be added to the address in the left column. Boards 1000 -- 1050 are located on the platform next to RICH, boards 1010 -- 1030 are mounted in the right corner of the mainframe, boards 1000, 1040 and 1050 are mounted in the left corner of the mainframe. - - -\begin{sidewaystable} -\begin{center} -\begin{tabular}{|c|c|c|c|c|c|c|c|c|} -\hline -\textbf{Address} & \multicolumn{2}{c|}{\textbf{FPGA 1}} & \multicolumn{2}{c|}{\textbf{FPGA 2}} & \multicolumn{2}{c|}{\textbf{FPGA 3}} & \multicolumn{2}{c|}{\textbf{FPGA 4}} \\ - & \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8}& \textbf{Port 1--6} & \textbf{Port 7--8} \\ - & \textbf{FOT 1--6} & \textbf{FOT 7--8}& \textbf{FOT 9--14} & \textbf{FOT 15--16}& \textbf{FOT 17--22} & \textbf{FOT 23--24}& \textbf{FOT 25--30} & \textbf{FOT 31--32} \\ -\hline -\hline -1000 & \multicolumn{3}{c|}{P0 S4 0-D} & -- & \multicolumn{4}{c|}{P1 S2 0-F} \\ -1010 & P1 S0 0-5 & \multicolumn{3}{c|}{P1 S5 6-F} & P1 S1 0-5 & \multicolumn{3}{c|}{P1 S0 6-F} \\ -1020 & \multicolumn{3}{c|}{P0 S0 0-D} & -- & \multicolumn{3}{c|}{P0 S5 0-D} & -- \\ -1030 & \multicolumn{3}{c|}{P0 S1 0-D} & -- & \multicolumn{3}{c|}{P0 S2 0-D} & -- \\ -1040 & \multicolumn{3}{c|}{P0 S3 0-D} & -- & \multicolumn{4}{c|}{P1 S3 0-F} \\ -1050 & \multicolumn{4}{c|}{P1 S4 0-F} & P1 S5 0-5 & \multicolumn{3}{c|}{P1 S1 6-F} \\ -1100 & \multicolumn{4}{c|}{P2 S0 0-F} & \multicolumn{4}{c|}{P3 S0 0-F} \\ -1110 & \multicolumn{4}{c|}{P3 S1 F-0} & \multicolumn{4}{c|}{P2 S1 F-0} \\ -1120 & \multicolumn{4}{c|}{P3 S2 F-0} & \multicolumn{4}{c|}{P2 S2 F-0} \\ -1130 & \multicolumn{4}{c|}{P3 S3 F-0} & \multicolumn{4}{c|}{P2 S3 F-0} \\ -1140 & \multicolumn{4}{c|}{P2 S4 0-F} & \multicolumn{4}{c|}{P3 S4 0-F} \\ -1150 & \multicolumn{4}{c|}{P2 S5 0-F} & \multicolumn{4}{c|}{P3 S5 0-F} \\ -\hline -\end{tabular} -\caption{Connected OEPs on each MDC AddOn FPGA. Plane (P) and Sector (S) numbers are counted starting at 0. Port numbers refer to the bit numbers inside the Hub status and control registers. Port 0 is always the uplink.} -\label{MDCPortMap} -\end{center} -\end{sidewaystable} +Due to very different cable length, there is no clear rule where which OEP is connected. See section \ref{mdcaddonconnections} for details. \ No newline at end of file diff --git a/showerdata.tex b/showerdata.tex index 2a9826a..2c81b5a 100755 --- a/showerdata.tex +++ b/showerdata.tex @@ -72,11 +72,14 @@ The addresses of each of the sources are also defined in table \ref{networkaddre \hline \textbf{Address} & \textbf{Name} & \textbf{Description} \\ \hline\hline -A000 - A5FF & Thresh./Ped. Mem.& Memory for pedestal and threshold values, see table \ref{ShowerADCMemory} \\ -D000 & SPI Status Reg. & see section SPI Flash \\ -D001 & SPI Control Reg. & see section SPI Flash \\ -D100 - D13F & SPI Data Mem. & see section SPI Flash \\ -E000 & Spy Fifo & Fifo for debugging signals \\ +C0 & CTRL Reg. & Control Register: Bit 3--0: Threshold, Bit 7--4: Sampling Pattern, Bit 31--8: reserved \\ +A000 - A5FF & Pedestal Mem. & Memory for pedestal values, see table \ref{ShowerADCMemory} \\ +C000 - C500 & ADC SPI & Access to ADC via SPI interface: Bit 7--0: Data, Bit 23--16: Address, others: reserved\\ +D000 & Flash SPI Status Reg. & see section SPI Flash \\ +D001 & Flash SPI Control Reg. & see section SPI Flash \\ +D100 - D13F & Flash SPI Data Mem. & see section SPI Flash \\ +E000 & Spy Fifo 1 & Fifo for debugging signals \\ +F000 & Spy Fifo 1 & Fifo for debugging signals \\ \hline \end{tabularx} \caption{Memory map for FPGA 1 and 2 on Shower AddOn2} diff --git a/software.tex b/software.tex index 83760ad..090c3dd 100755 --- a/software.tex +++ b/software.tex @@ -1,127 +1,127 @@ \section{Overview} -Currently, there are three main software tools for accessing TrbNet: trbcmd, -trbflash and daqop. All are based on one common library, libtrbnet, that -provides all features needed to communicate with any FPGA inside the network +Currently, there are three main software tools for accessing TrbNet: trbcmd, +trbflash and daqop. All are based on one common library, libtrbnet, that +provides all features needed to communicate with any FPGA inside the network using the ETRAX CPU located on a central slow control TRB. \begin{description} - \item[trbcmd] A general purpose tool to execute every possible access on -TrbNet endpoints. Scripting capabilities and verbose error messages are + \item[trbcmd] A general purpose tool to execute every possible access on +TrbNet endpoints. Scripting capabilities and verbose error messages are included. - \item[daqop] A command line tool which accepts keywords as options and -executes the corresponding TrbNet accesses without having the user to bother + \item[daqop] A command line tool which accepts keywords as options and +executes the corresponding TrbNet accesses without having the user to bother with network and register addresses. - \item[trbflash] A specialized tool to write, read and verify Flash ROMs used -to boot FPGAs. Currently, MDC OEP and RICH ADCM are supported, Shower AddOn + \item[trbflash] A specialized tool to write, read and verify Flash ROMs used +to boot FPGAs. Currently, MDC OEP and RICH ADCM are supported, Shower AddOn and MDC AddOn will follow. \item[trb\_i2c] A specialized tool to access the RICH ADCM I2C controller used for APV frontend card configuration. It is tailor made for APV preamp chips, but can be simply adjusted in VHDL to fully comply with a single I2C master. - \item[trbrichcmd] A specialized tool for RICH ADCM features. It allows + \item[trbrichcmd] A specialized tool for RICH ADCM features. It allows reading the serial numbers of frontend card and backplanes, and controls the internal logic analyzer for ADC data. - \item[readout\_mdc] Simulates the CTS using a TRB by sending first a pseudo -timing trigger via slow control, then a LVL1 trigger and finally an IPU -readout request. Data is sent via UDP to an Eventbuilder. Primarily written + \item[readout\_mdc] Simulates the CTS using a TRB by sending first a pseudo +timing trigger via slow control, then a LVL1 trigger and finally an IPU +readout request. Data is sent via UDP to an Eventbuilder. Primarily written for MDC, but should be compatible to other detectors as well. - \item[startup.pl] Executes script files to load many registers during + \item[startup.pl] Executes script files to load many registers during startup or for reconfiguration. \end{description} \section{DaqOp} \begin{itemize} - \item Commands use standard notation like (a|b|c) for choices, (a)? for + \item Commands use standard notation like (a|b|c) for choices, (a)? for optional parts and \$ab for placeholders. \item Most output is ordered by the network address - \item If no address is given, command is sent to all boards using a + \item If no address is given, command is sent to all boards using a broadcast (Unless specified otherwise) - \item The order of keywords and values in the command is arbitrary. Only in -few places the order is relevant. \verb|$channel| and \verb|$port| must + \item The order of keywords and values in the command is arbitrary. Only in +few places the order is relevant. \verb|$channel| and \verb|$port| must always directly follow their corresponding keyword. - \item Some commands can be modified by one of the keywords \verb|dec|, -\verb|decimal|, \verb|hex| or \verb|raw|. \verb|hex| forces the output in -hexadecimal form, \verb|dec| in decimal form and \verb|raw| gives the raw + \item Some commands can be modified by one of the keywords \verb|dec|, +\verb|decimal|, \verb|hex| or \verb|raw|. \verb|hex| forces the output in +hexadecimal form, \verb|dec| in decimal form and \verb|raw| gives the raw content of the addressed registers. \end{itemize} Placeholders are defined as follows: \begin{description} - \item[\$addr] TrbNet address, 16bit long, preceded by \verb|ax| prefix in + \item[\$addr] TrbNet address, 16bit long, preceded by \verb|ax| prefix in the form, example: \verb|ax1234| or system name (\$system) - \item[\$channel] A value identifying a TrbNet channel. Usually either 0,1 + \item[\$channel] A value identifying a TrbNet channel. Usually either 0,1 or 3. Verbose names trigger, ipu, control can also be used. \item[\$read] A keyword, one of \verb|read| and \verb|get| - \item[\$port] A value identifying one port of a hub. Usually a number + \item[\$port] A value identifying one port of a hub. Usually a number between 0 and 12. \item[\$select] A keyword, one of \verb|select|, \verb|set| and \verb|switch| \item[\$string] Any string of characters - \item[\$system] A keyword identifying a subsystem: \verb|hub|, \verb|oep|, + \item[\$system] A keyword identifying a subsystem: \verb|hub|, \verb|oep|, \verb|rich|, \verb|tof|, \verb|shower|, \verb|rpc| or an \$addr - \item[\$value] An integer value, either hexadecimal (\verb|0x1234|), a bit + \item[\$value] An integer value, either hexadecimal (\verb|0x1234|), a bit position (\verb|0b5|, the sixth bit in the register) or a decimal value) \item[\$write] A keyword, one of \verb|send|, \verb|set| and \verb|write| \end{description} \subsection{Network Management} \paragraph*{reset network \\ \$write hub port \$port reset \$addr} ~\\ -Sends a network reset through the network. Either all boards or all boards -connected below the given board respectively the given port will receive the -reset. Note that the first works in all cases, but the latter two require a -still working slow control channel. The reset phase is dominated by the delay +Sends a network reset through the network. Either all boards or all boards +connected below the given board respectively the given port will receive the +reset. Note that the first works in all cases, but the latter two require a +still working slow control channel. The reset phase is dominated by the delay in the optical link state machines which are around 5 seconds. \paragraph*{\$read ids} optional: \verb|$addr| \\ -Reads the unique ids of boards with the given address. The first value -returned is the network address, the second the 64bit wide unique id, the +Reads the unique ids of boards with the given address. The first value +returned is the network address, the second the 64bit wide unique id, the last the FPGA number.\\ Example output: \verb|0xf102 0x120000011234234 0x02| \paragraph*{reboot \$system} optional: \verb|$addr| \\ -Triggers a reboot of the addressed FPGA. Only available on systems with +Triggers a reboot of the addressed FPGA. Only available on systems with on-board Flash ROM such as OEP, MDC, RICH and Shower. \subsection{Basic Information} \paragraph*{\$read compile time} optional: \verb|$addr|, \verb|raw| \\ -Reads the timestamp the currently loaded FPGA design has been compiled. The -\verb|raw| modifier gives back the unix timestamp, standard is a decimal +Reads the timestamp the currently loaded FPGA design has been compiled. The +\verb|raw| modifier gives back the unix timestamp, standard is a decimal representation. \\ Example output: \verb|0xf102 2010-01-01 10:32| -\paragraph*{\$read temp \\ \$read temperature} optional: \verb|$addr|, +\paragraph*{\$read temp \\ \$read temperature} optional: \verb|$addr|, \verb|raw| \\ -Reads the temperature of the addressed boards. Output is in degrees Celsius +Reads the temperature of the addressed boards. Output is in degrees Celsius (standard) or in raw hexadecimal format. \subsection{Trigger} -\paragraph*{\$read global time \\ \$write global time \$value} optional: +\paragraph*{\$read global time \\ \$write global time \$value} optional: \verb|$addr|, \verb|dec|, \verb|raw| \\ -Reads or writes the global time register on the addressed boards. The -\verb|dec| option gives back a decimal representation in seconds, raw is a -hexadecimal representation of microseconds since the timer has been started. +Reads or writes the global time register on the addressed boards. The +\verb|dec| option gives back a decimal representation in seconds, raw is a +hexadecimal representation of microseconds since the timer has been started. An overflow will occur every 72 minutes. -\paragraph*{\$read trigger time} optional: \verb|$addr|, \verb|dec|, +\paragraph*{\$read trigger time} optional: \verb|$addr|, \verb|dec|, \verb|raw| \\ -Equivalent to \verb|$read compile time| but gives back the time since the -last timing trigger has been received, counting in 10ns steps. An overflow +Equivalent to \verb|$read compile time| but gives back the time since the +last timing trigger has been received, counting in 10ns steps. An overflow will occur within less than a minute. -\paragraph*{\$read trigger number \\ \$write trigger number \$value} +\paragraph*{\$read trigger number \\ \$write trigger number \$value} optional: \verb|$addr|, \verb|dec| \\ -Reads or writes the internal trigger number counter on the addressed +Reads or writes the internal trigger number counter on the addressed endpoints. Output can be either hexadecimal (standard) or decimal. \paragraph*{\$write timing trigger \$value} optional: \verb|$addr| \\ -Sends a fake timing trigger using the slow control channel and the upper -16bit of control register 0 in all endpoints. \verb|$value| is the type of +Sends a fake timing trigger using the slow control channel and the upper +16bit of control register 0 in all endpoints. \verb|$value| is the type of timing trigger in the range 0 to 15. -\paragraph*{\$read endpoint data buffer status \\ \$read endp dat buf stat} +\paragraph*{\$read endpoint data buffer status \\ \$read endp dat buf stat} optional: \verb|$addr|, \verb|raw| \\ Reads the status of the data handler buffers of endpoint\_hades\_full\_handler. -The decoded data is shown in table format with marks for each set bit +The decoded data is shown in table format with marks for each set bit according to table \ref{databufferdaqop}. \begin{table}[htbp] @@ -131,185 +131,233 @@ according to table \ref{databufferdaqop}. \textbf{Column} & \textbf{Description} \\ \hline\hline Board & The network address of the board. \\ -Level & The fill level of the buffer - a 5 digit decimal number counting -32bit words inside the data buffer. The maximum value depends on the settings +Level & The fill level of the buffer - a 5 digit decimal number counting +32bit words inside the data buffer. The maximum value depends on the settings of the buffer. \\ -Buf & The number of the data buffer in case there is more than one data +Buf & The number of the data buffer in case there is more than one data buffer specified. \\ EMP & Empty flag of the buffer. \\ -AFL & Almost full flag of the buffer. The threshold has been set by generics +AFL & Almost full flag of the buffer. The threshold has been set by generics in the VHDL code. \\ -FUL & Full flag of the data buffer. If this flag is set, an error occured +FUL & Full flag of the data buffer. If this flag is set, an error occured due to a wrong buffer handling or wrong buffer settings. \\ WRE & Write enable strobe to the buffer. \\ IDL & Buffer handler state machine is idle, waiting for next trigger. \\ -BSY & Buffer handler state machine is waiting for and / or writing data from +BSY & Buffer handler state machine is waiting for and / or writing data from the FEE to the data buffer \\ -CLS & Buffer handler is waiting for busy release. The FEE already finished +CLS & Buffer handler is waiting for busy release. The FEE already finished writing data to the buffer but LVL1 is still busy \\ -LEM & Length buffer is empty. This must always be the same as EMP of the +LEM & Length buffer is empty. This must always be the same as EMP of the LVL1 buffer. \\ -LFL & Length buffer is almost full. This must always be the same as AFL of +LFL & Length buffer is almost full. This must always be the same as AFL of the LVL1 buffer. \\ -LWR & Length buffer write enable strobe. This must always be the same as +LWR & Length buffer write enable strobe. This must always be the same as AFL of the LVL1 buffer. \\ \hline \end{tabularx} -\caption{Definition of columns in DaqOp output for the status register of data +\caption{Definition of columns in DaqOp output for the status register of data handler buffers.} \label{databufferdaqop} \end{center} \end{table} -\paragraph*{\$read endpoint lvl1 buffer status \\ \$read endp lvl1 buf stat} +\paragraph*{\$read endpoint lvl1 buffer status \\ \$read endp lvl1 buf stat} optional: \verb|$addr|, \verb|raw| \\ -Reads the status of the data handler LVL1 buffers of -endpoint\_hades\_full\_handler. The decoded data is shown similarly to the -output for the data buffer status registers according to table -\ref{databufferdaqop}. Here, not all columns are shown, i.e. there is no -buffer number and no flags regarding a length buffer (which does not exist +Reads the status of the data handler LVL1 buffers of +endpoint\_hades\_full\_handler. The decoded data is shown similarly to the +output for the data buffer status registers according to table +\ref{databufferdaqop}. Here, not all columns are shown, i.e. there is no +buffer number and no flags regarding a length buffer (which does not exist here). \subsection{MDC} \paragraph*{\$read flash oep } optional: \verb|$addr| \\ -Reads back the current status of the Flash select switch on the OEP. Value is +Reads back the current status of the Flash select switch on the OEP. Value is either 1 for flash 0, 2 for flash 1 or 3 in case of an error. \paragraph*{\$select flash (0|1) oep} optional: \verb|$addr| \\ -Selects either Flash chip 0 or 1 on the OEP. 0 is the ``golden image'', 1 is +Selects either Flash chip 0 or 1 on the OEP. 0 is the ``golden image'', 1 is the working setup. \paragraph*{adc oep (init|on|off|single)} optional: \verb|$addr| \\ Sets the operation mode of the voltage monitoring ADC on the OEP. \\ -\verb|init| Initializes the ADC, switches it on and starts continous +\verb|init| Initializes the ADC, switches it on and starts continous conversions.\\ \verb|on| Switches the ADC on and starts continous conversions.\\ \verb|off| Stops ADC measurements.\\ -\verb|single| Runs a single conversion for all 8 monitored voltages, +\verb|single| Runs a single conversion for all 8 monitored voltages, then switches off the ADC.\\ \paragraph*{\$read oep voltages (long)?} optional: \verb|$addr|, \verb|raw| \\ -Reads the voltages of the addressed OEP. Standard output is a human-readable -status information. For each voltages, the status is shown as one of ``ERR'' -(measurement error), ``ok'', ``low'', ``was low'' (voltage was too low, but -is ok now), ``high'', ``was high'' (voltage was too high, but is ok now), -``high/low'' (voltage was too low and too high before, currently either too -high or too low) or ``vary/ok'' (voltage is ok now, but was too high and too -low before). The \verb|raw| option gives back the raw content of the register, +Reads the voltages of the addressed OEP. Standard output is a human-readable +status information. For each voltages, the status is shown as one of ``ERR'' +(measurement error), ``ok'', ``low'', ``was low'' (voltage was too low, but +is ok now), ``high'', ``was high'' (voltage was too high, but is ok now), +``high/low'' (voltage was too low and too high before, currently either too +high or too low) or ``vary/ok'' (voltage is ok now, but was too high and too +low before). The \verb|raw| option gives back the raw content of the register, i.e. a list of 8 hexadecimal numbers for each board. The long format gives back the exact voltage levels measured. \paragraph*{\$read oep voltage \$value} optional: \verb|$addr|, \verb|raw| \\ -Reads the value of a single voltage on the addressed OEP. Additionally, the -lowest and highest measured value is shown. \verb|$value| is the voltage to -be shown, in the range of 0 to 7 according to the following list (voltages -are either on the measured on the input of the OEP (input) or after the -voltage regulator (output): (0: 5.6V input, 1: 5V output, 2: 3.5V input, 3: +Reads the value of a single voltage on the addressed OEP. Additionally, the +lowest and highest measured value is shown. \verb|$value| is the voltage to +be shown, in the range of 0 to 7 according to the following list (voltages +are either on the measured on the input of the OEP (input) or after the +voltage regulator (output): (0: 5.6V input, 1: 5V output, 2: 3.5V input, 3: 3.3V output, 4: 1.6V input, 5: 1.2V output, 6: +3V input, 7: -3V input). \subsection{Network Hubs} \paragraph*{\$read hub setup} optional: \verb|$addr|, \verb|raw| \\ -Reads the uplink-/downlink-configuration of the addresses network hubs. The -output is two strings for either up- and downlinks. Each digit marks a -connection where that is configured as uplink respectively downlink or a dash -if this functionality is disabled. Ports that are listed in neither list do -not exist at all. The numbers themselves are inserted to gain a better +Reads the uplink-/downlink-configuration of the addresses network hubs. The +output is two strings for either up- and downlinks. Each digit marks a +connection where that is configured as uplink respectively downlink or a dash +if this functionality is disabled. Ports that are listed in neither list do +not exist at all. The numbers themselves are inserted to gain a better readability and represent the port number only.\\ Example output: \verb|0xf123 up: --------------10 down: -----a9876--3210| \paragraph*{\$read hub connected} optional: \verb|$addr|, \verb|raw| \\ -Reads the current status of the hub, which ports are actually connected and -have a link established. The output format is similar to the one described -above. A dash marks an existing port without a connection, a number marks an +Reads the current status of the hub, which ports are actually connected and +have a link established. The output format is similar to the one described +above. A dash marks an existing port without a connection, a number marks an established link. \paragraph*{\$read hub timeout} optional: \verb|$addr|, \verb|raw| \\ -Gives back information about hub ports on which a timeout occured. Standard +Gives back information about hub ports on which a timeout occured. Standard output is plain text: \\ Example output: \verb|Timeout on hub f123 channel 0 port 7| \\ -The raw option gives the same information but as one 32bit value per channel +The raw option gives the same information but as one 32bit value per channel and board with one bit set for each port with a timeout. -\paragraph*{\$read hub packets channel \$channel} optional: \verb|$addr|, +\paragraph*{\$read hub packets channel \$channel} optional: \verb|$addr|, \verb|raw|, \verb|port $port| \\ -Reads the amount of packets received on IPU and slow control channel on the -given hub and port or for all ports if no port number is given. The raw option +Reads the amount of packets received on IPU and slow control channel on the +given hub and port or for all ports if no port number is given. The raw option outputs one 32bit number for each channel. -\paragraph*{\$read hub waiting (channel \$channel)?} optional: \verb|$addr|, +\paragraph*{\$read hub waiting (channel \$channel)?} optional: \verb|$addr|, \verb|raw| \\ -Shows all ports and channels on the addressed hubs that are currently waiting -for a reply (more precisely: waiting for a TRM in the reply channel). Although -channel can be chosen freely, the value read on channel 3 is accurate, but all -connected channels will always be marked as waiting. This is the case since -there actually is a transfer going on - namely this request itself. If no -channel is selected, information from all channels 0 and 1 is shown. The +Shows all ports and channels on the addressed hubs that are currently waiting +for a reply (more precisely: waiting for a TRM in the reply channel). Although +channel can be chosen freely, the value read on channel 3 is accurate, but all +connected channels will always be marked as waiting. This is the case since +there actually is a transfer going on - namely this request itself. If no +channel is selected, information from all channels 0 and 1 is shown. The output is either in plain text (standard) or in raw format. -\paragraph*{\$read hub ack channel \$channel \\ \$read hub acknowledge +\paragraph*{\$read hub ack channel \$channel \\ \$read hub acknowledge channel \$channel} optional: \verb|$addr|, \verb|raw| \\ -Shows all ports and channels on the addressed hub that are blocked because the -sender is waiting for two acknowledge (ACK) packets from the receiver side for -too long. This kind of error usually corresponds to a broken communication, -e.g. mixed up TX and RX lines. If no channel is selected, information from all -3 channels is shown. The output is either in plain text (standard) or in raw +Shows all ports and channels on the addressed hub that are blocked because the +sender is waiting for two acknowledge (ACK) packets from the receiver side for +too long. This kind of error usually corresponds to a broken communication, +e.g. mixed up TX and RX lines. If no channel is selected, information from all +3 channels is shown. The output is either in plain text (standard) or in raw format. \paragraph*{switch hub port \$port (channel \$channel)? \$addr (on|off)} ~\\ -This command is used to switch a specific port on a specific channel on a -specific hub on or off. Switching one channel of a port off means, that no -request is sent on this port any more and no data is accepted on this port. -This command must be issued including all three pieces of information (namely -port, channel and address), otherwise it will return an error ``Parsing input -failed.'' for security reasons. Please be adviced that it is no good idea to -switch off the uplink of any hub! If this happens, a network reset is +This command is used to switch a specific port on a specific channel on a +specific hub on or off. Switching one channel of a port off means, that no +request is sent on this port any more and no data is accepted on this port. +This command must be issued including all three pieces of information (namely +port, channel and address), otherwise it will return an error ``Parsing input +failed.'' for security reasons. Please be adviced that it is no good idea to +switch off the uplink of any hub! If this happens, a network reset is inevitable. -If \verb|channel $channel| is not specified, the whole port will be powered +If \verb|channel $channel| is not specified, the whole port will be powered down. Currently, this feature is not correctly implemented. -\paragraph*{\$read hub error(bits)? \\ \$read hub error(bits)? channel +\paragraph*{\$read hub error(bits)? \\ \$read hub error(bits)? channel \$channel} optional: \verb|$addr| \\ -Reads the merged status- and errorbits from the last transfer from the -addressed hub. If no channel is specified, all channels are read out. The -output is one 32bit data word according to the corresponding status- and +Reads the merged status- and errorbits from the last transfer from the +addressed hub. If no channel is specified, all channels are read out. The +output is one 32bit data word according to the corresponding status- and errorbit definitions. -\paragraph*{\$read hub error(bits)? ports \\ \$read hub error(bits)? port +\paragraph*{\$read hub error(bits)? ports \\ \$read hub error(bits)? port \$port} optional: \verb|$addr|, \verb|raw| \\ -Reads some error- and statusbits from all ports or the selected port from the -addressed hub. Included are parts of the errorbits from LVL1 and IPU channel. -For each channel, Bits 0-7 and 16-23 are included while the rest is omitted -to reduce ressource consumption. The standard output shows the bits in the +Reads some error- and statusbits from all ports or the selected port from the +addressed hub. Included are parts of the errorbits from LVL1 and IPU channel. +For each channel, Bits 0-7 and 16-23 are included while the rest is omitted +to reduce ressource consumption. The standard output shows the bits in the right positions while the raw output shows the bits merged into one value. \paragraph*{\$read hub ipu stat(us|e)} optional: \verb|$addr|, \verb|raw| \\ -Reads the current status of the IPU state machine from the addresses hubs. The -standard output gives a description of the current state, the part of TrbNet -packet that will be sent next and the part of the HDR/DHDR that is currently +Reads the current status of the IPU state machine from the addresses hubs. The +standard output gives a description of the current state, the part of TrbNet +packet that will be sent next and the part of the HDR/DHDR that is currently analyzed. \paragraph*{\$read hub ctrl error} optional: \verb|$addr|, \verb|raw| \\ -Reads the error log for the slow control on hubs. One bit for each port. 1 if -there was a transfer with either error bit 1, 3 or 6 set, 0 otherwise. Cleared +Reads the error log for the slow control on hubs. One bit for each port. 1 if +there was a transfer with either error bit 1, 3 or 6 set, 0 otherwise. Cleared after each read. -\paragraph*{\$read hub time limit \\ \$write hub time limit \$value } +\paragraph*{\$read hub time limit \\ \$write hub time limit \$value } optional: \verb|$addr|, \verb|raw| \\ -Reads or writes the setting for timeouts on hub ports. For details see the +Reads or writes the setting for timeouts on hub ports. For details see the entry for register 0xC5 in \ref{hubcontrolregs}. +\subsection{CTS} +\paragraph*{cts \$read trigger box \\ cts \$write trigger box (on|off)}~\\ +Switches the trigger box functionality of the CTS on or off, respectively reads +the current status. + +\paragraph*{cts \$read inputs \\ cts \$read outputs}~\\ +Gives back a full list of enabled inputs and enabled outputs. Output is raw +in both hexadecimal and binary view as well as clear-text with the usual input names. + +\paragraph*{cts \$write input INPUT (on|off)}~\\ +Enables or disables the given input or multiplicity trigger in the CTS. Allowed +input names are: start0 -- start7, veto0 -- veto7, tof1 -- tof6, rpc1 -- rpc6, +phys1 -- phys4 to enable a single input. start, veto, tof, rpc, phys enable the +full block of inputs of one type. For start and veto inputs, the corresponding +input to the ouput mux is also enabled. + +\paragraph*{cts \$write MULT (on|off)}~\\ +Enables or disables the given multiplicity output of the multiplicity logic. +Available options are: mult1, mult2, mult3, mult4, mult5, mult6, mult2nn, +mult3nn, mult2opposite. "nn" means "no neighbour" and "opposite means opposite +sectors. The status of the multiplicity triggers are read using the read inputs +command. + +\paragraph*{cts \$read scaler}~\\ +Reads the 32 scalers of trigger inputs and shows them including the clear-text +names of each input. + +\paragraph*{cts \$write pulser rate \$value}~\\ +Sets the internal pulser to the given value. Allowed values are 0 -- 7. The +resulting trigger rate is also shown. + +\paragraph*{cts \$write pulser (on|off)}~\\ +Switches the internal pulser on or off. + +\paragraph*{cts \$read pulser}~\\ +Outputs the current status of the internal pulser. + +\paragraph*{cts \$write shower calib (on|off) \\ cts \$write shower pedestal +(on|off) \\ cts \$write mdc calib (on|off)}~\\ +Switches on or off pedestal or calibration triggers for Shower and MDC. + +\paragraph*{cts \$read (calib|pedestal)}~\\ +Reads the current status of calibration and pedestal triggers. + +\paragraph*{cts \$write antico(incidence) (on|off) \\ cts \$read +antico(incidence)}~\\ +Sets or reads the status of the coincidence logic between start and veto inputs. + \subsection{Other features} \paragraph*{trbcmd \$string \\ trbflash \$string} ~\\ -These two commands execute trbcmd or trbflash with the given string of +These two commands execute trbcmd or trbflash with the given string of attributes. \paragraph*{watch \$float} ~\\ -The watch option can be added to any command (depsite trbcmd and trbflash) to -execute the given command in an endless loop. The \verb|$float| value gives +The watch option can be added to any command (depsite trbcmd and trbflash) to +execute the given command in an endless loop. The \verb|$float| value gives the period in seconds. \section{trb\_i2c} @@ -320,9 +368,9 @@ trb\_i2c can only read or write one register with one 8bit value at a time. \noindent The following parameters are needed for access: \begin{description} - \item[trb\_address] TRBnet address of RICH ADCM to be accessed. Broadcast + \item[trb\_address] TRBnet address of RICH ADCM to be accessed. Broadcast access is supported. - \item[chip] I2C bus address of the APV to be accessed. General call access + \item[chip] I2C bus address of the APV to be accessed. General call access is supported. \item[register] register address inside the APV chip. \item[value] only for write access: value to be written. @@ -334,7 +382,7 @@ access. \noindent APV register map can be found inside the APV manual. -\noindent trb\_i2c usually is used once during configuration of the system to +\noindent trb\_i2c usually is used once during configuration of the system to setup all APV internal registers. Please note that changing certain registers inside APV will make a new SYNC trigger mandatory to activate the changed settings. It is not recommended to play with that tool during beam. @@ -342,12 +390,12 @@ settings. It is not recommended to play with that tool during beam. \subsection*{Reading data from APV} \paragraph*{trb\_i2c r 0x3000 0x20 0x05} ~\\ -This command reads register 0x01 from APV on I2C address 0x20 on ADCM module +This command reads register 0x01 from APV on I2C address 0x20 on ADCM module with TRBnet address 0x3000 (i.e. sector 0, most inner ADCM, APV FE number 0).\\ This register shows the currently used LATENCY. \paragraph*{trb\_i2c r 0xfffb 0x3f 0x01} ~\\ -This command reads on all connected ADCMs (RICH broadcast) all connected APVs +This command reads on all connected ADCMs (RICH broadcast) all connected APVs (I2C general call) the contents of register 0x01 (ERROR).\\ Output is wired-and due to I2C bus signaling, so reading error bits from all APVs in a shot is not possible due to a design bug inside the APV. @@ -364,15 +412,15 @@ RICH broadcast and I2C general call is used. \textbf{trbrichcmd} allows accessing some special features of the RICH ADCMv3. \paragraph*{trbrichcmd uid trb\_address} ~\\ -This command reads the UniqueIDs of the backplane and APV frontends connected +This command reads the UniqueIDs of the backplane and APV frontends connected to one ADCM. As these IDs are not constantly updated by the FPGA, this command -must be released twice. The first call will read the IDs from the 1Wire +must be released twice. The first call will read the IDs from the 1Wire chips, the second call will deliver the data read in the access before. -\noindent Due to the long access times on 1Wire, and not to disturb frontend +\noindent Due to the long access times on 1Wire, and not to disturb frontend operation, continously updating this information automatically is not possible. -\noindent Failures on 1Wire readout (no presence pulse) are sensed; not +\noindent Failures on 1Wire readout (no presence pulse) are sensed; not connected sensors are marked with dashes in the result list. \noindent The first 15 sensor IDs correlate to the APV frontends, the 16th ID @@ -386,13 +434,13 @@ To be written~$\ldots$ \label{software_trbflash} This piece of software allows you to read, erase, program and verify the boot -FlashROMs on different boards in the system. Not all boards feature such +FlashROMs on different boards in the system. Not all boards feature such FlashROMs. -\noindent \textbf{trb\_flash} offers are nice help page, if you start it -without arguments. +\noindent \textbf{trb\_flash} offers are nice help page, if you start it +without arguments. -\noindent If you feel uncomfortable with this short help page, then it may be +\noindent If you feel uncomfortable with this short help page, then it may be a wise decision to ask your local hardware expert for help before trying out some things on your own.\\ \textbf{trb\_flash} has been written with many safety features to avoid the -- 2.43.0