From 5afe6da8756d78ab14c850726cbf76ec1d04c437 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Fri, 19 Mar 2010 18:02:59 +0000 Subject: [PATCH] *** empty log message *** --- special/handler_data.vhd | 11 ++- special/handler_ipu.vhd | 16 ++-- special/handler_lvl1.vhd | 57 ++++++------ special/handler_trigger_and_data.vhd | 130 ++++++++++++++++++++------- 4 files changed, 140 insertions(+), 74 deletions(-) diff --git a/special/handler_data.vhd b/special/handler_data.vhd index 177e395..13dac12 100644 --- a/special/handler_data.vhd +++ b/special/handler_data.vhd @@ -10,7 +10,9 @@ entity handler_data is generic( DATA_INTERFACE_NUMBER : integer range 1 to 16 := 1; DATA_BUFFER_DEPTH : integer range 9 to 14 := 9; + DATA_BUFFER_WIDTH : integer range 1 to 32 := 32; DATA_BUFFER_FULL_THRESH : integer range 0 to 2**14-1 := 2**8; + TRG_RELEASE_AFTER_DATA_FINISH: integer range 0 to 1 := c_YES; HEADER_BUFFER_DEPTH : integer range 9 to 14 := 9; HEADER_BUFFER_FULL_THRESH : integer range 2**8 to 2**14-1 := 2**8 ); @@ -31,20 +33,21 @@ entity handler_data is FEE_DATA_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); FEE_DATA_WRITE_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); FEE_DATA_FINISHED_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); - FEE_DATA_STATUSBITS_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); FEE_DATA_ALMOST_FULL_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); --IPU Handler - IPU_DATA_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER*36-1 downto 0); + IPU_DATA_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); IPU_DATA_READ_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); IPU_DATA_EMPTY_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); IPU_DATA_LENGTH_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER*16-1 downto 0); - + IPU_DATA_FLAGS_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER*4-1 downto 0); + IPU_HDR_DATA_OUT : out std_logic_vector(31 downto 0); IPU_HDR_DATA_READ_IN : in std_logic; IPU_HDR_DATA_EMPTY_OUT : out std_logic; --Debug - DEBUG_OUT : out std_logic_vector(31 downto 0); + DEBUG_OUT : out std_logic_vector(31 downto 0) + ); end entity; \ No newline at end of file diff --git a/special/handler_ipu.vhd b/special/handler_ipu.vhd index c13a509..c8c9cf2 100644 --- a/special/handler_ipu.vhd +++ b/special/handler_ipu.vhd @@ -15,12 +15,13 @@ entity handler_ipu is RESET : in std_logic; --From Data Handler - DAT_DATA : in std_logic_vector(DATA_INTERFACE_NUMBER*36-1 downto 0); - DAT_DATA_READ : out std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); - DAT_DATA_EMPTY : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); - DAT_HDR_DATA : in std_logic_vector(31 downto 0); - DAT_HDR_DATA_READ : out std_logic; - DAT_HDR_DATA_EMPTY : in std_logic; + DAT_DATA_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); + DAT_DATA_READ_OUT : out std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); + DAT_DATA_EMPTY_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); + DAT_DATA_FLAGS_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*4-1 downto 0); + DAT_HDR_DATA_IN : in std_logic_vector(31 downto 0); + DAT_HDR_DATA_READ_OUT : out std_logic; + DAT_HDR_DATA_EMPTY_IN : in std_logic; --To IPU Channel IPU_NUMBER_IN : in std_logic_vector (15 downto 0); @@ -36,7 +37,8 @@ entity handler_ipu is --Debug - DEBUG_OUT : out std_logic_vector(31 downto 0); + DEBUG_OUT : out std_logic_vector(31 downto 0) + ); end entity; diff --git a/special/handler_lvl1.vhd b/special/handler_lvl1.vhd index 7db3b5a..ef89779 100644 --- a/special/handler_lvl1.vhd +++ b/special/handler_lvl1.vhd @@ -8,37 +8,32 @@ use work.trb_net_components.all; entity handler_lvl1 is - generic( - DATA_INTERFACE_NUMBER : integer range 1 to 16 := 1 - ); - port ( - RESET : in std_logic; - CLOCK : in std_logic; - --Timing Trigger - LVL1_TIMING_TRG_IN : in std_logic; - --LVL1_handler connection - LVL1_TRG_TYPE_IN : in std_logic_vector(3 downto 0); - LVL1_TRG_RECEIVED_IN : in std_logic; - LVL1_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); - LVL1_TRG_CODE_IN : in std_logic_vector(7 downto 0); - LVL1_TRG_INFORMATION_IN : in std_logic_vector(23 downto 0); - LVL1_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); - LVL1_TRG_RELEASE_OUT : out std_logic := '0'; - LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); + port ( + RESET : in std_logic; + CLOCK : in std_logic; + --Timing Trigger + LVL1_TIMING_TRG_IN : in std_logic; + LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); + --LVL1_handler connection + LVL1_TRG_TYPE_IN : in std_logic_vector(3 downto 0); + LVL1_TRG_RECEIVED_IN : in std_logic; + LVL1_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); + LVL1_TRG_CODE_IN : in std_logic_vector(7 downto 0); + LVL1_TRG_INFORMATION_IN : in std_logic_vector(23 downto 0); + LVL1_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); + LVL1_TRG_RELEASE_OUT : out std_logic := '0'; - --FEE logic / Data Handler - FEE_TIMING_TRIGGER_OUT : out std_logic; --timing trigger (registered) - FEE_TRG_RECEIVED_OUT : out std_logic; --TRG Info valid & FEE busy - FEE_TRG_TYPE_OUT : out std_logic_vector(3 downto 0); --trigger type - FEE_TRG_INFO_OUT : out std_logic_vector(23 downto 0); --further trigger details - FEE_TRG_CODE_OUT : out std_logic_vector(7 downto 0); --further trigger details - FEE_TRG_NUMBER_OUT : out std_logic_vector(15 downto 0); --trigger number - FEE_BUSY_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); - FEE_TRG_STATUSBITS_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); + --FEE logic / Data Handler + FEE_TIMING_TRIGGER_OUT : out std_logic; --timing trigger (registered) + FEE_TRG_RECEIVED_OUT : out std_logic; --TRG Info valid & FEE busy + FEE_TRG_TYPE_OUT : out std_logic_vector(3 downto 0); --trigger type + FEE_TRG_INFO_OUT : out std_logic_vector(23 downto 0); --further trigger details + FEE_TRG_CODE_OUT : out std_logic_vector(7 downto 0); --further trigger details + FEE_TRG_NUMBER_OUT : out std_logic_vector(15 downto 0); --trigger number + FEE_RELEASE_IN : in std_logic; + FEE_TRG_STATUSBITS_IN : in std_logic_vector(31 downto 0); - DAT_TRG_STATUSBITS_IN : in std_logic_vector(31 downto 0); - DAT_TRG_RELEASE_IN : in std_logic; - --Debug - DEBUG_OUT : out std_logic_vector (15 downto 0) - ); + --Debug + DEBUG_OUT : out std_logic_vector (15 downto 0) + ); end entity; \ No newline at end of file diff --git a/special/handler_trigger_and_data.vhd b/special/handler_trigger_and_data.vhd index 544a5ad..a50e55e 100644 --- a/special/handler_trigger_and_data.vhd +++ b/special/handler_trigger_and_data.vhd @@ -10,10 +10,11 @@ entity handler_trigger_and_data is generic( DATA_INTERFACE_NUMBER : integer range 1 to 16 := 1; DATA_BUFFER_DEPTH : integer range 9 to 14 := 9; + DATA_BUFFER_WIDTH : integer range 1 to 32 := 32; DATA_BUFFER_FULL_THRESH : integer range 0 to 2**14-1 := 2**8; + TRG_RELEASE_AFTER_DATA_FINISH: integer range 0 to 1 := c_YES; HEADER_BUFFER_DEPTH : integer range 9 to 14 := 9; HEADER_BUFFER_FULL_THRESH : integer range 2**8 to 2**14-1 := 2**8 - ); port( CLOCK : in std_logic; @@ -22,6 +23,7 @@ entity handler_trigger_and_data is --To Endpoint --Timing Trigger (registered) LVL1_TIMING_TRG_IN : in std_logic; + LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); --LVL1_handler connection LVL1_TRG_TYPE_IN : in std_logic_vector(3 downto 0); LVL1_TRG_RECEIVED_IN : in std_logic; @@ -30,7 +32,6 @@ entity handler_trigger_and_data is LVL1_TRG_INFORMATION_IN : in std_logic_vector(23 downto 0); LVL1_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); LVL1_TRG_RELEASE_OUT : out std_logic; - LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); --IPU channel IPU_NUMBER_IN : in std_logic_vector(15 downto 0); @@ -47,10 +48,10 @@ entity handler_trigger_and_data is --To FEE --Trigger to FEE FEE_TIMING_TRIGGER_OUT : out std_logic; --timing trigger (registered) + FEE_INT_TRG_NUMBER : out std_logic_vector(15 downto 0); --internal trigger counter, valid with timing trigger FEE_TRG_RECEIVED_OUT : out std_logic; --TRG Info valid & FEE busy FEE_TRG_TYPE_OUT : out std_logic_vector(3 downto 0); --trigger type FEE_TRG_INFO_OUT : out std_logic_vector(23 downto 0); --further trigger details - FEE_TRG_CODE_OUT : out std_logic_vector(7 downto 0); --further trigger details FEE_TRG_NUMBER_OUT : out std_logic_vector(15 downto 0); --trigger number FEE_TRG_RELEASE_IN : in std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); FEE_TRG_STATUSBITS_IN : in std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0); @@ -82,31 +83,35 @@ architecture handler_trigger_and_data_arch of handler_trigger_and_data is signal fee_trg_info : std_logic_vector(23 downto 0); signal fee_trg_code : std_logic_vector(7 downto 0); signal fee_trg_number : std_logic_vector(15 downto 0); - signal fee_release : std_logic; + signal fee_trg_release : std_logic; signal fee_trg_statusbits : std_logic_vector(31 downto 0); - signal dat_almost_full : std_logic; - signal dat_statusbits : std_logic_vector(31 downto 0); - - signal dat_buffer_warn : std_logic; - signal dat_buffer_full : std_logic; + + signal dat_lvl1_release : std_logic; signal dat_lvl1_statusbits : std_logic_vector(31 downto 0); - signal ipu_data : std_logic_vector(36*DATA_INTERFACE_NUMBER-1 downto 0); + + signal ipu_data : std_logic_vector(32*DATA_INTERFACE_NUMBER-1 downto 0); signal ipu_data_read : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); signal ipu_data_empty : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0); + signal ipu_data_flags : std_logic_vector(4*DATA_INTERFACE_NUMBER-1 downto 0); signal ipu_data_length : std_logic_vector(16*DATA_INTERFACE_NUMBER-1 downto 0); signal ipu_header : std_logic_vector(31 downto 0); signal ipu_header_empty : std_logic; signal ipu_header_read : std_logic; - + begin + +----------------------------------------------------------------------- +-- The LVL1 Handler +----------------------------------------------------------------------- THE_LVL1_HANDLER : handler_lvl1 port map( RESET => RESET, CLOCK => CLOCK, --Timing Trigger - LVL1_TIMING_TRG_IN => LVL1_TIMING_TRG_IN, + LVL1_TIMING_TRG_IN => LVL1_TIMING_TRG_IN, + LVL1_INT_TRG_NUMBER_IN => LVL1_INT_TRG_NUMBER_IN, --LVL1_handler connection LVL1_TRG_TYPE_IN => LVL1_TRG_TYPE_IN, LVL1_TRG_RECEIVED_IN => LVL1_TRG_RECEIVED_IN, @@ -115,8 +120,6 @@ begin LVL1_TRG_INFORMATION_IN => LVL1_TRG_INFORMATION_IN, LVL1_ERROR_PATTERN_OUT => LVL1_ERROR_PATTERN_OUT, LVL1_TRG_RELEASE_OUT => LVL1_TRG_RELEASE_OUT, - LVL1_INT_TRG_NUMBER_IN => LVL1_INT_TRG_NUMBER_IN, - --FEE logic / Data Handler FEE_TIMING_TRIGGER_OUT => fee_timing_trigger, FEE_TRG_RECEIVED_OUT => fee_trg_received, @@ -124,22 +127,51 @@ begin FEE_TRG_INFO_OUT => fee_trg_info, FEE_TRG_CODE_OUT => fee_trg_code, FEE_TRG_NUMBER_OUT => fee_trg_number, - FEE_BUSY_IN => fee_busy, - FEE_BUFFER_WARN_IN => fee_buffer_warn, + FEE_RELEASE_IN => fee_trg_release, FEE_TRG_STATUSBITS_IN => fee_trg_statusbits, - - DAT_ALMOST_FULL_OUT => dat_almost_full, - DAT_STATUSBITS_IN => dat_statusbits, - --Debug - DEBUG_OUT => DEBUG_LVL1_HANDLER_OUT + DEBUG_OUT => DEBUG_LVL1_HANDLER_OUT ); + + +----------------------------------------------------------------------- +-- Combine all trg_release and trg_statusbits to one +----------------------------------------------------------------------- + + proc_trg_release : process(CLOCK) + variable tmp_release : std_logic; + variable tmp_statusbits : std_logic_vector(31 downto 0); + begin + if rising_edge(CLOCK) then + if RESET = '1' or LVL1_TRG_RECEIVED_IN = '0' then + fee_trg_statusbits <= (others => '0'); + fee_trg_release <= '0'; + else + tmp_release := fee_trg_release or dat_lvl1_release; + tmp_statusbits := fee_trg_statusbits or dat_lvl1_statusbits; + for i in 0 to DATA_INTERFACE_NUMBER-1 loop + tmp_release := tmp_release or FEE_TRG_RELEASE_IN(i); + tmp_statusbits := tmp_statusbits or FEE_TRG_STATUSBITS_IN(32*i+31 downto 32*i); + end loop; + fee_trg_release <= tmp_release; + fee_trg_statusbits <= tmp_statusbits; + end if; + end if; + end process; + + +----------------------------------------------------------------------- +-- The data handler, containing all buffers +----------------------------------------------------------------------- + THE_DATA_HANDLER : handler_data generic map( DATA_INTERFACE_NUMBER => DATA_INTERFACE_NUMBER, DATA_BUFFER_DEPTH => DATA_BUFFER_DEPTH, + DATA_BUFFER_WIDTH => DATA_BUFFER_WIDTH, DATA_BUFFER_FULL_THRESH => DATA_BUFFER_FULL_THRESH, + TRG_RELEASE_AFTER_DATA_FINISH=> TRG_RELEASE_AFTER_DATA_FINISH, HEADER_BUFFER_DEPTH => HEADER_BUFFER_DEPTH, HEADER_BUFFER_FULL_THRESH => HEADER_BUFFER_FULL_THRESH ) @@ -151,32 +183,66 @@ begin LVL1_TRG_RECEIVED_IN => fee_trigger_received, LVL1_TRG_TYPE_IN => fee_trg_type, LVL1_TRG_INFO_IN => fee_trg_info, + LVL1_TRG_CODE_IN => fee_trg_code, LVL1_TRG_NUMBER_IN => fee_trg_number, - LVL1_BUFFER_WARN_OUT => dat_buffer_warn, - LVL1_BUFFER_FULL_OUT => dat_buffer_full, LVL1_STATUSBITS_OUT => dat_lvl1_statusbits, - + LVL1_TRG_RELEASE_OUT => dat_lvl1_release, --From FEE FEE_DATA_IN => FEE_DATA_IN, FEE_DATA_WRITE_IN => FEE_DATA_WRITE_IN, FEE_DATA_FINISHED_IN => FEE_DATA_FINISHED_IN, FEE_DATA_ALMOST_FULL_OUT => FEE_DATA_ALMOST_FULL_OUT, - --To IPU Handler IPU_DATA_OUT => ipu_data, IPU_DATA_READ_IN => ipu_data_read, IPU_DATA_EMPTY_OUT => ipu_data_empty, - IPU_DATA_LENGTH => ipu_data_length, + IPU_DATA_LENGTH_OUT => ipu_data_length, + IPU_DATA_FLAGS_OUT => ipu_data_flags, IPU_HDR_DATA_OUT => ipu_header, IPU_HDR_DATA_READ_IN => ipu_header_read, IPU_HDR_DATA_EMPTY_OUT => ipu_header_empty, - --Debug DEBUG_OUT => DEBUG_DATA_HANDLER_OUT - ); - --- combine LVL1 fee statusbits --- combine FEE Busy Release + ); + + +----------------------------------------------------------------------- +-- The IPU handler +----------------------------------------------------------------------- + + THE_IPU_HANDLER : handler_ipu + generic map( + DATA_INTERFACE_NUMBER => DATA_INTERFACE_NUMBER + ) + port map( + CLOCK => CLOCK, + RESET => RESET, + --From Data Handler + DAT_DATA_IN => ipu_data, + DAT_DATA_READ_OUT => ipu_data_read, + DAT_DATA_EMPTY_IN => ipu_data_empty, + DAT_DATA_LENGTH_IN => ipu_data_length, + DAT_DATA_FLAGS_IN => ipu_data_flags, + DAT_HDR_DATA_IN => ipu_header, + DAT_HDR_DATA_READ_OUT => ipu_header_read, + DAT_HDR_DATA_EMPTY_IN => ipu_header_empty, + --To IPU Channel + IPU_NUMBER_IN => IPU_NUMBER_IN, + IPU_INFORMATION_IN => IPU_INFORMATION_IN, + IPU_READOUT_TYPE_IN => IPU_READOUT_TYPE_IN, + IPU_START_READOUT_IN => IPU_START_READOUT_IN, + IPU_DATA_OUT => IPU_DATA_OUT, + IPU_DATAREADY_OUT => IPU_DATAREADY_OUT, + IPU_READOUT_FINISHED_OUT => IPU_READOUT_FINISHED_OUT, + IPU_READ_IN => IPU_READ_IN, + IPU_LENGTH_OUT => IPU_LENGTH_OUT, + IPU_ERROR_PATTERN_OUT => IPU_ERROR_PATTERN_OUT, + --Debug + DEBUG_OUT => DEBUG_IPU_HANDLER_OUT + ); + + + + - end architecture; \ No newline at end of file -- 2.43.0