From 5dec8381b6de5c3162e0638beb9da942e5945ea1 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Mon, 3 Dec 2007 15:02:27 +0000 Subject: [PATCH] trg in hub, Jan --- testbench/trb_net16_dummy_apl.vhd | 23 ++++--- trb_net16_hub_base.vhd | 99 ++++++++++++++++++++++++------- 2 files changed, 94 insertions(+), 28 deletions(-) diff --git a/testbench/trb_net16_dummy_apl.vhd b/testbench/trb_net16_dummy_apl.vhd index 7906db3..5577789 100644 --- a/testbench/trb_net16_dummy_apl.vhd +++ b/testbench/trb_net16_dummy_apl.vhd @@ -13,9 +13,9 @@ use work.trb_net_std.all; entity trb_net16_dummy_apl is generic ( - TARGET_ADDRESS : std_logic_vector (15 downto 0) := x"ffff"; - PREFILL_LENGTH : integer := 3; - TRANSFER_LENGTH : integer := 3 -- length of dummy data + TARGET_ADDRESS : std_logic_vector (15 downto 0) := x"F001"; + PREFILL_LENGTH : integer := 1; + TRANSFER_LENGTH : integer := 1 -- length of dummy data -- might not work with transfer_length > api_fifo -- because of incorrect handling of fifo_full_in! @@ -59,10 +59,17 @@ architecture trb_net16_dummy_apl_arch of trb_net16_dummy_apl is signal buf_APL_WRITE_OUT, next_APL_WRITE_OUT : std_logic; signal buf_APL_SEND_OUT, next_APL_SEND_OUT : std_logic; signal next_packet_counter, packet_counter : std_logic_vector(1 downto 0); - + signal address, reghigh, reglow : std_logic_vector(15 downto 0); begin + + address <= x"0008"; + reghigh <= x"DEAD"; + reglow <= x"AFFE"; + + + APL_READ_OUT <= '1'; --just read, do not check - APL_DTYPE_OUT <= x"1"; + APL_DTYPE_OUT <= "1001"; APL_ERROR_PATTERN_OUT <= x"12345678"; APL_TARGET_ADDRESS_OUT <= TARGET_ADDRESS; --APL_DATA_OUT <= reg_counter; @@ -96,7 +103,7 @@ begin else next_APL_SEND_OUT <= buf_APL_SEND_OUT; next_state <= WRITING; - next_APL_DATA_OUT <= (1 => '1', others => '0'); + next_APL_DATA_OUT <= address; next_APL_WRITE_OUT <= '1'; next_packet_counter <= "01"; end if; @@ -108,11 +115,11 @@ begin next_state <= WRITING; if packet_counter = "01" then next_APL_WRITE_OUT <= '1'; - next_APL_DATA_OUT <= (0 => '1', others => '0'); + next_APL_DATA_OUT <= reghigh; next_packet_counter <= "10"; elsif packet_counter = "10" then next_APL_WRITE_OUT <= '1'; - next_APL_DATA_OUT <= reg_counter; + next_APL_DATA_OUT <= reglow; next_packet_counter <= "11"; elsif packet_counter = "11" then next_state <= IDLE; diff --git a/trb_net16_hub_base.vhd b/trb_net16_hub_base.vhd index 9f5e6d6..d06ff9f 100644 --- a/trb_net16_hub_base.vhd +++ b/trb_net16_hub_base.vhd @@ -23,9 +23,9 @@ entity trb_net16_hub_base is MII_NUMBER : integer range 2 to 16 := 2; --each row is one media interface and each column is one channel. starting with 0,0, ending with 15,15 --CHANNEL 3 2 1 0 - MII_INIT_DEPTH : hub_iobuf_config_t := (1,6,0,0, --MII 0 - 1,6,0,0, - 1,6,0,0, + MII_INIT_DEPTH : hub_iobuf_config_t := (1,1,0,0, --MII 0 + 1,1,0,0, + 1,1,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, @@ -39,9 +39,9 @@ entity trb_net16_hub_base is 0,0,0,0, 0,0,0,0, 0,0,0,0); --MII 15 - MII_REPLY_DEPTH : hub_iobuf_config_t := (1,6,0,0, --MII 0 - 1,6,0,0, - 1,6,0,0, + MII_REPLY_DEPTH : hub_iobuf_config_t := (1,1,0,0, --MII 0 + 1,1,0,0, + 1,1,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, @@ -63,8 +63,9 @@ entity trb_net16_hub_base is API_FIFO_TO_INT_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1); API_FIFO_TO_APL_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1); --trigger reading interfaces - TRG_NUMBER : integer range 0 to 16 := 0; - TRG_CHANNELS : hub_api_config_t := (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0) + TRG_NUMBER : integer range 0 to 16 := 2; + TRG_SECURE_MODE : integer range 0 to 1 := 0; + TRG_CHANNELS : hub_api_config_t := (0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0) ); port ( CLK : in std_logic; @@ -397,7 +398,40 @@ end component; STAT_FIFO_TO_APL : out std_logic_vector(31 downto 0) ); end component; - + + component trb_net16_term is + generic ( + FIFO_TERM_BUFFER_DEPTH : integer := 0; -- fifo for auto-answering of + -- the master path, if set to 0 + -- no buffer is used at all + SECURE_MODE : integer range 0 to 1 := 0 + --if secure_mode is not used, apl must provide error pattern and dtype until + --next trigger comes in. In secure mode these must be available when hold_trm goes low + ); + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + INT_DATAREADY_OUT: out std_logic; + INT_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + INT_PACKET_NUM_OUT: out std_logic_vector (1 downto 0); + INT_READ_IN: in std_logic; + INT_DATAREADY_IN: in std_logic; + INT_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + INT_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + INT_READ_OUT: out std_logic; + -- "mini" APL, just to see the triggers coming in + APL_DTYPE_OUT: out std_logic_vector (3 downto 0); -- see NewTriggerBusNetworkDescr + APL_ERROR_PATTERN_OUT: out std_logic_vector (31 downto 0); -- see NewTriggerBusNetworkDescr + APL_SEQNR_OUT: out std_logic_vector (7 downto 0); + APL_GOT_TRM: out std_logic; + APL_RELEASE_TRM: in std_logic; + APL_ERROR_PATTERN_IN: in std_logic_vector (31 downto 0) -- see NewTriggerBusNetworkDescr + -- Status and control port + ); + end component; + component trb_net16_regIO is generic ( MY_ADDRESS : std_logic_vector(15 downto 0) := x"F001"; @@ -740,6 +774,41 @@ begin end generate; end generate; end generate; + + gen_trgapi : if TRG_NUMBER /= 0 generate + gen_apis : for i in 2**(MUX_WIDTH-1)*MII_NUMBER+1+API_NUMBER to 2**(MUX_WIDTH-1)*MII_NUMBER+API_NUMBER+TRG_NUMBER generate + constant trg_offset : integer := i - (2**(MUX_WIDTH-1)*MII_NUMBER+1+API_NUMBER); + begin + TRG : trb_net16_term + generic map ( + FIFO_TERM_BUFFER_DEPTH => 0, + SECURE_MODE => TRG_SECURE_MODE + ) + port map( + -- Misc + CLK => CLK, + RESET => RESET, + CLK_EN => CLK_EN, + INT_DATAREADY_OUT => buf_to_hub_REPLY_DATAREADY(i), + INT_DATA_OUT => buf_to_hub_REPLY_DATA((i+1)*DATA_WIDTH-1 downto i*DATA_WIDTH), + INT_PACKET_NUM_OUT => buf_to_hub_REPLY_PACKET_NUM((i+1)*NUM_WIDTH-1 downto i*NUM_WIDTH), + INT_READ_IN => buf_to_hub_REPLY_READ(i), + INT_DATAREADY_IN => hub_to_buf_INIT_DATAREADY(i), + INT_DATA_IN => hub_to_buf_INIT_DATA((i+1)*DATA_WIDTH-1 downto i*DATA_WIDTH), + INT_PACKET_NUM_IN => hub_to_buf_INIT_PACKET_NUM((i+1)*NUM_WIDTH-1 downto i*NUM_WIDTH), + INT_READ_OUT => hub_to_buf_INIT_READ(i), + -- "mini" APL, just to see the triggers coming in + APL_DTYPE_OUT => TRG_DTYPE_OUT((trg_offset+1)*3-1 downto trg_offset*3), + APL_ERROR_PATTERN_OUT => TRG_ERROR_PATTERN_OUT((trg_offset+1)*32-1 downto trg_offset*32), + APL_SEQNR_OUT => TRG_SEQNR_OUT((trg_offset+1)*8-1 downto trg_offset*8), + APL_GOT_TRM => TRG_GOT_TRIGGER_OUT(trg_offset), + APL_RELEASE_TRM => TRG_RELEASE_IN(trg_offset), + APL_ERROR_PATTERN_IN => TRG_ERROR_PATTERN_IN((trg_offset+1)*32-1 downto trg_offset*32) + -- Status and control port + ); + end generate; + end generate; + --rearrange vectors for hub logic gen_rearrange : for CHANNEL in 0 to 2**(MUX_WIDTH-1)-1 generate constant api_num : integer := calc_special_number(CHANNEL, API_NUMBER, API_CHANNELS); @@ -1051,17 +1120,7 @@ HUB_MED_CONNECTED(31 downto MII_NUMBER) <= (others => '1'); IOBUF_STAT_CTRL_INIT_BUFFER <= (others => '0'); IOBUF_STAT_CTRL_REPLY_BUFFER <= (others => '0'); --- ADDR Name --- 0000 HUB_STAT_GEN --- 0001 HUB_STAT_CHANNEL1 & HUB_STAT_CHANNEL0 --- 0010 HUB_STAT_CHANNEL3 & HUB_STAT_CHANNEL2 --- 1000 HUB_CTRL_GEN --- 1001 HUB_CTRL_CHANNEL1 & HUB_CTRL_CHANNEL0 --- 1010 HUB_CTRL_CHANNEL3 & HUB_CTRL_CHANNEL2 --- 1100 HUB_CTRL_activepoints0 --- 1101 HUB_CTRL_activepoints1 --- 1110 HUB_CTRL_activepoints2 --- 1111 HUB_CTRL_activepoints3 + end architecture; -- 2.43.0