From 61a205eb80cbe9642b50e537660c36450184511a Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Sun, 22 Jul 2012 07:09:49 +0000
Subject: [PATCH] tdc slow control register is updated - cu

---
 trb3/TdcSlowControl.tex | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/trb3/TdcSlowControl.tex b/trb3/TdcSlowControl.tex
index b53caa3..54e439c 100644
--- a/trb3/TdcSlowControl.tex
+++ b/trb3/TdcSlowControl.tex
@@ -114,6 +114,8 @@ A set of control registers are assigned in order to access the basic controls, e
 				&					& 31-24	& reserved\\ \hline
       \multirow{2}{*}{0x8e}	& \multirow{2}{3.5cm}{Total empty channels}	& 23-0	& Number of empty channels since the last reset signal\\
 				&					& 31-24	& reserved\\ \hline
+      \multirow{2}{*}{0x8f}	& \multirow{2}{3.5cm}{Release Number}	& 23-0	& Number of release signals sent\\
+				&					& 31-24	& reserved\\ \hline
     \end{tabularx}
   \caption{The status registers of the TDC. (Continue)}
   \label{tab:tdcStatusReg2}
-- 
2.43.0