From 633dbe4692f8b0292a1ce2ec12c94365159ff8ea Mon Sep 17 00:00:00 2001
From: Michael Wiebusch <stratomaster@gmx.net>
Date: Tue, 17 Dec 2013 23:15:08 +0100
Subject: [PATCH] + project structure - unnessesary include directives
---
firmware/src/CB_functions.c | 2 +-
firmware/src/CB_functions.h | 3 -
firmware/src/Makefile | 1 +
firmware/src/main.c | 120 ++-------------------------------
firmware/src/periph_conf.c | 4 +-
firmware/src/periph_conf.h | 4 +-
firmware/src/spi2.c | 121 ++++++++++++++++++++++++++++++++++
firmware/src/spi2.h | 17 +++++
firmware/src/stm32f10x_conf.h | 2 +-
firmware/src/usart1.c | 1 +
firmware/src/usart1.h | 3 +-
11 files changed, 153 insertions(+), 125 deletions(-)
create mode 100644 firmware/src/spi2.c
create mode 100644 firmware/src/spi2.h
diff --git a/firmware/src/CB_functions.c b/firmware/src/CB_functions.c
index 12a1640..bfd3e7a 100644
--- a/firmware/src/CB_functions.c
+++ b/firmware/src/CB_functions.c
@@ -7,8 +7,8 @@
*/
#include "CB_functions.h"
-
#include "periph_conf.h"
+#include "stm32f10x_conf.h"
diff --git a/firmware/src/CB_functions.h b/firmware/src/CB_functions.h
index 2a2d679..b8c7b5a 100644
--- a/firmware/src/CB_functions.h
+++ b/firmware/src/CB_functions.h
@@ -7,9 +7,6 @@
*/
#include "stm32f10x.h"
-#include "stm32f10x_conf.h" // contains all std periph includes
-#include "core_cm3.h"
-// #include "stm32f10x_it.h"
void init_CB_GPIO_Outputs(void);
diff --git a/firmware/src/Makefile b/firmware/src/Makefile
index 174d4e7..2495997 100644
--- a/firmware/src/Makefile
+++ b/firmware/src/Makefile
@@ -8,6 +8,7 @@ OBJS+=stm32f10x_it.o
OBJS+=periph_conf.o
OBJS+=CB_functions.o
OBJS+=usart1.o
+OBJS+=spi2.o
# OBJS+=keypins.o
diff --git a/firmware/src/main.c b/firmware/src/main.c
index 658d465..df5932f 100644
--- a/firmware/src/main.c
+++ b/firmware/src/main.c
@@ -15,16 +15,19 @@
#include "newlib_stubs.c"
#include "CB_functions.h"
#include "usart1.h"
+#include "spi2.h"
#define UC_NO_REGS 17
+
+extern uint16_t SPIBuffer[];
+
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
USART_InitTypeDef USART_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
-uint16_t SPIBuffer[] = {0xAAAA, 0xAAAA, 0xAAAA};
uint16_t uC_regs[UC_NO_REGS];
@@ -35,9 +38,7 @@ void SysTick_Handler(void);
void disable_JTAG(void);
-void init_SPI2(void);
-void spi_dma_shovel(void);
@@ -83,8 +84,8 @@ int main(int argc, char *argv[]) {
init_SPI2();
- SPIBuffer[0] = 0x1234;
- SPIBuffer[1] = 0x5678;
+// SPIBuffer[0] = 0x1234;
+// SPIBuffer[1] = 0x5678;
init_USART1();
@@ -97,115 +98,6 @@ int main(int argc, char *argv[]) {
}
-void spi_dma_shovel(void) {
-
-
-
-// DMA_Cmd(DMA1_Channel4, DISABLE);
- DMA_Cmd(DMA1_Channel5, DISABLE);
-// DMA_SetCurrDataCounter(DMA1_Channel4, 2);
- DMA_SetCurrDataCounter(DMA1_Channel5, 2);
-
- // Chip Select Low
-// GPIO_WriteBit(GPIOB, GPIO_Pin_12, RESET);
- CB_GPIO_Out_Lo(UC_CS); // spi nCS -> idle Hi
-
-// DMA_Cmd(DMA1_Channel4, ENABLE);
- DMA_Cmd(DMA1_Channel5, ENABLE);
-}
-
-
-
-void init_SPI2(void) {
- // configure the spi with DMA
- // code example from dillertech.de
-
- RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
- RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
-
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_Init(GPIOB, &GPIO_InitStructure);
-
- // // MISO, not used
-// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
-// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-// GPIO_Init(GPIOB, &GPIO_InitStructure);
- // use different CS
-// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
-// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
-// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-// GPIO_Init(GPIOB, &GPIO_InitStructure);
-//
-// GPIO_WriteBit(GPIOB, GPIO_Pin_12, SET);
-
-// SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
- SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
- SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
- SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
- SPI_InitStructure.SPI_CRCPolynomial = 0;
- SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
- SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
- SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
- SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
- SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
- SPI_Init(SPI2, &SPI_InitStructure);
-
- SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
- // // MISO not used
-// SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
-
- SPI_Cmd(SPI2, ENABLE);
-
-
- // // MISO not used
-// // DMA Channel 4 - SPI RX
-// DMA_InitStructure.DMA_BufferSize = 0;
-// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
-// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-// DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
-// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
-// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
-// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
-// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI2->DR;
-// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
-// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
-// DMA_InitStructure.DMA_Priority = DMA_Priority_High;
-// DMA_Init(DMA1_Channel4, &DMA_InitStructure);
-//
-// DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
-
- // DMA Channel 5 - SPI TX
- DMA_InitStructure.DMA_BufferSize = 0;
- DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
- DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-// DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
- DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
- DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
- DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
- DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI2->DR;
- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
- DMA_InitStructure.DMA_Priority = DMA_Priority_High;
- DMA_Init(DMA1_Channel5, &DMA_InitStructure);
-
- NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-
-
-
-
-
-
-}
-
diff --git a/firmware/src/periph_conf.c b/firmware/src/periph_conf.c
index 21b81a1..5f2495d 100644
--- a/firmware/src/periph_conf.c
+++ b/firmware/src/periph_conf.c
@@ -7,10 +7,8 @@
*/
/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_conf.h"
#include "periph_conf.h"
-#include "stm32f10x_spi.h"
-#include "stm32f10x_i2c.h"
-#include "stm32f10x_dma.h"
// by micha,
diff --git a/firmware/src/periph_conf.h b/firmware/src/periph_conf.h
index a0c03bc..76ec968 100644
--- a/firmware/src/periph_conf.h
+++ b/firmware/src/periph_conf.h
@@ -7,8 +7,8 @@
*/
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x_conf.h"
+#include "stm32f10x.h"
+
diff --git a/firmware/src/spi2.c b/firmware/src/spi2.c
new file mode 100644
index 0000000..ce28d55
--- /dev/null
+++ b/firmware/src/spi2.c
@@ -0,0 +1,121 @@
+/**
+ ********************************************************
+ *
+ * SPI2
+ *
+ ********************************************************
+ */
+
+#include "spi2.h"
+#include "periph_conf.h"
+#include "stm32f10x_conf.h"
+
+uint16_t SPIBuffer[] = {0xAAAA, 0xAAAA, 0xAAAA};
+
+GPIO_InitTypeDef GPIO_InitStructure;
+NVIC_InitTypeDef NVIC_InitStructure;
+SPI_InitTypeDef SPI_InitStructure;
+DMA_InitTypeDef DMA_InitStructure;
+
+void init_SPI2(void) {
+ // configure the spi with DMA
+ // code example from dillertech.de
+
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ // // MISO, not used
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+ // use different CS
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+//
+// GPIO_WriteBit(GPIOB, GPIO_Pin_12, SET);
+
+// SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
+ SPI_InitStructure.SPI_CRCPolynomial = 0;
+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
+ SPI_Init(SPI2, &SPI_InitStructure);
+
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
+ // // MISO not used
+// SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
+
+ SPI_Cmd(SPI2, ENABLE);
+
+
+ // // MISO not used
+// // DMA Channel 4 - SPI RX
+// DMA_InitStructure.DMA_BufferSize = 0;
+// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+// DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
+// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
+// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI2->DR;
+// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
+// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+// DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+// DMA_Init(DMA1_Channel4, &DMA_InitStructure);
+//
+// DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
+
+ // DMA Channel 5 - SPI TX
+ DMA_InitStructure.DMA_BufferSize = 0;
+ DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+ DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+// DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
+ DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPIBuffer;
+ DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
+ DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+ DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI2->DR;
+ DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
+ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+ DMA_Init(DMA1_Channel5, &DMA_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure);
+}
+
+
+
+void spi_dma_shovel(void) {
+
+
+
+// DMA_Cmd(DMA1_Channel4, DISABLE);
+ DMA_Cmd(DMA1_Channel5, DISABLE);
+// DMA_SetCurrDataCounter(DMA1_Channel4, 2);
+ DMA_SetCurrDataCounter(DMA1_Channel5, 2);
+
+ // Chip Select Low
+// GPIO_WriteBit(GPIOB, GPIO_Pin_12, RESET);
+ CB_GPIO_Out_Lo(UC_CS); // spi nCS -> idle Hi
+
+// DMA_Cmd(DMA1_Channel4, ENABLE);
+ DMA_Cmd(DMA1_Channel5, ENABLE);
+}
diff --git a/firmware/src/spi2.h b/firmware/src/spi2.h
new file mode 100644
index 0000000..4d6b827
--- /dev/null
+++ b/firmware/src/spi2.h
@@ -0,0 +1,17 @@
+/**
+ ********************************************************
+ *
+ * SPI2 (headers)
+ *
+ ********************************************************
+ */
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x.h"
+
+
+
+void init_SPI2(void);
+
+void spi_dma_shovel(void);
\ No newline at end of file
diff --git a/firmware/src/stm32f10x_conf.h b/firmware/src/stm32f10x_conf.h
index 49ccdb2..794ff05 100644
--- a/firmware/src/stm32f10x_conf.h
+++ b/firmware/src/stm32f10x_conf.h
@@ -12,7 +12,7 @@
#include "stm32f10x_flash.h"
/* #include "stm32f10x_fsmc.h" */
#include "stm32f10x_gpio.h"
- #include "stm32f10x_i2c.h"
+// #include "stm32f10x_i2c.h"
/* #include "stm32f10x_iwdg.h" */
/* #include "stm32f10x_pwr.h" */
#include "stm32f10x_rcc.h"
diff --git a/firmware/src/usart1.c b/firmware/src/usart1.c
index ba47a61..e26dcca 100644
--- a/firmware/src/usart1.c
+++ b/firmware/src/usart1.c
@@ -7,6 +7,7 @@
*/
#include "usart1.h"
+#include "stm32f10x_conf.h"
void init_USART1(void) {
/* structure contains data for USART configuration */
diff --git a/firmware/src/usart1.h b/firmware/src/usart1.h
index f07b70b..6166cba 100644
--- a/firmware/src/usart1.h
+++ b/firmware/src/usart1.h
@@ -8,7 +8,8 @@
/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x_conf.h"
+
+#include "stm32f10x.h"
void init_USART1(void);
--
2.43.0