From 6a65b046ae7aabe3c21f0587cd2c221c520e2ab3 Mon Sep 17 00:00:00 2001 From: Cahit Date: Fri, 17 Apr 2015 11:08:26 +0200 Subject: [PATCH] updated project file for SFP power read and new tdc repo --- cts/tdc_release | 2 +- cts/trb3_central.prj | 20 ++++++++++++-------- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/cts/tdc_release b/cts/tdc_release index bc38bfc..b10de14 120000 --- a/cts/tdc_release +++ b/cts/tdc_release @@ -1 +1 @@ -../tdc_releases/tdc_v2.1.2 \ No newline at end of file +../../tdc/releases/tdc_v2.1.2 \ No newline at end of file diff --git a/cts/trb3_central.prj b/cts/trb3_central.prj index 4a98f6b..7b2af1b 100644 --- a/cts/trb3_central.prj +++ b/cts/trb3_central.prj @@ -73,6 +73,7 @@ add_file -vhdl -lib work "config.vhd" add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd" add_file -vhdl -lib work "../../trbnet/trb_net16_hub_func.vhd" add_file -vhdl -lib work "../base/code/clock_switch.vhd" +add_file -vhdl -lib work "../base/code/SFP_DDM.vhd" add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd" add_file -vhdl -lib work "../base/trb3_components.vhd" add_file -vhdl -lib work "../base/code/mbs_vulom_recv.vhd" @@ -288,23 +289,26 @@ if {$INCLUDE_TDC == 1} { add_file -vhdl -lib "work" "tdc_release/Channel.vhd" add_file -vhdl -lib "work" "tdc_release/Encoder_304_Bit.vhd" add_file -vhdl -lib "work" "tdc_release/fallingEdgeDetect.vhd" - add_file -vhdl -lib "work" "tdc_release/FIFO_36x128_OutReg_Counter.vhd" add_file -vhdl -lib "work" "tdc_release/hit_mux.vhd" add_file -vhdl -lib "work" "tdc_release/LogicAnalyser.vhd" add_file -vhdl -lib "work" "tdc_release/Readout.vhd" add_file -vhdl -lib "work" "tdc_release/risingEdgeDetect.vhd" - add_file -vhdl -lib "work" "tdc_release/ROM_encoder_3.vhd" + add_file -vhdl -lib "work" "tdc_release/ROM_encoder_ecp3.vhd" add_file -vhdl -lib "work" "tdc_release/ShiftRegisterSISO.vhd" + add_file -vhdl -lib "work" "tdc_release/Stretcher_A.vhd" + add_file -vhdl -lib "work" "tdc_release/Stretcher_B.vhd" + add_file -vhdl -lib "work" "tdc_release/Stretcher.vhd" add_file -vhdl -lib "work" "tdc_release/TDC.vhd" add_file -vhdl -lib "work" "tdc_release/TriggerHandler.vhd" add_file -vhdl -lib "work" "tdc_release/up_counter.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_DC_36x128_OutReg.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_DC_36x64_OutReg.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_DC_36x32_OutReg.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_36x128_OutReg.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_36x64_OutReg.vhd" - add_file -vhdl -lib "work" "../base/cores/FIFO_36x32_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x128_DynThr_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_36x128_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_36x64_OutReg.vhd" + add_file -vhdl -lib "work" "../../tdc/base/cores/ecp3/FIFO/FIFO_36x32_OutReg.vhd" } add_file -vhdl -lib work "./cbmnet_bridge/cbmnet_interface_pkg.vhd" -- 2.43.0