From 7545393d1981d741853ee83a87345ad9653a9076 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Fri, 4 Sep 2009 14:49:40 +0000 Subject: [PATCH] *** empty log message *** --- etrax_interface.vhd | 4 +++- .../trb_net16_med_ecp_sfp_4_gbe.vhd | 3 +++ special/spi_databus_memory.vhd | 19 ------------------- trb_net16_hub_base.vhd | 18 ++++++++++++++++-- trb_net16_hub_func.vhd | 2 ++ trb_net16_hub_ipu_logic.vhd | 3 +++ trb_net16_hub_logic.vhd | 3 +++ 7 files changed, 30 insertions(+), 22 deletions(-) diff --git a/etrax_interface.vhd b/etrax_interface.vhd index e54f9e0..097c89b 100644 --- a/etrax_interface.vhd +++ b/etrax_interface.vhd @@ -291,7 +291,9 @@ begin saved_data_fpga <= INTERNAL_DATA_IN; end if; elsif write_cycle = '1' and ETRAX_RW_STATE_currentstate = WAIT_FOR_DATA then - buf_FPGA_REGISTER_OUT((ctrl_num+1)*32-1 downto (ctrl_num)*32) <= saved_data; + if saved_address(15 downto 4) = x"001" then + buf_FPGA_REGISTER_OUT((ctrl_num+1)*32-1 downto (ctrl_num)*32) <= saved_data; + end if; end if; -- when others => -- saved_data_fpga <= x"deadface"; diff --git a/media_interfaces/trb_net16_med_ecp_sfp_4_gbe.vhd b/media_interfaces/trb_net16_med_ecp_sfp_4_gbe.vhd index e8a9395..828a4c2 100755 --- a/media_interfaces/trb_net16_med_ecp_sfp_4_gbe.vhd +++ b/media_interfaces/trb_net16_med_ecp_sfp_4_gbe.vhd @@ -273,7 +273,10 @@ component serdes_gbe_all is signal led_counter : std_logic_vector(16 downto 0); signal rx_led, tx_led : std_logic_vector(3 downto 0); attribute syn_keep : boolean; + attribute syn_preserve : boolean; attribute syn_keep of led_counter : signal is true; + attribute syn_keep of reset_i : signal is true; + attribute syn_preserve of reset_i : signal is true; signal reset_word_cnt : std_logic_vector(19 downto 0); diff --git a/special/spi_databus_memory.vhd b/special/spi_databus_memory.vhd index 8b36a77..0debd28 100644 --- a/special/spi_databus_memory.vhd +++ b/special/spi_databus_memory.vhd @@ -30,25 +30,6 @@ end entity; architecture Behavioral of spi_databus_memory is --- Components - component spi_dpram is - port( - DATAINA : in std_logic_vector(31 downto 0); - DATAINB : in std_logic_vector(7 downto 0); - ADDRESSA : in std_logic_vector(5 downto 0); - ADDRESSB : in std_logic_vector(7 downto 0); - CLOCKA : in std_logic; - CLOCKB : in std_logic; - CLOCKENA : in std_logic; - CLOCKENB : in std_logic; - WRA : in std_logic; - WRB : in std_logic; - RESETA : in std_logic; - RESETB : in std_logic; - QA : out std_logic_vector(31 downto 0); - QB : out std_logic_vector(7 downto 0) - ); - end component; -- Signals type STATES is (SLEEP,RD_RDY,WR_RDY,RD_ACK,WR_ACK,DONE); diff --git a/trb_net16_hub_base.vhd b/trb_net16_hub_base.vhd index df09d26..7da8692 100644 --- a/trb_net16_hub_base.vhd +++ b/trb_net16_hub_base.vhd @@ -161,6 +161,9 @@ architecture trb_net16_hub_base_arch of trb_net16_hub_base is signal buf_MED_PACKET_NUM_OUT : std_logic_vector(MII_NUMBER*c_NUM_WIDTH-1 downto 0); signal buf_MED_DATA_OUT : std_logic_vector (MII_NUMBER*c_DATA_WIDTH-1 downto 0); + signal HUB_locked : std_logic_vector (2**(c_MUX_WIDTH-1)-1 downto 0); + + signal HC_DATA_IN : std_logic_vector (c_DATA_WIDTH-1 downto 0); signal HC_PACKET_NUM_IN : std_logic_vector (c_NUM_WIDTH-1 downto 0); signal HC_DATAREADY_IN : std_logic; @@ -675,6 +678,7 @@ MED_DATA_OUT <= buf_MED_DATA_OUT; REPLY_PACKET_NUM_OUT => HUB_REPLY_PACKET_NUM_OUT(next_point_num*c_NUM_WIDTH-1 downto first_point_num*c_NUM_WIDTH), REPLY_READ_IN => HUB_REPLY_READ_IN(next_point_num-1 downto first_point_num), STAT => buf_HUB_STAT_CHANNEL((i+1)*16-1 downto i*16), + STAT_locked => HUB_locked(i), STAT_POINTS_locked => buf_STAT_POINTS_locked((i+1)*32-1 downto i*32), STAT_ERRORBITS => open, --HUB_STAT_ERRORBITS(i+1)*32-1 downto i*32), CTRL_activepoints => HUB_CTRL_final_activepoints((i+1)*32-1 downto i*32) @@ -708,6 +712,7 @@ MED_DATA_OUT <= buf_MED_DATA_OUT; REPLY_READ_IN => HUB_REPLY_READ_IN(next_point_num-1 downto first_point_num), MY_ADDRESS_IN => HUB_ADDRESS, STAT_DEBUG => HUBLOGIC_IPU_STAT_DEBUG(31 downto 0), + STAT_locked => HUB_locked(i), STAT_POINTS_locked => buf_STAT_POINTS_locked((i+1)*32-1 downto i*32), STAT_ERRORBITS => open, --HUB_STAT_ERRORBITS(i+1)*32-1 downto i*32), STAT_FSM => stat_ipu_fsm, @@ -718,6 +723,7 @@ MED_DATA_OUT <= buf_MED_DATA_OUT; gen_select_no_logic : if i = 2 generate buf_STAT_POINTS_locked((i+1)*32-1 downto i*32) <= (others => '0'); buf_HUB_STAT_CHANNEL((i+1)*16-1 downto i*16) <= (others => '0'); + HUB_locked(i) <= '0'; HUB_CTRL_final_activepoints((i+1)*32-1 downto i*32) <= (others => '0'); HUB_REPLY_PACKET_NUM_OUT(next_point_num*c_NUM_WIDTH-1 downto first_point_num*c_NUM_WIDTH) <= (others => '0'); HUB_REPLY_DATA_OUT(next_point_num*c_DATA_WIDTH-1 downto first_point_num*c_DATA_WIDTH) <= (others => '0'); @@ -925,10 +931,18 @@ HUB_MED_CONNECTED(31 downto MII_NUMBER) <= (others => '1'); end process; --Control Registers - HUB_CTRL_activepoints <= HC_CTRL_REGS(2**2*32-1 downto 0); HUB_CTRL_media_interfaces_off <= HC_CTRL_REGS(2**2*32+31 downto 2**2*32); - + PROC_active_points : process (CLK) + begin + if rising_edge(CLK) then + for i in 0 to 2**(c_MUX_WIDTH-1)-1 loop + if HUB_locked(i) = '0' then + HUB_CTRL_activepoints(i*32+31 downto i*32) <= HC_CTRL_REGS(i*32+31 downto i*32); + end if; + end loop; + end if; + end process; --------------------------------------------------------------------- diff --git a/trb_net16_hub_func.vhd b/trb_net16_hub_func.vhd index e50c589..5357230 100644 --- a/trb_net16_hub_func.vhd +++ b/trb_net16_hub_func.vhd @@ -302,6 +302,7 @@ component trb_net16_hub_streaming_port is MY_ADDRESS_IN : in std_logic_vector (15 downto 0); --Status ports STAT_DEBUG : out std_logic_vector (31 downto 0); + STAT_locked : out std_logic; STAT_POINTS_locked : out std_logic_vector (31 downto 0); STAT_ERRORBITS : out std_logic_vector (31 downto 0); STAT_FSM : out std_logic_vector (15 downto 0); @@ -337,6 +338,7 @@ component trb_net16_hub_streaming_port is REPLY_PACKET_NUM_OUT : out std_logic_vector (c_NUM_WIDTH*POINT_NUMBER-1 downto 0); REPLY_READ_IN : in std_logic_vector (POINT_NUMBER-1 downto 0); STAT : out std_logic_vector (15 downto 0); + STAT_locked : out std_logic; STAT_POINTS_locked : out std_logic_vector (31 downto 0); STAT_ERRORBITS : out std_logic_vector (31 downto 0); CTRL_activepoints : in std_logic_vector (31 downto 0) diff --git a/trb_net16_hub_ipu_logic.vhd b/trb_net16_hub_ipu_logic.vhd index 4fc4bcc..63c1250 100644 --- a/trb_net16_hub_ipu_logic.vhd +++ b/trb_net16_hub_ipu_logic.vhd @@ -41,6 +41,7 @@ entity trb_net16_hub_ipu_logic is MY_ADDRESS_IN : in std_logic_vector (15 downto 0); --Status ports STAT_DEBUG : out std_logic_vector (31 downto 0); + STAT_locked : out std_logic; STAT_POINTS_locked : out std_logic_vector (31 downto 0); STAT_ERRORBITS : out std_logic_vector (31 downto 0); STAT_FSM : out std_logic_vector (15 downto 0); @@ -1249,5 +1250,7 @@ begin STAT_FSM(12 downto 10)<= packet_counter; STAT_FSM(15 downto 13)<= dhdr_addr; + STAT_locked <= locked; + end architecture; diff --git a/trb_net16_hub_logic.vhd b/trb_net16_hub_logic.vhd index 2487703..223b740 100644 --- a/trb_net16_hub_logic.vhd +++ b/trb_net16_hub_logic.vhd @@ -37,6 +37,7 @@ entity trb_net16_hub_logic is REPLY_READ_IN : in std_logic_vector (POINT_NUMBER-1 downto 0); --Status ports (for debugging) STAT : out std_logic_vector (15 downto 0); + STAT_locked : out std_logic; STAT_POINTS_locked : out std_logic_vector (31 downto 0); STAT_ERRORBITS : out std_logic_vector (31 downto 0); CTRL_activepoints : in std_logic_vector (31 downto 0) := (others => '1') @@ -704,6 +705,8 @@ begin SYN_READ_IN => REPLY_POOL_READ ); +STAT_locked <= locked; + ---------------------------------- --Debugging ---------------------------------- -- 2.43.0