From 75a6e785188cd50c9c00e961d6fa5aeecc020fe8 Mon Sep 17 00:00:00 2001 From: Cahit Date: Fri, 25 Oct 2013 12:09:05 +0200 Subject: [PATCH] typo corrections --- 2013-twepp-neiser-trb3_applications/twepp2013-neiser-trb3.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/2013-twepp-neiser-trb3_applications/twepp2013-neiser-trb3.tex b/2013-twepp-neiser-trb3_applications/twepp2013-neiser-trb3.tex index c8c0b4a..31820c7 100644 --- a/2013-twepp-neiser-trb3_applications/twepp2013-neiser-trb3.tex +++ b/2013-twepp-neiser-trb3_applications/twepp2013-neiser-trb3.tex @@ -300,11 +300,11 @@ The TRB3 can also be used as an infrastructure to read out specialised integrated solutions using the peripheral FPGAs, for example to provide a timing reference, transport the acquired data to the eventbuilder and configuration of the attached ASIC via slow control. This was realised for the -n-XYTER ASIC, which provides the digital timestamp and the analoge pulse height of +n-XYTER ASIC, which provides the digital timestamp and the analogue pulse height of self-triggered $128$ channels. In this case, the integration of the read-out and slow control (e.\,g. trigger windows) on the peripheral FPGA was easily achieved due to the well-documented VHDL interfaces of the TRB3 platform. -The peripheral FPGA also reads out the ADC for the digitization of the pulse +The peripheral FPGA also reads out the ADC for the digitisation of the pulse height information. \section{J\"{u}lich Test Beamtime 2012}\label{sec:juelich} -- 2.43.0