From 7616574f65facbd66017ebc1d39be07a628ba58d Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Thu, 22 May 2014 09:47:42 +0200 Subject: [PATCH] Setting default PORT_MASK_ENABLE as in actual declaration of trb_net16_regio_bus_handler --- trb_net_components.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/trb_net_components.vhd b/trb_net_components.vhd index b9089c9..595d575 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -2652,7 +2652,7 @@ end component; PORT_NUMBER : integer range 1 to c_BUS_HANDLER_MAX_PORTS := 3; PORT_ADDRESSES : c_BUS_HANDLER_ADDR_t := (others => (others => '0')); PORT_ADDR_MASK : c_BUS_HANDLER_WIDTH_t := (others => 0); - PORT_MASK_ENABLE : integer range 0 to 1 + PORT_MASK_ENABLE : integer range 0 to 1 := 0 ); port( CLK : in std_logic; -- 2.43.0