From 77e7dbe9d0a711f10f97c67384ea5295c18ef327 Mon Sep 17 00:00:00 2001 From: Thomas Gessler Date: Tue, 23 Feb 2021 21:09:38 +0100 Subject: [PATCH] XCKU MGTs: Add TXBUFSTATUS port The FIFO half full flag can be used to detect the phase between user clock and XCLK as with the CERN HTPD TX phase aligner: https://gitlab.cern.ch/HPTD/tx_phase_aligner --- media_interfaces/med_xcku_sfp_sync.vhd | 7 +++++-- .../gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci | 6 +++--- .../gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml | 8 ++++---- .../gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci | 6 +++--- .../gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml | 8 ++++---- .../gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci | 6 +++--- .../gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml | 8 ++++---- media_interfaces/xcku/gth_xcku_top.vhd | 10 +++++++++- 8 files changed, 35 insertions(+), 24 deletions(-) diff --git a/media_interfaces/med_xcku_sfp_sync.vhd b/media_interfaces/med_xcku_sfp_sync.vhd index 7210f7a..b34808d 100644 --- a/media_interfaces/med_xcku_sfp_sync.vhd +++ b/media_interfaces/med_xcku_sfp_sync.vhd @@ -78,7 +78,9 @@ entity med_xcku_sfp_sync is TXPIPPMOVRDEN : in std_logic := '0'; TXPIPPMPD : in std_logic := '0'; TXPIPPMSEL : in std_logic := '0'; - TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000" + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + + TXBUFSTATUS : out std_logic_vector(1 downto 0) ); end entity; @@ -199,7 +201,8 @@ begin TXPIPPMOVRDEN => TXPIPPMOVRDEN, TXPIPPMPD => TXPIPPMPD, TXPIPPMSEL => TXPIPPMSEL, - TXPIPPMSTEPSIZE => TXPIPPMSTEPSIZE + TXPIPPMSTEPSIZE => TXPIPPMSTEPSIZE, + TXBUFSTATUS => TXBUFSTATUS ); RXRESETDONE <= rxresetdone_i; diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci index bdea94e..2985865 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_100mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 20 + 21 0 None 8 @@ -1239,7 +1239,7 @@ false true false - false + true false false false diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml index 8013010..6e15473 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:95178624 + 9:1dd46ae3 @@ -13737,7 +13737,7 @@ - false + true @@ -16210,7 +16210,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16323,7 +16323,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 20 + 21 diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci index f1ac1b3..7710d3a 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_200mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 22 + 23 0 None 8 @@ -1239,7 +1239,7 @@ false true false - false + true false false false diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml index c11782c..b615140 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:7831f99d + 9:510310c5 @@ -13737,7 +13737,7 @@ - false + true @@ -16212,7 +16212,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16325,7 +16325,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 22 + 23 diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci index b0ff13c..e4a72e5 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps4_120mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 26 + 27 0 None 9 @@ -1239,7 +1239,7 @@ false true false - false + true false false false diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml index dc29e2d..98bade8 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:851956ec + 9:7418d113 @@ -13737,7 +13737,7 @@ - false + true @@ -16208,7 +16208,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16321,7 +16321,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 26 + 27 diff --git a/media_interfaces/xcku/gth_xcku_top.vhd b/media_interfaces/xcku/gth_xcku_top.vhd index b0e6ab2..8b5078f 100644 --- a/media_interfaces/xcku/gth_xcku_top.vhd +++ b/media_interfaces/xcku/gth_xcku_top.vhd @@ -69,7 +69,9 @@ entity gth_xcku_top is TXPIPPMOVRDEN : in std_logic := '0'; TXPIPPMPD : in std_logic := '0'; TXPIPPMSEL : in std_logic := '0'; - TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000" + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + + TXBUFSTATUS : out std_logic_vector(1 downto 0) ); end entity gth_xcku_top; @@ -143,6 +145,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -218,6 +221,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -293,6 +297,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -483,6 +488,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE @@ -561,6 +567,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE @@ -639,6 +646,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE -- 2.43.0