From 78d85de4c1c44aa48ff4f08a6e7a88742b1691d4 Mon Sep 17 00:00:00 2001 From: hadaq Date: Mon, 5 Apr 2010 20:24:27 +0000 Subject: [PATCH] update of tcp-mode --- libtrbnet/trberror.c | 5 +- libtrbnet/trbnet.c | 218 +++++++++++++++++++++++-------------------- 2 files changed, 118 insertions(+), 105 deletions(-) diff --git a/libtrbnet/trberror.c b/libtrbnet/trberror.c index 2e8bf60..9f61348 100644 --- a/libtrbnet/trberror.c +++ b/libtrbnet/trberror.c @@ -2,6 +2,7 @@ #include #include +#include "trbnet.h" #include "trberror.h" /* Error Handling */ @@ -13,14 +14,14 @@ TRB_TERM trb_term = {0, 0, 0, 0}; void trb_error(const char *s) { if (s != NULL) { - fprintf(stderr, "%s: %s\n", s, trb_strerror(trb_errno)); + fprintf(trb_stderr, "%s: %s\n", s, trb_strerror(trb_errno)); } else { fprintf(stderr, "%s\n", trb_strerror(trb_errno)); } /* Print Statusbits */ if (trb_errno == TRB_STATUS_ERROR) { - fprintf(stderr, "%s\n", trb_strterm(trb_term)); + fprintf(trb_stderr, "%s\n", trb_strterm(trb_term)); } } diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c index a4a37dc..65f323f 100644 --- a/libtrbnet/trbnet.c +++ b/libtrbnet/trbnet.c @@ -1,6 +1,5 @@ -const char trbnet_version[] = "$Revision: 2.57 $"; +const char trbnet_version[] = "$Revision: 2.58 $"; -#include #include #include #include @@ -145,6 +144,7 @@ static const key_t sem_key = 0x545242; unsigned int trb_debug = 0; unsigned int trb_lazy = 0; unsigned int trb_dma = 0; +FILE* trb_stderr = NULL; /* Declaration of a TRB-Package */ @@ -285,101 +285,101 @@ static void TRB_Package_dump(const TRB_Package* pkg) { switch ((pkg->H0 & MASK_HEADER_TYPE) >> SHIFT_HEADER_TYPE) { case HEADER_DAT: - fprintf(stderr, "H0: 0x%04x --> DATA channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> DATA channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> data0\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> data1\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> data2\n", pkg->F2); - fprintf(stderr, "F3: 0x%04x --> data3\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> data0\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> data1\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> data2\n", pkg->F2); + fprintf(trb_stderr, "F3: 0x%04x --> data3\n", pkg->F3); break; case HEADER_HDR: - fprintf(stderr, "H0: 0x%04x --> HEADER channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> HEADER channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> source address\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> target address\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> length\n", pkg->F2); - fprintf(stderr, "F3: 0x%04x --> sequence: 0x%02x datatype: 0x%01x\n", + fprintf(trb_stderr, "F0: 0x%04x --> source address\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> target address\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> length\n", pkg->F2); + fprintf(trb_stderr, "F3: 0x%04x --> sequence: 0x%02x datatype: 0x%01x\n", pkg->F3, (pkg->F3 & MASK_SEQNR) >> SHIFT_SEQNR, (pkg->F3 & MASK_DATATYPE) >> SHIFT_DATATYPE); break; case HEADER_EOB: - fprintf(stderr, "H0: 0x%04x --> EOB channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> EOB channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> checksum\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> reseved\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> data count\n", pkg->F2); - fprintf(stderr, "F3: 0x%04x --> buffer number\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> checksum\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> reseved\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> data count\n", pkg->F2); + fprintf(trb_stderr, "F3: 0x%04x --> buffer number\n", pkg->F3); break; case HEADER_TRM: - fprintf(stderr, "H0: 0x%04x --> TERM channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> TERM channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> checksum\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> statusbits channel\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> statusbits common\n", pkg->F2); - fprintf(stderr, "F3: 0x%04x --> sequence: 0x%02x datatype: 0x%01x\n", + fprintf(trb_stderr, "F0: 0x%04x --> checksum\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> statusbits channel\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> statusbits common\n", pkg->F2); + fprintf(trb_stderr, "F3: 0x%04x --> sequence: 0x%02x datatype: 0x%01x\n", pkg->F3, (pkg->F3 & MASK_SEQNR) >> SHIFT_SEQNR, (pkg->F3 & MASK_DATATYPE) >> SHIFT_DATATYPE); break; case HEADER_EXT: - fprintf(stderr, "H0: 0x%04x --> EXT channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> EXT channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> reserved\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> reserved\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> reserved\n", pkg->F2); - fprintf(stderr, "F2: 0x%04x --> reserved\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> reserved\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> reserved\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> reserved\n", pkg->F2); + fprintf(trb_stderr, "F2: 0x%04x --> reserved\n", pkg->F3); break; case HEADER_ACK: - fprintf(stderr, "H0: 0x%04x --> ACK channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> ACK channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> reserved\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> lenght of buffer\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> reserved\n", pkg->F2); - fprintf(stderr, "F2: 0x%04x --> buffer number\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> reserved\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> lenght of buffer\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> reserved\n", pkg->F2); + fprintf(trb_stderr, "F2: 0x%04x --> buffer number\n", pkg->F3); break; case HEADER_SIG: - fprintf(stderr, "H0: 0x%04x --> SIGNAL channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> SIGNAL channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> reserved\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> reserved\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> reserved\n", pkg->F2); - fprintf(stderr, "F2: 0x%04x --> reserved\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> reserved\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> reserved\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> reserved\n", pkg->F2); + fprintf(trb_stderr, "F2: 0x%04x --> reserved\n", pkg->F3); break; case HEADER_ILL: - fprintf(stderr, "H0: 0x%04x --> ILLEGAL channel: %01d reply: %01d\n", + fprintf(trb_stderr, "H0: 0x%04x --> ILLEGAL channel: %01d reply: %01d\n", pkg->H0, (pkg->H0 & MASK_HEADER_CHANNEL) >> SHIFT_HEADER_CHANNEL, (pkg->H0 & MASK_HEADER_REPLY) >> SHIFT_HEADER_REPLY); - fprintf(stderr, "F0: 0x%04x --> ignore\n", pkg->F0); - fprintf(stderr, "F1: 0x%04x --> ignore\n", pkg->F1); - fprintf(stderr, "F2: 0x%04x --> ignore\n", pkg->F2); - fprintf(stderr, "F2: 0x%04x --> ignore\n", pkg->F3); + fprintf(trb_stderr, "F0: 0x%04x --> ignore\n", pkg->F0); + fprintf(trb_stderr, "F1: 0x%04x --> ignore\n", pkg->F1); + fprintf(trb_stderr, "F2: 0x%04x --> ignore\n", pkg->F2); + fprintf(trb_stderr, "F2: 0x%04x --> ignore\n", pkg->F3); break; default: - fprintf(stderr, "INVALID\n"); + fprintf(trb_stderr, "INVALID\n"); } } @@ -394,7 +394,7 @@ static void fifo_flush(uint8_t channel) read32_from_FPGA(fifoAddress, &tmp); /* DEBUG INFO */ if ((trb_debug > 1) && ((tmp & MASK_FIFO_VALID) != 0)) { - fprintf(stderr, "FLUSH_FIFO_%03d: 0x%08x\n", counter, tmp); + fprintf(trb_stderr, "FLUSH_FIFO_%03d: 0x%08x\n", counter, tmp); counter++; } } while ((tmp & MASK_FIFO_VALID) != 0); @@ -518,7 +518,7 @@ static int trb_fifo_read(uint8_t channel, if ((counter % 5) == 0) { /* New Package begins */ if (trb_debug > 0) { - fprintf(stderr, + fprintf(trb_stderr, "-------------------------------------------------\n"); } packageCtr++; @@ -526,7 +526,7 @@ static int trb_fifo_read(uint8_t channel, /* DEBUG INFO */ if (trb_debug > 1) { - fprintf(stderr, "FIFO_%03d: 0x%08x\n", + fprintf(trb_stderr, "FIFO_%03d: 0x%08x\n", fifoDebugCtr, *tmp); } } else { @@ -534,7 +534,7 @@ static int trb_fifo_read(uint8_t channel, /* DEBUG INFO */ if (trb_debug > 1) { - fprintf(stderr, "FIFO_%03d: 0x%08x\n", + fprintf(trb_stderr, "FIFO_%03d: 0x%08x\n", fifoDebugCtr, *tmp); } @@ -547,7 +547,7 @@ static int trb_fifo_read(uint8_t channel, /* DEBUG INFO */ if (trb_debug > 1) { - fprintf(stderr, "FIFO_%03d: 0x%08x\n", + fprintf(trb_stderr, "FIFO_%03d: 0x%08x\n", fifoDebugCtr, *tmp); } @@ -592,7 +592,7 @@ static int trb_fifo_read(uint8_t channel, /* DEBUG INFO */ if (trb_debug > 0) { TRB_Package_dump(&package); - fprintf(stderr, "-------------------------------------------------\n"); + fprintf(trb_stderr, "-------------------------------------------------\n"); } if (trb_lazy == 0) { @@ -975,6 +975,9 @@ int init_ports() int memfd; uint32_t *mem = NULL; + /* set default stderr */ + trb_stderr = stderr; + /* Set signal mask for blocking */ sigemptyset(&blockSet); sigaddset(&blockSet, SIGINT); @@ -1054,7 +1057,7 @@ int init_ports() clrbitsPC(0x30000); if (unlockPorts() == -1) return -1; - + return 0; } @@ -1076,7 +1079,7 @@ int trb_fifo_flush(uint8_t channel) /* DEBUG INFO */ if (trb_debug > 1) { - fprintf(stderr, "Flushing FIFO of channel# %d\n", channel); + fprintf(trb_stderr, "Flushing FIFO of channel# %d\n", channel); } if (lockPorts() == -1) return -1; @@ -1107,7 +1110,7 @@ int trb_register_read(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Build up package and start transfer */ @@ -1121,7 +1124,7 @@ int trb_register_read(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_REGISTER_READ started.\n"); + fprintf(trb_stderr, "CMD_REGISTER_READ started.\n"); } status = trb_fifo_read(3, FIFO_MODE_REG_READ, data, dsize); @@ -1168,7 +1171,7 @@ int trb_register_read_mem(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Tranfer done.\n"); + fprintf(trb_stderr, "Init_Tranfer done.\n"); } /* Build up package and start transfer */ @@ -1182,7 +1185,7 @@ int trb_register_read_mem(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_REGISTER_READ_MEM started.\n"); + fprintf(trb_stderr, "CMD_REGISTER_READ_MEM started.\n"); } status = trb_fifo_read(3, FIFO_MODE_REG_READ_MEM, data, dsize); @@ -1225,7 +1228,7 @@ int trb_register_write(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Build up package */ @@ -1239,7 +1242,7 @@ int trb_register_write(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_REGISTER_WRITE started.\n"); + fprintf(trb_stderr, "CMD_REGISTER_WRITE started.\n"); } status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0); @@ -1255,9 +1258,11 @@ int trb_register_write_mem(uint16_t trb_address, const uint32_t *data, uint16_t size) { + static const uint16_t blockSize = 128; uint16_t config; uint16_t i; - int status; + uint16_t ctr = 0; + int status = -1; trb_errno = TRB_NONE; @@ -1270,40 +1275,47 @@ int trb_register_write_mem(uint16_t trb_address, config = config | (option == 0 ? 0x8000 : 0x0000); if (lockPorts() == -1) return -1; - - /* Init transfer */ - if (trb_init_transfer(3) == -1) { - unlockPorts(); - return -1; - } - - /* DEBUG INFO */ - if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); - } - - /* Build up package */ - write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address); - write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, reg_address); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, config); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); - for (i = 0; i < size; i++) { + + while (ctr < size) { + uint16_t len = (size - ctr) >= blockSize ? blockSize : (size - ctr); + /* Init transfer */ + if (trb_init_transfer(3) == -1) { + unlockPorts(); + return -1; + } + + /* DEBUG INFO */ + if (trb_debug > 0) { + fprintf(trb_stderr, "Init_Transfer done.\n"); + } + + /* Build up package */ + write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address); + write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000); + if (option == 0) { + write32_to_FPGA(CHANNEL_3_SENDER_DATA, reg_address + ctr); + } else { + write32_to_FPGA(CHANNEL_3_SENDER_DATA, reg_address); + } + write32_to_FPGA(CHANNEL_3_SENDER_DATA, config); write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, (data[i] >> 16) & 0xffff); - write32_to_FPGA(CHANNEL_3_SENDER_DATA, data[i] & 0xffff); write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); + for (i = 0; i < len; i++, ctr++) { + write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); + write32_to_FPGA(CHANNEL_3_SENDER_DATA, (data[ctr] >> 16) & 0xffff); + write32_to_FPGA(CHANNEL_3_SENDER_DATA, data[ctr] & 0xffff); + write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000); + } + write32_to_FPGA(CHANNEL_3_SENDER_CONTROL, CMD_REGISTER_WRITE_MEM); + + /* DEBUG INFO */ + if (trb_debug > 0) { + fprintf(trb_stderr, "CMD_REGISTER_WRITE_MEM started %d.\n", len); + } + + status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0); } - write32_to_FPGA(CHANNEL_3_SENDER_CONTROL, CMD_REGISTER_WRITE_MEM); - - /* DEBUG INFO */ - if (trb_debug > 0) { - fprintf(stderr, "CMD_REGISTER_WRITE_MEM started.\n"); - } - - status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0); - + if (unlockPorts() == -1) return -1; return status; @@ -1327,7 +1339,7 @@ int trb_read_uid(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Build up package and start transfer */ @@ -1341,7 +1353,7 @@ int trb_read_uid(uint16_t trb_address, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_READ_UNIQUE_ID started.\n"); + fprintf(trb_stderr, "CMD_READ_UNIQUE_ID started.\n"); } status = trb_fifo_read(3, FIFO_MODE_UID, (uint32_t*)data, dsize); @@ -1381,7 +1393,7 @@ int trb_set_address(uint64_t uid, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Build up package and start transfer */ @@ -1399,7 +1411,7 @@ int trb_set_address(uint64_t uid, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_SETADDRESS started.\n"); + fprintf(trb_stderr, "CMD_SETADDRESS started.\n"); } status = trb_fifo_read(3, FIFO_MODE_SET_ADDRESS, NULL, 0); @@ -1438,7 +1450,7 @@ int trb_ipu_data_read(uint8_t type, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Prepare IPU channel */ @@ -1451,7 +1463,7 @@ int trb_ipu_data_read(uint8_t type, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "CMD_IPU_DATA_READ started.\n"); + fprintf(trb_stderr, "CMD_IPU_DATA_READ started.\n"); } status = trb_fifo_read(1, FIFO_MODE_IPU_DATA, data, dsize); @@ -1481,7 +1493,7 @@ int trb_send_trigger(uint8_t type, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Prepare trigger channel */ @@ -1499,7 +1511,7 @@ int trb_send_trigger(uint8_t type, SHORT_TRANSFER | (uint32_t)(type & 0x0f)); if (trb_debug > 0) { - fprintf(stderr, "trigger started.\n"); + fprintf(trb_stderr, "trigger started.\n"); } /* Check for replay packets (trigger) */ @@ -1542,7 +1554,7 @@ int trb_send_trigger_rich(uint8_t trg_input, /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "Init_Transfer done.\n"); + fprintf(trb_stderr, "Init_Transfer done.\n"); } /* Prepare trigger channel */ @@ -1568,7 +1580,7 @@ int trb_send_trigger_rich(uint8_t trg_input, SHORT_TRANSFER | (uint32_t)(type & 0x0f)); if (trb_debug > 0) { - fprintf(stderr, "trigger started.\n"); + fprintf(trb_stderr, "trigger started.\n"); } /* Check for replay packets (slowcontrol) */ @@ -1597,7 +1609,7 @@ int fpga_register_read(uint16_t reg_address, uint32_t* value) /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "fpga_register_read started.\n"); + fprintf(trb_stderr, "fpga_register_read started.\n"); } read32_from_FPGA(reg_address, value); @@ -1615,7 +1627,7 @@ int fpga_register_write(uint16_t reg_address, uint32_t value) /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "fpga_register_write started.\n"); + fprintf(trb_stderr, "fpga_register_write started.\n"); } write32_to_FPGA(reg_address, value); @@ -1633,7 +1645,7 @@ int network_reset() /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "network_reset started.\n"); + fprintf(trb_stderr, "network_reset started.\n"); } write32_to_FPGA(0x10, 0x0000); @@ -1653,7 +1665,7 @@ int com_reset() /* DEBUG INFO */ if (trb_debug > 0) { - fprintf(stderr, "com_reset started.\n"); + fprintf(trb_stderr, "com_reset started.\n"); } setbitsPC(0x30000); -- 2.43.0