From 7d352cc6b80bcf6d841f3003403daa76374695fd Mon Sep 17 00:00:00 2001 From: Cahit Date: Mon, 10 Mar 2014 10:44:42 +0100 Subject: [PATCH] trigger logic slow control address correction --- 32PinAddOn/trb3_periph_32PinAddOn.vhd | 2 +- wasa/trb3_periph_padiwa.vhd | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/32PinAddOn/trb3_periph_32PinAddOn.vhd b/32PinAddOn/trb3_periph_32PinAddOn.vhd index fdfc62d..f840caa 100644 --- a/32PinAddOn/trb3_periph_32PinAddOn.vhd +++ b/32PinAddOn/trb3_periph_32PinAddOn.vhd @@ -476,7 +476,7 @@ begin THE_BUS_HANDLER : trb_net16_regio_bus_handler generic map( PORT_NUMBER => 10, - PORT_ADDRESSES => (0 => x"d000", 1 => x"d100", 2 => x"d400", 3 => x"c000", 4 => x"c100", 5 => x"c200", 6 => x"c300", 7 => x"c400", 8 => x"c800", 9 => x"a000", others => x"0000"), + PORT_ADDRESSES => (0 => x"d000", 1 => x"d100", 2 => x"d400", 3 => x"c000", 4 => x"c100", 5 => x"c200", 6 => x"c300", 7 => x"c400", 8 => x"c800", 9 => x"cf00", others => x"0000"), PORT_ADDR_MASK => (0 => 1, 1 => 6, 2 => 5, 3 => 7, 4 => 5, 5 => 7, 6 => 7, 7 => 7, 8 => 3, 9 => 6, others => 0) ) port map( diff --git a/wasa/trb3_periph_padiwa.vhd b/wasa/trb3_periph_padiwa.vhd index c3632d0..501c77b 100644 --- a/wasa/trb3_periph_padiwa.vhd +++ b/wasa/trb3_periph_padiwa.vhd @@ -516,7 +516,7 @@ begin THE_BUS_HANDLER : trb_net16_regio_bus_handler generic map( PORT_NUMBER => 10, - PORT_ADDRESSES => (0 => x"d000", 1 => x"d100", 2 => x"d400", 3 => x"c000", 4 => x"c100", 5 => x"c200", 6 => x"c300", 7 => x"b000", 8 => x"c800", 9 => x"a000", others => x"0000"), + PORT_ADDRESSES => (0 => x"d000", 1 => x"d100", 2 => x"d400", 3 => x"c000", 4 => x"c100", 5 => x"c200", 6 => x"c300", 7 => x"b000", 8 => x"c800", 9 => x"cf00", others => x"0000"), PORT_ADDR_MASK => (0 => 1, 1 => 6, 2 => 5, 3 => 7, 4 => 5, 5 => 7, 6 => 7, 7 => 9, 8 => 3, 9 => 6, others => 0) ) port map( -- 2.43.0