From 7d8c10bd9998607d3d67b8a6a8a3cd20a30cc48d Mon Sep 17 00:00:00 2001 From: Michael Boehmer Date: Fri, 21 Oct 2022 19:57:16 +0200 Subject: [PATCH] GbE AN hopefully fied now --- gbe_trb/base/gbe_lsm.vhd | 109 ++++++++++++++++------------ gbe_trb_ecp3/media/gbe_med_fifo.vhd | 49 +++++++------ 2 files changed, 90 insertions(+), 68 deletions(-) diff --git a/gbe_trb/base/gbe_lsm.vhd b/gbe_trb/base/gbe_lsm.vhd index 81ab5d5..b91c0a8 100644 --- a/gbe_trb/base/gbe_lsm.vhd +++ b/gbe_trb/base/gbe_lsm.vhd @@ -9,10 +9,12 @@ entity gbe_lsm is CLK : in std_logic; RESET : in std_logic; -- - MAC_AN_COMPLETE_IN : in std_logic; -- PCS Autonegotiation completed + SERDES_ACTIVE_IN : in std_logic; -- SerDes Tx / Rx channels operational + AN_COMPLETE_IN : in std_logic; -- Link AN completed MAC_READY_CONF_IN : in std_logic; -- MAC configuration completed - MAC_RECONF_OUT : out std_logic; -- start MAC configuration -- + AN_RESTART_OUT : out std_logic; + MAC_RECONF_OUT : out std_logic; LINK_ACTIVE_OUT : out std_logic; -- DEBUG : out std_logic_vector(15 downto 0) @@ -24,36 +26,35 @@ architecture gbe_lsm_arch of gbe_lsm is -- Components -- state machine signals - type state_t is (INACTIVE,WAIT_PCS,ENABLE_MAC,DELAY,ACTIVATED); + type state_t is (INACTIVE,AN_WAIT,AN_RESTART,ENABLE_MAC,ACTIVATED); signal STATE, NEXT_STATE : state_t; -- Signals - signal dly_ctr : unsigned(15 downto 0); - signal ce_dly_ctr : std_logic; - signal rst_dly_ctr : std_logic; - signal dly_ctr_done : std_logic; - signal reconf_mac : std_logic; + signal dly_ctr : unsigned(24 downto 0); + signal dly_ctr_done : std_logic; + signal dly_ctr_rst_x : std_logic; + signal dly_ctr_rst : std_logic; + signal reconf_mac_x : std_logic; + signal reconf_mac : std_logic; + signal restart_an_x : std_logic; + signal restart_an : std_logic; begin - - MAC_RECONF_OUT <= reconf_mac; - - LINK_ACTIVE_OUT <= '1' when (STATE = ACTIVATED) else '0'; - - THE_DLY_CTR: process( CLK ) + + THE_DLY_CTR: process( CLK, RESET ) begin if ( RESET = '1' ) then dly_ctr <= (others => '0'); elsif( rising_edge(CLK) ) then - if( rst_dly_ctr = '1' ) then + if( (dly_ctr_done = '1') or (dly_ctr_rst = '1') ) then dly_ctr <= (others => '0'); - elsif( ce_dly_ctr = '1' ) then + else dly_ctr <= dly_ctr + 1; end if; end if; end process THE_DLY_CTR; - dly_ctr_done <= '1' when dly_ctr = x"ffff" else '0'; + dly_ctr_done <= dly_ctr(dly_ctr'left); ----------------------------------------------------------- -- statemachine: clocked process @@ -62,67 +63,77 @@ begin begin if ( RESET = '1' ) then STATE <= INACTIVE; + restart_an <= '0'; + reconf_mac <= '0'; + dly_ctr_rst <= '1'; elsif( rising_edge(CLK) ) then STATE <= NEXT_STATE; + restart_an <= restart_an_x; + reconf_mac <= reconf_mac_x; + dly_ctr_rst <= dly_ctr_rst_x; end if; end process THE_FSM; - THE_STATE_TRANSITIONS: process( STATE, MAC_AN_COMPLETE_IN, MAC_READY_CONF_IN, dly_ctr_done ) + THE_STATE_TRANSITIONS: process( STATE, SERDES_ACTIVE_IN, AN_COMPLETE_IN, MAC_READY_CONF_IN, dly_ctr_done ) begin - reconf_mac <= '0'; - ce_dly_ctr <= '0'; - rst_dly_ctr <= '0'; + restart_an_x <= '0'; + reconf_mac_x <= '0'; + dly_ctr_rst_x <= '1'; case STATE is when INACTIVE => - rst_dly_ctr <= '1'; - if( MAC_AN_COMPLETE_IN = '1' ) then - NEXT_STATE <= WAIT_PCS; + if( SERDES_ACTIVE_IN = '1' ) then + -- wait for SerDes Tx/Rx to be active + NEXT_STATE <= AN_RESTART; + restart_an_x <= '1'; else NEXT_STATE <= INACTIVE; end if; - when WAIT_PCS => - ce_dly_ctr <= '1'; - if( MAC_AN_COMPLETE_IN = '0' ) then + when AN_RESTART => + if ( SERDES_ACTIVE_IN = '0' ) then + -- SerDes broken NEXT_STATE <= INACTIVE; else - if( dly_ctr_done = '1' ) then - NEXT_STATE <= ENABLE_MAC; - reconf_mac <= '1'; - else - NEXT_STATE <= WAIT_PCS; - end if; + NEXT_STATE <= AN_WAIT; end if; - when ENABLE_MAC => - rst_dly_ctr <= '1'; - if( MAC_AN_COMPLETE_IN = '0' ) then + when AN_WAIT => + if ( SERDES_ACTIVE_IN = '0' ) then + -- SerDes broken NEXT_STATE <= INACTIVE; else - if( MAC_READY_CONF_IN = '1' ) then - NEXT_STATE <= DELAY; - else + dly_ctr_rst_x <= '0'; + if( AN_COMPLETE_IN = '1' ) then + -- AN completed NEXT_STATE <= ENABLE_MAC; + reconf_mac_x <= '1'; + elsif( dly_ctr_done = '1' ) then + -- no AN within delay + NEXT_STATE <= AN_RESTART; + restart_an_x <= '1'; + else + NEXT_STATE <= AN_WAIT; end if; end if; - when DELAY => - ce_dly_ctr <= '1'; - if( MAC_AN_COMPLETE_IN = '0' ) then + when ENABLE_MAC => + if ( SERDES_ACTIVE_IN = '0' ) then + -- SerDes broken NEXT_STATE <= INACTIVE; else - if( dly_ctr_done = '1' ) then + if( MAC_READY_CONF_IN = '1' ) then NEXT_STATE <= ACTIVATED; else - NEXT_STATE <= DELAY; + NEXT_STATE <= ENABLE_MAC; + reconf_mac_x <= '1'; end if; end if; - + when ACTIVATED => - rst_dly_ctr <= '1'; - if( MAC_AN_COMPLETE_IN = '0' ) then + if ( SERDES_ACTIVE_IN = '0' ) then + -- SerDes broken NEXT_STATE <= INACTIVE; else NEXT_STATE <= ACTIVATED; @@ -133,4 +144,8 @@ begin end case; end process THE_STATE_TRANSITIONS; + AN_RESTART_OUT <= restart_an; + MAC_RECONF_OUT <= reconf_mac; + LINK_ACTIVE_OUT <= '1' when (STATE = ACTIVATED) else '0'; + end architecture; diff --git a/gbe_trb_ecp3/media/gbe_med_fifo.vhd b/gbe_trb_ecp3/media/gbe_med_fifo.vhd index 2b78765..1d28e09 100644 --- a/gbe_trb_ecp3/media/gbe_med_fifo.vhd +++ b/gbe_trb_ecp3/media/gbe_med_fifo.vhd @@ -294,8 +294,9 @@ architecture gbe_med_fifo_arch of gbe_med_fifo is signal main_rx_state : std_logic_vector(15 downto 0); signal mr_page_rx_i : std_logic_vector(3 downto 0); --- signal rst_n_sgmii_i : std_logic_vector(3 downto 0); - + signal an_restart_i : std_logic_vector(3 downto 0); + signal mr_an_complete_i : std_logic_vector(3 downto 0); + begin -- constants used as reminder @@ -576,10 +577,10 @@ begin DEBUG_OUT((i + 1) * 32 - 13) <= '0'; DEBUG_OUT((i + 1) * 32 - 14) <= '0'; DEBUG_OUT((i + 1) * 32 - 15) <= '0'; - DEBUG_OUT((i + 1) * 32 - 16) <= '0'; - DEBUG_OUT((i + 1) * 32 - 17) <= '0'; -- (15) - DEBUG_OUT((i + 1) * 32 - 18) <= '0'; -- (14) - DEBUG_OUT((i + 1) * 32 - 19) <= '0'; -- (13) + DEBUG_OUT((i + 1) * 32 - 16) <= mr_an_complete_i(i); -- (16) + DEBUG_OUT((i + 1) * 32 - 17) <= mac_ready_conf(i); -- (15) + DEBUG_OUT((i + 1) * 32 - 18) <= mac_reconf(i); -- (14) + DEBUG_OUT((i + 1) * 32 - 19) <= an_restart_i(i); -- (13) DEBUG_OUT((i + 1) * 32 - 20) <= an_link_ok_i(i); -- (12) DEBUG_OUT((i + 1) * 32 - 21) <= mr_page_rx_i(i); -- (11) DEBUG_OUT((i + 1) * 32 - 22) <= cfg_rx_int(i); -- (10) @@ -682,19 +683,12 @@ begin sd_rx_data_dst(i * 8 + 7 downto i * 8) <= sd_rx_data_src(i * 8 + 7 downto i * 8); sd_rx_kcntl_dst(i) <= sd_rx_kcntl_src(i); end generate NO_TRUDY_AND_EVE; - - -- Reset signal for SGMII core - -- rst_n_sgmii_i - --- rst_n_sgmii_i(i) <= link_rx_ready(i) when (LINK_MODE(i) = c_IS_SLAVE) else --- TX_LINK_READY_IN when (LINK_MODE(i) = c_IS_MASTER) else --- '0'; -- SGMII core SGMII_GBE_PCS : sgmii_gbe_pcs42 port map( - rst_n => RESET_N, --CLEAR_N, - signal_detect => serdes_active(i), --link_rx_ready(i), + rst_n => RESET_N, + signal_detect => serdes_active(i), gbe_mode => '1', sgmii_mode => '0', operational_rate => b"10", @@ -734,12 +728,12 @@ begin rx_disp_err => sd_rx_disp_error(i), -- RX disparity error from SerDes rx_cv_err => sd_rx_cv_error(i), -- RX code violation error from SerDes -- Autonegotiation stuff - mr_an_complete => open, + mr_an_complete => mr_an_complete_i(i), --open, mr_page_rx => mr_page_rx_i(i), --open, mr_lp_adv_ability => open, mr_main_reset => RESET, --CLEAR, mr_an_enable => serdes_active(i), --link_rx_ready(i), --'1', - mr_restart_an => '0', + mr_restart_an => an_restart_i(i), --'0', mr_adv_ability => x"0020" ); @@ -827,15 +821,28 @@ begin port map( CLK => MASTER_CLK_IN, RESET => RESET, - -- - MAC_AN_COMPLETE_IN => an_link_ok_i(i), + SERDES_ACTIVE_IN => serdes_active(i), + AN_COMPLETE_IN => an_link_ok_i(i), MAC_READY_CONF_IN => mac_ready_conf(i), + AN_RESTART_OUT => an_restart_i(i), MAC_RECONF_OUT => mac_reconf(i), - -- LINK_ACTIVE_OUT => link_active(i), - -- DEBUG => open ); + +-- THE_FW_GBE_LSM: entity gbe_lsm +-- port map( +-- CLK => MASTER_CLK_IN, +-- RESET => RESET, +-- -- +-- MAC_AN_COMPLETE_IN => an_link_ok_i(i), +-- MAC_READY_CONF_IN => mac_ready_conf(i), +-- MAC_RECONF_OUT => mac_reconf(i), +-- -- +-- LINK_ACTIVE_OUT => link_active(i), +-- -- +-- DEBUG => open +-- ); -- RX ringbuffer THE_FW_RB: entity rx_rb -- 2.43.0