From 7e16558bdba2552a7cfe6f63f375e5523578f86f Mon Sep 17 00:00:00 2001 From: hadaq Date: Wed, 23 Nov 2011 17:18:05 +0000 Subject: [PATCH] update of error handling, flush_channel --- libtrbnet/trberror.c | 13 ++++++--- libtrbnet/trberror.h | 6 ++-- libtrbnet/trbnet.c | 67 ++++++++++++++++++++++++++------------------ 3 files changed, 52 insertions(+), 34 deletions(-) diff --git a/libtrbnet/trberror.c b/libtrbnet/trberror.c index 755aebf..0c6dbc1 100644 --- a/libtrbnet/trberror.c +++ b/libtrbnet/trberror.c @@ -56,6 +56,7 @@ const char* trb_errorstr(int trberrno) "FIFO Incomplete Package", "FIFO Invalid Header-Type", "FIFO Termination-Package missing", + "FAILED WAIT_IS_VALID", "FAILED WAIT_IS_NOT_VALID", "User-Buffer Overflow", @@ -66,6 +67,7 @@ const char* trb_errorstr(int trberrno) "Invalid Data-Buffer Length", "Endpoint not reached", "DMA not available (check whether module 'can_module.ko' is loaded)", + "DMA-Timeout", "ReadMem invalid size", "Invalid data-length give by Header", @@ -74,15 +76,18 @@ const char* trb_errorstr(int trberrno) "FIFO Shared Memory Error", "Termination Status Warning", "RPC Error", - "Pexor DMA Error, Kernel fatal, call SysAdmin", - "Pexor Device Error ioctl call, Kernel Fatal, call SysAdmin", + "Pexor DATA Error", + "Pexor Device Error ioctl call, Driver Error", + "Pexor Device Error ioctl call, TRBNet Timeout", "Pexor Device Error ioctl call, DMA Polling Timeout", "Pexor Device Error ioctl call, Out of DMA buffers", - "Pexor Device Error ioctl call, Invalid DMA Size" + "Pexor Device Error ioctl call, Invalid DMA Size", + "Pexor Device Error ioctl call, Lost Credential(s)", + "Pexor Device Error ioctl call, FIFO Transfer Error" }; - if (trberrno < 34) { + if (trberrno < 36) { return errorstring[trberrno]; } else { return "Unknown Error"; diff --git a/libtrbnet/trberror.h b/libtrbnet/trberror.h index 64c7b6b..a5b8cde 100644 --- a/libtrbnet/trberror.h +++ b/libtrbnet/trberror.h @@ -36,12 +36,14 @@ typedef enum { TRB_FIFO_SHARED_MEM = 25, TRB_STATUS_WARNING = 26, TRB_RPC_ERROR = 27, - TRB_PEXOR_DMA_ERROR = 28, + TRB_PEXOR_DATA_ERROR = 28, TRB_PEXOR_DEVICE_ERROR = 29, TRB_PEXOR_DEVICE_TRB_TIMEOUT = 30, TRB_PEXOR_DEVICE_POLLING_TIMEOUT = 31, TRB_PEXOR_DEVICE_DMA_EMPTY = 32, - TRB_PEXOR_DEVICE_INVALID_DMA_SIZE = 33 + TRB_PEXOR_DEVICE_INVALID_DMA_SIZE = 33, + TRB_PEXOR_DEVICE_LOST_CREDENTIAL = 34, + TRB_PEXOR_DEVICE_FIFO_TRANSFER = 35 } TRB_ERROR; /* last TRBNet-TermPackage */ diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c index 06ea2b6..35fe471 100644 --- a/libtrbnet/trbnet.c +++ b/libtrbnet/trbnet.c @@ -1,4 +1,4 @@ -const char trbnet_version[] = "$Revision: 4.13 $ Local"; +const char trbnet_version[] = "$Revision: 4.14 $ Local"; #include #include @@ -260,28 +260,36 @@ static inline void com_reset_FPGA() #else /* PEXOR */ -static int pexor_to_trb_error(int error) +static int pexor_to_trb_error() { - switch (error) { - case -129: + switch (errno) { + case 200: return TRB_PEXOR_DEVICE_ERROR; break; - case -130: + case 201: return TRB_PEXOR_DEVICE_TRB_TIMEOUT; break; - case -131: + case 202: return TRB_PEXOR_DEVICE_POLLING_TIMEOUT; break; - case -132: + case 203: return TRB_PEXOR_DEVICE_DMA_EMPTY; break; - case -133: + case 204: return TRB_PEXOR_DEVICE_INVALID_DMA_SIZE; break; + + case 205: + return TRB_PEXOR_DEVICE_LOST_CREDENTIAL; + break; + + case 206: + return TRB_PEXOR_DEVICE_FIFO_TRANSFER; + break; } return TRB_PEXOR_DEVICE_ERROR; @@ -303,7 +311,7 @@ static int write32_to_FPGA(uint32_t address, uint32_t value) status = ioctl(pexorFileHandle, PEXOR_IOC_WRITE_REGISTER, &descriptor); if(status == -1) { - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } @@ -326,7 +334,7 @@ static inline int read32_from_FPGA(uint32_t address, uint32_t* value) status = ioctl(pexorFileHandle, PEXOR_IOC_READ_REGISTER, &descriptor); if(status == -1) { - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } @@ -457,7 +465,7 @@ static void fifo_flush(uint8_t channel) do { read32_from_FPGA(fifoAddress, &tmp); } while (((tmp & MASK_FIFO_VALID) == 0) && - (++timeout < 10/*MAX_TIMEOUT*/)); + (++timeout < 1000)); /* DEBUG INFO */ if ((trb_debug > 1) && ((tmp & MASK_FIFO_VALID) != 0)) { fprintf(stderr, "FLUSH_FIFO_%03d: 0x%08x\n", counter, tmp); @@ -483,6 +491,9 @@ static int trb_init_transfer(uint8_t channel) com_reset_FPGA(); #else /* First try to resolve it by flushing the fifo */ + if (trb_debug > 0) { + fprintf(stderr,"trb_init_transfer: flushing fifo because of TX Busy\n"); + } fifo_flush(channel); #endif /* Try again */ @@ -559,12 +570,12 @@ static int trb_fifo_read(uint8_t channel, #ifdef PEXOR if (dataBufferSize == 0) { - trb_errno = TRB_PEXOR_DMA_ERROR; + trb_errno = TRB_PEXOR_DATA_ERROR; return -1; } if (read(pexorFileHandle, (void*)dataBuffer, dataBufferSize * 4) != dataBufferSize * 4) { - trb_errno = TRB_PEXOR_DMA_ERROR; + trb_errno = TRB_PEXOR_DATA_ERROR; return -1; } #else @@ -1115,7 +1126,7 @@ static int trb_fifo_read(uint8_t channel, #ifdef PEXOR if (tmp - dataBuffer >= dataBufferSize) { - trb_errno = TRB_PEXOR_DMA_ERROR; + trb_errno = TRB_PEXOR_DATA_ERROR; return -1; } tmp++; @@ -1408,7 +1419,7 @@ int trb_fifo_flush(uint8_t channel) } /* DEBUG INFO */ - if (trb_debug > 1) { + if (trb_debug > 0) { fprintf(stderr, "Flushing FIFO of channel# %d\n", channel); } @@ -1463,7 +1474,7 @@ int trb_register_read(uint16_t trb_address, if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1528,7 +1539,7 @@ int trb_registertime_read(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1606,7 +1617,7 @@ int trb_register_read_mem(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1695,7 +1706,7 @@ int trb_registertime_read_mem(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1772,7 +1783,7 @@ int trb_register_write(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1853,7 +1864,7 @@ int trb_register_write_mem(uint16_t trb_address, if (write(pexorFileHandle, (void*)(data + ctr), len * 4) != len * 4) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } @@ -1873,7 +1884,7 @@ int trb_register_write_mem(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -1933,7 +1944,7 @@ int trb_read_uid(uint16_t trb_address, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -2009,7 +2020,7 @@ int trb_set_address(uint64_t uid, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -2081,7 +2092,7 @@ int trb_ipu_data_read(uint8_t type, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -2151,7 +2162,7 @@ int trb_send_trigger(uint8_t type, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -2224,7 +2235,7 @@ int trb_send_trigger_rich(uint8_t trg_input, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; @@ -2261,7 +2272,7 @@ int trb_send_trigger_rich(uint8_t trg_input, &pexorDescriptor); if (status < 0) { unlockPorts(0); - trb_errno = pexor_to_trb_error(status); + trb_errno = pexor_to_trb_error(); return -1; } dataBufferSize = status; -- 2.43.0