From 854a7bac6fa7176427c7984cc7d09b84e97a9510 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Mon, 22 Jan 2018 14:55:17 +0100 Subject: [PATCH] some more cleanup --- special/spi_flash_and_fpga_reload_record.vhd | 24 ++++++++++---------- trb_net_components.vhd | 4 ++-- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/special/spi_flash_and_fpga_reload_record.vhd b/special/spi_flash_and_fpga_reload_record.vhd index b37310d..7243d4b 100644 --- a/special/spi_flash_and_fpga_reload_record.vhd +++ b/special/spi_flash_and_fpga_reload_record.vhd @@ -77,30 +77,30 @@ THE_BUS_HANDLER : trb_net16_regio_bus_handler DAT_UNKNOWN_ADDR_OUT => BUS_TX.unknown, --Bus Handler (SPI CTRL) + --Bus Handler (SPI Memory) BUS_READ_ENABLE_OUT(0) => spictrl_read_en, + BUS_READ_ENABLE_OUT(1) => spimem_read_en, BUS_WRITE_ENABLE_OUT(0) => spictrl_write_en, + BUS_WRITE_ENABLE_OUT(1) => spimem_write_en, BUS_DATA_OUT(0*32+31 downto 0*32) => spictrl_data_in, + BUS_DATA_OUT(1*32+31 downto 1*32) => spimem_data_in, BUS_ADDR_OUT(0*16) => spictrl_addr, BUS_ADDR_OUT(0*16+15 downto 0*16+1) => open, - BUS_TIMEOUT_OUT(0) => open, - BUS_DATA_IN(0*32+31 downto 0*32) => spictrl_data_out, - BUS_DATAREADY_IN(0) => spictrl_ack, - BUS_WRITE_ACK_IN(0) => spictrl_ack, - BUS_NO_MORE_DATA_IN(0) => spictrl_busy, - BUS_UNKNOWN_ADDR_IN(0) => '0', - - --Bus Handler (SPI Memory) - BUS_READ_ENABLE_OUT(1) => spimem_read_en, - BUS_WRITE_ENABLE_OUT(1) => spimem_write_en, - BUS_DATA_OUT(1*32+31 downto 1*32) => spimem_data_in, BUS_ADDR_OUT(1*16+5 downto 1*16) => spimem_addr, BUS_ADDR_OUT(1*16+15 downto 1*16+6) => open, + BUS_TIMEOUT_OUT(0) => open, BUS_TIMEOUT_OUT(1) => open, + BUS_DATA_IN(0*32+31 downto 0*32) => spictrl_data_out, BUS_DATA_IN(1*32+31 downto 1*32) => spimem_data_out, + BUS_DATAREADY_IN(0) => spictrl_ack, BUS_DATAREADY_IN(1) => spimem_ack, + BUS_WRITE_ACK_IN(0) => spictrl_ack, BUS_WRITE_ACK_IN(1) => spimem_ack, + BUS_NO_MORE_DATA_IN(0) => spictrl_busy, BUS_NO_MORE_DATA_IN(1) => '0', + BUS_UNKNOWN_ADDR_IN(0) => '0', BUS_UNKNOWN_ADDR_IN(1) => '0', + STAT_DEBUG => open ); @@ -164,4 +164,4 @@ THE_FPGA_REBOOT : fpga_reboot ); -end architecture; \ No newline at end of file +end architecture; diff --git a/trb_net_components.vhd b/trb_net_components.vhd index 8a15e20..8a3cc38 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -3078,8 +3078,8 @@ end component; component spi_ltc2600 is generic ( - BITS : integer range 8 to 32; - WAITCYCLES : integer range 2 to 1024); + BITS : integer range 8 to 32 := 32; + WAITCYCLES : integer range 2 to 1024 := 7); port ( CLK_IN : in std_logic; RESET_IN : in std_logic; -- 2.43.0