From 8aebe9ef430faff07711c196011cbb70ec29e251 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Wed, 25 Nov 2015 10:52:27 +0100 Subject: [PATCH] Updating CTS design to new GbE --- cbmtof/tdc_release | 2 +- cts/compile_central_frankfurt.pl | 4 +- cts/config_cbmtof.vhd | 6 +- cts/trb3_central.prj | 215 ++++++++++------- cts/trb3_central.vhd | 367 ++++++++++++++++++----------- cts/trb3_central_constraints_3.lpf | 7 +- 6 files changed, 371 insertions(+), 230 deletions(-) diff --git a/cbmtof/tdc_release b/cbmtof/tdc_release index 7733c1d..df11eae 120000 --- a/cbmtof/tdc_release +++ b/cbmtof/tdc_release @@ -1 +1 @@ -../../tdc/releases/tdc_v2.1.5 \ No newline at end of file +../../tdc/releases/tdc_v2.2 \ No newline at end of file diff --git a/cts/compile_central_frankfurt.pl b/cts/compile_central_frankfurt.pl index f0cc945..fd71812 100755 --- a/cts/compile_central_frankfurt.pl +++ b/cts/compile_central_frankfurt.pl @@ -16,8 +16,8 @@ my $CbmNetPath = "../../cbmnet"; my $lm_license_file_for_synplify = "1702\@hadeb05.gsi.de"; #"27000\@lxcad01.gsi.de"; my $lm_license_file_for_par = "1702\@hadeb05.gsi.de"; -my $lattice_path = '/d/jspc29/lattice/diamond/3.5_x64'; -my $synplify_path = '/d/jspc29/lattice/synplify/J-2015.03-SP1/'; +my $lattice_path = '/d/jspc29/lattice/diamond/3.6_x64'; +my $synplify_path = '/d/jspc29/lattice/synplify/K-2015.09/'; ################################################################################### diff --git a/cts/config_cbmtof.vhd b/cts/config_cbmtof.vhd index 1e7b395..fb84984 100644 --- a/cts/config_cbmtof.vhd +++ b/cts/config_cbmtof.vhd @@ -33,7 +33,7 @@ package config is constant USE_125_MHZ : integer range c_NO to c_YES := c_NO; --Run external 200 MHz clock source - constant USE_EXTERNAL_CLOCK : integer range c_NO to c_YES := c_YES; + constant USE_EXTERNAL_CLOCK : integer range c_NO to c_YES := c_NO; --Which external trigger module (ETM) to use? constant INCLUDE_ETM : integer range c_NO to c_YES := c_YES; @@ -50,6 +50,10 @@ package config is constant TRIGGER_RAND_PULSER : integer := 1; constant TRIGGER_ADDON_COUNT : integer := 8; constant PERIPH_TRIGGER_COUNT : integer := 2; + +--Address settings + constant INIT_ADDRESS : std_logic_vector := x"F3CE"; + constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"60"; ------------------------------------------------------------------------------ --End of configuration diff --git a/cts/trb3_central.prj b/cts/trb3_central.prj index 7b2af1b..b9c299d 100644 --- a/cts/trb3_central.prj +++ b/cts/trb3_central.prj @@ -73,7 +73,7 @@ add_file -vhdl -lib work "config.vhd" add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd" add_file -vhdl -lib work "../../trbnet/trb_net16_hub_func.vhd" add_file -vhdl -lib work "../base/code/clock_switch.vhd" -add_file -vhdl -lib work "../base/code/SFP_DDM.vhd" +#add_file -vhdl -lib work "../base/code/SFP_DDM.vhd" add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd" add_file -vhdl -lib work "../base/trb3_components.vhd" add_file -vhdl -lib work "../base/code/mbs_vulom_recv.vhd" @@ -84,88 +84,141 @@ add_file -vhdl -lib work "../../trbnet/basics/pulse_sync.vhd" add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd" add_file -vhdl -lib work "../base/code/trigger_clock_manager.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net_gbe_protocols.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net_gbe_components.vhd" + +#GbE +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_wrapper.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_logic_wrapper.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_med_interface.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_ipu_multiplexer.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_ipu_dummy.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_receive_control.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_main_control.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_mac_control.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_prioritizer.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_type_validator.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_trans.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_constr.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_transmit_control2.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_ipu_interface.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_event_constr.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_setup.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/ip_configurator.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_ARP.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Ping.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_DHCP.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_SCTRL.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_TrbNetData.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/media/serdes_gbe_4ch.vhd" +add_file -verilog -lib work "../../trbnet/gbe_trb/media/sgmii_channel_smi.v" +add_file -verilog -lib work "../../trbnet/gbe_trb/media/reset_controller_pcs.v" +add_file -verilog -lib work "../../trbnet/gbe_trb/media/reset_controller_cdr.v" +add_file -verilog -lib work "../../trbnet/gbe_trb/media/register_interface_hb.v" +add_file -verilog -lib work "../../trbnet/gbe_trb/media/rate_resolution.v" + +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_8kx9.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_4096x9.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_512x32.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_512x32x8.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_512x72.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_64kx9.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_64kx9_af.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_32kx16x8_mb2.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_2048x8x16.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_65536x18x9.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/slv_mac_memory.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/ip_mem.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_64kx18x9_wcnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_32kx18x9_wcnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_64kx9_af_cnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_8kx9_af_cnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_2kx9x18_wcnt.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/fifo_4kx18x9_wcnt.vhd" #gbe files -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net_gbe_protocols.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net_gbe_components.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/serdes_ch4.vhd" - - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_receiver.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_receive_control.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_main_control.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_transmit_control.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_mac_control.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_protocol_prioritizer.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_protocol_selector.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_ARP.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Forward.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Test.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Ping.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Test1.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_DHCP.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Trash.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_SCTRL.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Stat.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_type_validator.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_lsm_sfp_gbe.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_med_ecp_sfp_gbe_8b.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_trans.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_constr.vhd" -#add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr_nologic.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr.vhd" -#add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr_simple_sender.vhd" - - -#add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_ipu2gbe_simple_sender.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_ipu2gbe.vhd" - - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ip_configurator.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_buf.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_setup.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/mb_mac_sim.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/slv_mac_memory.vhd" -#add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/slv_register.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/ip_mem.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/serdes_gbe_0ch/serdes_gbe_0ch.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/mac_init_mem.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4096x9.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4096x32.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_2048x8.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_16kx8.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_64kx8.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x72.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x32.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_2048x8x16.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_65536x18x9.vhd" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx16x8_mb.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/debug_fifo_2kx16.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx16x8_mb2.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_64kx9.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/statts_mem.vhd" - -add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/sgmii_channel_smi.v" -add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/reset_controller_pcs.v" -add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/reset_controller_cdr.v" -add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/register_interface_hb.v" -add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/rate_resolution.v" - -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_transmit_control2.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_TrbNetData.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx18x9.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx8_ecp3.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x32x8.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx9_flags.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_ipu_interface.vhd" -add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_event_constr.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net_gbe_protocols.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net_gbe_components.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/serdes_ch4.vhd" +# +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_receiver.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_receive_control.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_main_control.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_transmit_control.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_mac_control.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_protocol_prioritizer.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_protocol_selector.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_ARP.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Forward.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Test.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Ping.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Test1.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_DHCP.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Trash.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_SCTRL.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_Stat.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_type_validator.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_lsm_sfp_gbe.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_med_ecp_sfp_gbe_8b.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_trans.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_frame_constr.vhd" +# #add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr_nologic.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr.vhd" +# #add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_packet_constr_simple_sender.vhd" +# +# +# #add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_ipu2gbe_simple_sender.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_ipu2gbe.vhd" +# +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ip_configurator.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_buf.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_setup.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/mb_mac_sim.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/slv_mac_memory.vhd" +# #add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/slv_register.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/ip_mem.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/serdes_gbe_0ch/serdes_gbe_0ch.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/mac_init_mem.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4096x9.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4096x32.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_2048x8.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_16kx8.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_64kx8.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x72.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x32.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_2048x8x16.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_65536x18x9.vhd" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx16x8_mb.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/debug_fifo_2kx16.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx16x8_mb2.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_64kx9.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/statts_mem.vhd" +# +# add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/sgmii_channel_smi.v" +# add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/reset_controller_pcs.v" +# add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/reset_controller_cdr.v" +# add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/register_interface_hb.v" +# add_file -verilog -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/sgmii33/rate_resolution.v" +# +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_transmit_control2.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_constructor_TrbNetData.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx18x9.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx8_ecp3.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x32x8.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx9_flags.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_ipu_interface.vhd" +# add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_event_constr.vhd" #trbnet and base files diff --git a/cts/trb3_central.vhd b/cts/trb3_central.vhd index 8220927..7914d27 100644 --- a/cts/trb3_central.vhd +++ b/cts/trb3_central.vhd @@ -568,10 +568,9 @@ architecture trb3_central_arch of trb3_central is signal cbm_sync_pulser_i : std_logic; signal cbm_sync_timing_trigger_i : std_logic; - signal cbm_regio_rx, bustc_rx : CTRLBUS_RX; - signal cbm_regio_tx, bustc_tx : CTRLBUS_TX; - - + signal cbm_regio_rx, bustc_rx, busgbeip_rx, busgbereg_rx : CTRLBUS_RX; + signal cbm_regio_tx, bustc_tx, busgbeip_tx, busgbereg_tx : CTRLBUS_TX; + component OSCF is port ( OSC : out std_logic @@ -596,6 +595,10 @@ begin TRG_SYNC_OUT => cts_ext_trigger, TRIGGER_IN => cts_rdo_trg_data_valid, + TRG_NUMBER_IN => cts_trg_number, + TRG_CODE_IN => cts_trg_code, + TIMING_TRG_IN => cts_trigger_out, + DATA_OUT => cts_rdo_additional(0).data, WRITE_OUT => cts_rdo_additional(0).data_write, FINISHED_OUT => cts_rdo_additional(0).data_finished, @@ -875,7 +878,7 @@ begin others => '0'); med_stat_debug(4*64+63 downto 4*64) <= (others => '0'); - SFP_TXDIS(7 downto 2) <= (others => '1'); + SFP_TXDIS(4 downto 2) <= (others => '1'); end generate; @@ -987,7 +990,7 @@ begin STAT_DEBUG => med_stat_debug(4*64+63 downto 4*64), CTRL_DEBUG => (others => '0') ); - SFP_TXDIS(7 downto 2) <= (others => '1'); + SFP_TXDIS(4 downto 2) <= (others => '1'); end generate; gen_four_sfp : if USE_4_SFP = c_YES and INCLUDE_CBMNET = c_NO generate @@ -1038,7 +1041,7 @@ begin STAT_DEBUG => open, CTRL_DEBUG => (others => '0') ); - SFP_TXDIS(7 downto 5) <= (others => '1'); + SFP_TXDIS(4 downto 5) <= (others => '1'); end generate; --------------------------------------------------------------------------- @@ -1240,103 +1243,183 @@ begin --------------------------------------------------------------------- -- The GbE machine for blasting out data from TRBnet --------------------------------------------------------------------- - GBE : trb_net16_gbe_buf - generic map ( - DO_SIMULATION => c_NO, - USE_125MHZ_EXTCLK => c_NO + + GBE : entity work.gbe_wrapper + generic map( + DO_SIMULATION => 0, + INCLUDE_DEBUG => 0, + USE_INTERNAL_TRBNET_DUMMY => 0, + USE_EXTERNAL_TRBNET_DUMMY => 0, + RX_PATH_ENABLE => 1, + FIXED_SIZE_MODE => 1, + INCREMENTAL_MODE => 1, + FIXED_SIZE => 100, + FIXED_DELAY_MODE => 1, + UP_DOWN_MODE => 0, + UP_DOWN_LIMIT => 100, + FIXED_DELAY => 100, + + NUMBER_OF_GBE_LINKS => 4, + LINKS_ACTIVE => "1100", + + LINK_HAS_READOUT => "1100", + LINK_HAS_SLOWCTRL => "1000", + LINK_HAS_DHCP => "1100", + LINK_HAS_ARP => "1100", + LINK_HAS_PING => "1100" + ) - port map ( - CLK => clk_100_i, - TEST_CLK => '0', + port map( + CLK_SYS_IN => clk_100_i, CLK_125_IN => clk_125_i, RESET => reset_i, GSR_N => gsr_n, - --Debug - STAGE_STAT_REGS_OUT => open, --stage_stat_regs, -- should be come STATUS or similar - STAGE_CTRL_REGS_IN => stage_ctrl_regs, -- OBSELETE! - ----gk 22.04.10 not used any more, ip_configurator moved inside - ---configuration interface - IP_CFG_START_IN => stage_ctrl_regs(15), - IP_CFG_BANK_SEL_IN => stage_ctrl_regs(11 downto 8), - IP_CFG_DONE_OUT => open, - IP_CFG_MEM_ADDR_OUT => ip_cfg_mem_addr, - IP_CFG_MEM_DATA_IN => ip_cfg_mem_data, - IP_CFG_MEM_CLK_OUT => ip_cfg_mem_clk, - MR_RESET_IN => stage_ctrl_regs(3), - MR_MODE_IN => stage_ctrl_regs(1), - MR_RESTART_IN => stage_ctrl_regs(0), - ---gk 29.03.10 - --interface to ip_configurator memory - SLV_ADDR_IN => mb_ip_mem_addr(7 downto 0), - SLV_READ_IN => mb_ip_mem_read, - SLV_WRITE_IN => mb_ip_mem_write, - SLV_BUSY_OUT => open, - SLV_ACK_OUT => mb_ip_mem_ack, - SLV_DATA_IN => mb_ip_mem_data_wr, - SLV_DATA_OUT => mb_ip_mem_data_rd, - --gk 26.04.10 - ---gk 22.04.10 - ---registers setup interface - BUS_ADDR_IN => gbe_stp_reg_addr(7 downto 0), --ctrl_reg_addr(7 downto 0), - BUS_DATA_IN => gbe_stp_reg_data_wr, --stage_ctrl_regs, - BUS_DATA_OUT => gbe_stp_reg_data_rd, - BUS_WRITE_EN_IN => gbe_stp_reg_write, - BUS_READ_EN_IN => gbe_stp_reg_read, - BUS_ACK_OUT => gbe_stp_reg_ack, - --gk 23.04.10 - LED_PACKET_SENT_OUT => open, --buf_SFP_LED_ORANGE(17), - LED_AN_DONE_N_OUT => link_ok, --buf_SFP_LED_GREEN(17), - --CTS interface - CTS_NUMBER_IN => gbe_cts_number, - CTS_CODE_IN => gbe_cts_code, - CTS_INFORMATION_IN => gbe_cts_information, - CTS_READOUT_TYPE_IN => gbe_cts_readout_type, - CTS_START_READOUT_IN => gbe_cts_start_readout, - CTS_DATA_OUT => open, - CTS_DATAREADY_OUT => open, + + TRIGGER_IN => cts_rdo_trg_data_valid, + + SD_PRSNT_N_IN => SFP_MOD0(8 downto 5), + SD_LOS_IN => SFP_LOS(8 downto 5), + SD_TXDIS_OUT => SFP_TXDIS(8 downto 5), + + CTS_NUMBER_IN => gbe_cts_number, + CTS_CODE_IN => gbe_cts_code, + CTS_INFORMATION_IN => gbe_cts_information, + CTS_READOUT_TYPE_IN => gbe_cts_readout_type, + CTS_START_READOUT_IN => gbe_cts_start_readout, + CTS_DATA_OUT => open, + CTS_DATAREADY_OUT => open, CTS_READOUT_FINISHED_OUT => gbe_cts_readout_finished, - CTS_READ_IN => '1', - CTS_LENGTH_OUT => open, - CTS_ERROR_PATTERN_OUT => gbe_cts_status_bits, - --Data payload interface - FEE_DATA_IN => gbe_fee_data, - FEE_DATAREADY_IN => gbe_fee_dataready, - FEE_READ_OUT => gbe_fee_read, + CTS_READ_IN => '1', + CTS_LENGTH_OUT => open, + CTS_ERROR_PATTERN_OUT => gbe_cts_status_bits, + + FEE_DATA_IN => gbe_fee_data, + FEE_DATAREADY_IN => gbe_fee_dataready, + FEE_READ_OUT => gbe_fee_read, FEE_STATUS_BITS_IN => gbe_fee_status_bits, - FEE_BUSY_IN => gbe_fee_busy, - --SFP Connection - SFP_RXD_P_IN => SFP_RX_P(9), --these ports are don't care - SFP_RXD_N_IN => SFP_RX_N(9), - SFP_TXD_P_OUT => SFP_TX_P(9), - SFP_TXD_N_OUT => SFP_TX_N(9), - SFP_REFCLK_P_IN => open, --SFP_REFCLKP(2), - SFP_REFCLK_N_IN => open, --SFP_REFCLKN(2), - SFP_PRSNT_N_IN => SFP_MOD0(8), -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) - SFP_LOS_IN => SFP_LOS(8), -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SFP_TXDIS_OUT => SFP_TXDIS(8), -- SFP disable - - -- interface between main_controller and hub logic - MC_UNIQUE_ID_IN => mc_unique_id, - GSC_CLK_IN => clk_100_i, - GSC_INIT_DATAREADY_OUT => gsc_init_dataready, - GSC_INIT_DATA_OUT => gsc_init_data, - GSC_INIT_PACKET_NUM_OUT => gsc_init_packet_num, - GSC_INIT_READ_IN => gsc_init_read, - GSC_REPLY_DATAREADY_IN => gsc_reply_dataready, - GSC_REPLY_DATA_IN => gsc_reply_data, - GSC_REPLY_PACKET_NUM_IN => gsc_reply_packet_num, - GSC_REPLY_READ_OUT => gsc_reply_read, - GSC_BUSY_IN => gsc_busy, - - MAKE_RESET_OUT => reset_via_gbe, - - --for simulation of receiving part only - MAC_RX_EOF_IN => '0', - MAC_RXD_IN => "00000000", - MAC_RX_EN_IN => '0', - - ANALYZER_DEBUG_OUT => debug - ); + FEE_BUSY_IN => gbe_fee_busy, + + MC_UNIQUE_ID_IN => mc_unique_id, + + GSC_CLK_IN => clk_100_i, + GSC_INIT_DATAREADY_OUT => gsc_init_dataready, + GSC_INIT_DATA_OUT => gsc_init_data, + GSC_INIT_PACKET_NUM_OUT => gsc_init_packet_num, + GSC_INIT_READ_IN => gsc_init_read, + GSC_REPLY_DATAREADY_IN => gsc_reply_dataready, + GSC_REPLY_DATA_IN => gsc_reply_data, + GSC_REPLY_PACKET_NUM_IN => gsc_reply_packet_num, + GSC_REPLY_READ_OUT => gsc_reply_read, + GSC_BUSY_IN => gsc_busy, + + BUS_IP_RX => busgbeip_rx, + BUS_IP_TX => busgbeip_tx, + BUS_REG_RX => busgbereg_rx, + BUS_REG_TX => busgbereg_tx, + + MAKE_RESET_OUT => reset_via_gbe, + + DEBUG_OUT => open + ); + +-- +-- GBE : trb_net16_gbe_buf +-- generic map ( +-- DO_SIMULATION => c_NO, +-- USE_125MHZ_EXTCLK => c_NO +-- ) +-- port map ( +-- CLK => clk_100_i, +-- TEST_CLK => '0', +-- CLK_125_IN => clk_125_i, +-- RESET => reset_i, +-- GSR_N => gsr_n, +-- --Debug +-- STAGE_STAT_REGS_OUT => open, --stage_stat_regs, -- should be come STATUS or similar +-- STAGE_CTRL_REGS_IN => stage_ctrl_regs, -- OBSELETE! +-- ----gk 22.04.10 not used any more, ip_configurator moved inside +-- ---configuration interface +-- IP_CFG_START_IN => stage_ctrl_regs(15), +-- IP_CFG_BANK_SEL_IN => stage_ctrl_regs(11 downto 8), +-- IP_CFG_DONE_OUT => open, +-- IP_CFG_MEM_ADDR_OUT => ip_cfg_mem_addr, +-- IP_CFG_MEM_DATA_IN => ip_cfg_mem_data, +-- IP_CFG_MEM_CLK_OUT => ip_cfg_mem_clk, +-- MR_RESET_IN => stage_ctrl_regs(3), +-- MR_MODE_IN => stage_ctrl_regs(1), +-- MR_RESTART_IN => stage_ctrl_regs(0), +-- ---gk 29.03.10 +-- --interface to ip_configurator memory +-- SLV_ADDR_IN => mb_ip_mem_addr(7 downto 0), +-- SLV_READ_IN => mb_ip_mem_read, +-- SLV_WRITE_IN => mb_ip_mem_write, +-- SLV_BUSY_OUT => open, +-- SLV_ACK_OUT => mb_ip_mem_ack, +-- SLV_DATA_IN => mb_ip_mem_data_wr, +-- SLV_DATA_OUT => mb_ip_mem_data_rd, +-- --gk 26.04.10 +-- ---gk 22.04.10 +-- ---registers setup interface +-- BUS_ADDR_IN => gbe_stp_reg_addr(7 downto 0), --ctrl_reg_addr(7 downto 0), +-- BUS_DATA_IN => gbe_stp_reg_data_wr, --stage_ctrl_regs, +-- BUS_DATA_OUT => gbe_stp_reg_data_rd, +-- BUS_WRITE_EN_IN => gbe_stp_reg_write, +-- BUS_READ_EN_IN => gbe_stp_reg_read, +-- BUS_ACK_OUT => gbe_stp_reg_ack, +-- --gk 23.04.10 +-- LED_PACKET_SENT_OUT => open, --buf_SFP_LED_ORANGE(17), +-- LED_AN_DONE_N_OUT => link_ok, --buf_SFP_LED_GREEN(17), +-- --CTS interface +-- CTS_NUMBER_IN => gbe_cts_number, +-- CTS_CODE_IN => gbe_cts_code, +-- CTS_INFORMATION_IN => gbe_cts_information, +-- CTS_READOUT_TYPE_IN => gbe_cts_readout_type, +-- CTS_START_READOUT_IN => gbe_cts_start_readout, +-- CTS_DATA_OUT => open, +-- CTS_DATAREADY_OUT => open, +-- CTS_READOUT_FINISHED_OUT => gbe_cts_readout_finished, +-- CTS_READ_IN => '1', +-- CTS_LENGTH_OUT => open, +-- CTS_ERROR_PATTERN_OUT => gbe_cts_status_bits, +-- --Data payload interface +-- FEE_DATA_IN => gbe_fee_data, +-- FEE_DATAREADY_IN => gbe_fee_dataready, +-- FEE_READ_OUT => gbe_fee_read, +-- FEE_STATUS_BITS_IN => gbe_fee_status_bits, +-- FEE_BUSY_IN => gbe_fee_busy, +-- --SFP Connection +-- SFP_RXD_P_IN => SFP_RX_P(9), --these ports are don't care +-- SFP_RXD_N_IN => SFP_RX_N(9), +-- SFP_TXD_P_OUT => SFP_TX_P(9), +-- SFP_TXD_N_OUT => SFP_TX_N(9), +-- SFP_REFCLK_P_IN => open, --SFP_REFCLKP(2), +-- SFP_REFCLK_N_IN => open, --SFP_REFCLKN(2), +-- SFP_PRSNT_N_IN => SFP_MOD0(8), -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) +-- SFP_LOS_IN => SFP_LOS(8), -- SFP Loss Of Signal ('0' = OK, '1' = no signal) +-- SFP_TXDIS_OUT => SFP_TXDIS(8), -- SFP disable +-- +-- -- interface between main_controller and hub logic +-- MC_UNIQUE_ID_IN => mc_unique_id, +-- GSC_CLK_IN => clk_100_i, +-- GSC_INIT_DATAREADY_OUT => gsc_init_dataready, +-- GSC_INIT_DATA_OUT => gsc_init_data, +-- GSC_INIT_PACKET_NUM_OUT => gsc_init_packet_num, +-- GSC_INIT_READ_IN => gsc_init_read, +-- GSC_REPLY_DATAREADY_IN => gsc_reply_dataready, +-- GSC_REPLY_DATA_IN => gsc_reply_data, +-- GSC_REPLY_PACKET_NUM_IN => gsc_reply_packet_num, +-- GSC_REPLY_READ_OUT => gsc_reply_read, +-- GSC_BUSY_IN => gsc_busy, +-- +-- MAKE_RESET_OUT => reset_via_gbe, +-- +-- --for simulation of receiving part only +-- MAC_RX_EOF_IN => '0', +-- MAC_RXD_IN => "00000000", +-- MAC_RX_EN_IN => '0', +-- +-- ANALYZER_DEBUG_OUT => debug +-- ); --------------------------------------------------------------------------- @@ -1394,29 +1477,29 @@ begin BUS_UNKNOWN_ADDR_IN(1) => '0', -- third one - IP config memory - BUS_ADDR_OUT(3*16-1 downto 2*16) => mb_ip_mem_addr, - BUS_DATA_OUT(3*32-1 downto 2*32) => mb_ip_mem_data_wr, - BUS_READ_ENABLE_OUT(2) => mb_ip_mem_read, - BUS_WRITE_ENABLE_OUT(2) => mb_ip_mem_write, + BUS_ADDR_OUT(2*16+7 downto 2*16) => busgbeip_rx.addr(7 downto 0), + BUS_DATA_OUT(3*32-1 downto 2*32) => busgbeip_rx.data, + BUS_READ_ENABLE_OUT(2) => busgbeip_rx.read, + BUS_WRITE_ENABLE_OUT(2) => busgbeip_rx.write, BUS_TIMEOUT_OUT(2) => open, - BUS_DATA_IN(3*32-1 downto 2*32) => mb_ip_mem_data_rd, - BUS_DATAREADY_IN(2) => mb_ip_mem_ack, - BUS_WRITE_ACK_IN(2) => mb_ip_mem_ack, - BUS_NO_MORE_DATA_IN(2) => '0', - BUS_UNKNOWN_ADDR_IN(2) => '0', + BUS_DATA_IN(3*32-1 downto 2*32) => busgbeip_tx.data, + BUS_DATAREADY_IN(2) => busgbeip_tx.ack, + BUS_WRITE_ACK_IN(2) => busgbeip_tx.ack, + BUS_NO_MORE_DATA_IN(2) => busgbeip_tx.nack, + BUS_UNKNOWN_ADDR_IN(2) => busgbeip_tx.unknown, -- gk 22.04.10 -- gbe setup - BUS_ADDR_OUT(4*16-1 downto 3*16) => gbe_stp_reg_addr, - BUS_DATA_OUT(4*32-1 downto 3*32) => gbe_stp_reg_data_wr, - BUS_READ_ENABLE_OUT(3) => gbe_stp_reg_read, - BUS_WRITE_ENABLE_OUT(3) => gbe_stp_reg_write, + BUS_ADDR_OUT(3*16+7 downto 3*16) => busgbereg_rx.addr(7 downto 0), + BUS_DATA_OUT(4*32-1 downto 3*32) => busgbereg_rx.data, + BUS_READ_ENABLE_OUT(3) => busgbereg_rx.read, + BUS_WRITE_ENABLE_OUT(3) => busgbereg_rx.write, BUS_TIMEOUT_OUT(3) => open, - BUS_DATA_IN(4*32-1 downto 3*32) => gbe_stp_reg_data_rd, - BUS_DATAREADY_IN(3) => gbe_stp_reg_ack, - BUS_WRITE_ACK_IN(3) => gbe_stp_reg_ack, - BUS_NO_MORE_DATA_IN(3) => '0', - BUS_UNKNOWN_ADDR_IN(3) => '0', + BUS_DATA_IN(4*32-1 downto 3*32) => busgbereg_tx.data, + BUS_DATAREADY_IN(3) => busgbereg_tx.ack, + BUS_WRITE_ACK_IN(3) => busgbereg_tx.ack, + BUS_NO_MORE_DATA_IN(3) => busgbereg_tx.nack, + BUS_UNKNOWN_ADDR_IN(3) => busgbereg_tx.unknown, -- CTS BUS_ADDR_OUT(5*16-1 downto 4*16) => cts_regio_addr, @@ -1750,32 +1833,32 @@ begin ------------------------------------------------------------------------------- -- SFP POWER Entity ------------------------------------------------------------------------------- - Generate_Sfp_DDM : if INCLUDE_SFP_DDM = c_YES generate - SFP_DDM_1 : entity work.SFP_DDM - port map ( - CLK100 => clk_100_i, - SLOW_CTRL_IN => sfp_ddm_ctrl_reg(31 downto 0), - DATA_OUT => sfp_ddm_ctrl_reg(32*4-1 downto 32), - SCL_EXT => SFP_MOD1, - SDA_EXT => SFP_MOD2 - ); - - PROC_SFP_DDM_CTRL_REG : process - variable pos : integer; - begin - wait until rising_edge(clk_100_i); - pos := to_integer(unsigned(sfp_ddm_ctrl_addr))*32; - sfp_ddm_ctrl_data_out <= sfp_ddm_ctrl_reg(pos+31 downto pos); - last_sfp_ddm_ctrl_read <= sfp_ddm_ctrl_read; - if sfp_ddm_ctrl_write = '1' and to_integer(unsigned(sfp_ddm_ctrl_addr)) = 0 then - --sfp_ddm_ctrl_reg(pos+31 downto pos) <= sfp_ddm_ctrl_data_in; - sfp_ddm_ctrl_reg(31 downto 0) <= sfp_ddm_ctrl_data_in; - end if; - end process; - - - - end generate Generate_Sfp_DDM; +-- Generate_Sfp_DDM : if INCLUDE_SFP_DDM = c_YES generate +-- SFP_DDM_1 : entity work.SFP_DDM +-- port map ( +-- CLK100 => clk_100_i, +-- SLOW_CTRL_IN => sfp_ddm_ctrl_reg(31 downto 0), +-- DATA_OUT => sfp_ddm_ctrl_reg(32*4-1 downto 32), +-- SCL_EXT => SFP_MOD1, +-- SDA_EXT => SFP_MOD2 +-- ); +-- +-- PROC_SFP_DDM_CTRL_REG : process +-- variable pos : integer; +-- begin +-- wait until rising_edge(clk_100_i); +-- pos := to_integer(unsigned(sfp_ddm_ctrl_addr))*32; +-- sfp_ddm_ctrl_data_out <= sfp_ddm_ctrl_reg(pos+31 downto pos); +-- last_sfp_ddm_ctrl_read <= sfp_ddm_ctrl_read; +-- if sfp_ddm_ctrl_write = '1' and to_integer(unsigned(sfp_ddm_ctrl_addr)) = 0 then +-- --sfp_ddm_ctrl_reg(pos+31 downto pos) <= sfp_ddm_ctrl_data_in; +-- sfp_ddm_ctrl_reg(31 downto 0) <= sfp_ddm_ctrl_data_in; +-- end if; +-- end process; +-- +-- +-- +-- end generate Generate_Sfp_DDM; diff --git a/cts/trb3_central_constraints_3.lpf b/cts/trb3_central_constraints_3.lpf index 57435d2..8a552fa 100644 --- a/cts/trb3_central_constraints_3.lpf +++ b/cts/trb3_central_constraints_3.lpf @@ -45,6 +45,9 @@ GSR_NET NET "GSR_N"; # Locate Serdes and media interfaces ################################################################# LOCATE COMP "GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/clk_int.SERDES_GBE/PCSD_INST" SITE "PCSB" ; +LOCATE COMP "GBE/physical_impl_gen.physical/impl_gen.gbe_serdes/PCSD_INST" SITE "PCSB"; + + LOCATE COMP "gen_single_sfp_THE_MEDIA_UPLINK/gen_serdes_0_200_ctc_THE_SERDES/PCSD_INST" SITE "PCSA" ; LOCATE COMP "gen_four_sfp_THE_MEDIA_UPLINK/gen_serdes_200_THE_SERDES/PCSD_INST" SITE "PCSA" ; LOCATE COMP "THE_MEDIA_ONBOARD/gen_serdes_200.THE_SERDES/PCSD_INST" SITE "PCSC" ; @@ -131,7 +134,7 @@ LOCATE UGROUP "THE_HUB/THE_HUB/gen_bufs.4.gen_iobufs.1.gen_iobuf.IOBUF/GEN_IBUF. LOCATE UGROUP "THE_HUB/THE_HUB/gen_bufs.3.gen_iobufs.1.gen_iobuf.IOBUF/GEN_IBUF.THE_IBUF/IBUF_group" REGION "REGION_IOBUF" ; LOCATE UGROUP "THE_HUB/THE_HUB/gen_bufs.2.gen_iobufs.0.gen_iobuf.IOBUF/GEN_IBUF.THE_IBUF/IBUF_group" REGION "REGION_IOBUF" ; -#GbE Part +# #GbE Part UGROUP "tsmac" BLKNAME GBE/imp_gen.MAC BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES @@ -246,8 +249,6 @@ PRIORITIZE NET "GBE/pcs_rxd_q[7]" 100 ; PRIORITIZE NET "GBE/pcs_rxd_q[0]" 100 ; PRIORITIZE NET "GBE/serdes_rx_clk_c" 80 ; -#BLOCK PATH FROM CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_cpu_if*" TO CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_tx_mac*" ; -#BLOCK PATH FROM CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_cpu_if*" TO CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_rx_mac*" ; LOCATE UGROUP "CBMNET_PHY_GROUP" SITE "R100C118D"; LOCATE UGROUP "CBMNET_BRIDGE_GROUP" SITE "R42C106D"; -- 2.43.0